4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/gpio.h>
22 #include <linux/gpio_keys.h>
23 #include <linux/input.h>
24 #include <linux/interrupt.h>
25 #include <linux/kernel.h>
26 #include <linux/leds.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mmc/sh_mmcif.h>
29 #include <linux/pinctrl/machine.h>
30 #include <linux/platform_data/gpio-rcar.h>
31 #include <linux/platform_data/rcar-du.h>
32 #include <linux/platform_device.h>
33 #include <linux/phy.h>
34 #include <linux/regulator/fixed.h>
35 #include <linux/regulator/machine.h>
36 #include <linux/sh_eth.h>
37 #include <mach/common.h>
38 #include <mach/irqs.h>
39 #include <mach/r8a7790.h>
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
44 static struct rcar_du_encoder_data lager_du_encoders
[] = {
46 .type
= RCAR_DU_ENCODER_VGA
,
47 .output
= RCAR_DU_OUTPUT_DPAD0
,
49 .type
= RCAR_DU_ENCODER_NONE
,
50 .output
= RCAR_DU_OUTPUT_LVDS1
,
51 .connector
.lvds
.panel
= {
70 static const struct rcar_du_platform_data lager_du_pdata __initconst
= {
71 .encoders
= lager_du_encoders
,
72 .num_encoders
= ARRAY_SIZE(lager_du_encoders
),
75 static const struct resource du_resources
[] __initconst
= {
76 DEFINE_RES_MEM(0xfeb00000, 0x70000),
77 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
78 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
79 DEFINE_RES_IRQ(gic_spi(256)),
80 DEFINE_RES_IRQ(gic_spi(268)),
81 DEFINE_RES_IRQ(gic_spi(269)),
84 static void __init
lager_add_du_device(void)
86 struct platform_device_info info
= {
87 .name
= "rcar-du-r8a7790",
90 .num_res
= ARRAY_SIZE(du_resources
),
91 .data
= &lager_du_pdata
,
92 .size_data
= sizeof(lager_du_pdata
),
93 .dma_mask
= DMA_BIT_MASK(32),
96 platform_device_register_full(&info
);
100 static struct gpio_led lager_leds
[] = {
103 .gpio
= RCAR_GP_PIN(5, 17),
104 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
107 .gpio
= RCAR_GP_PIN(4, 23),
108 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
111 .gpio
= RCAR_GP_PIN(4, 22),
112 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
116 static const struct gpio_led_platform_data lager_leds_pdata __initconst
= {
118 .num_leds
= ARRAY_SIZE(lager_leds
),
122 #define GPIO_KEY(c, g, d, ...) \
123 { .code = c, .gpio = g, .desc = d, .active_low = 1 }
125 static struct gpio_keys_button gpio_buttons
[] = {
126 GPIO_KEY(KEY_4
, RCAR_GP_PIN(1, 28), "SW2-pin4"),
127 GPIO_KEY(KEY_3
, RCAR_GP_PIN(1, 26), "SW2-pin3"),
128 GPIO_KEY(KEY_2
, RCAR_GP_PIN(1, 24), "SW2-pin2"),
129 GPIO_KEY(KEY_1
, RCAR_GP_PIN(1, 14), "SW2-pin1"),
132 static const struct gpio_keys_platform_data lager_keys_pdata __initconst
= {
133 .buttons
= gpio_buttons
,
134 .nbuttons
= ARRAY_SIZE(gpio_buttons
),
137 /* Fixed 3.3V regulator to be used by MMCIF */
138 static struct regulator_consumer_supply fixed3v3_power_consumers
[] =
140 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
144 static const struct sh_mmcif_plat_data mmcif1_pdata __initconst
= {
145 .caps
= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
,
146 .clk_ctrl2_present
= true,
147 .ccs_unsupported
= true,
150 static const struct resource mmcif1_resources
[] __initconst
= {
151 DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
152 DEFINE_RES_IRQ(gic_spi(170)),
156 static const struct sh_eth_plat_data ether_pdata __initconst
= {
158 .edmac_endian
= EDMAC_LITTLE_ENDIAN
,
159 .phy_interface
= PHY_INTERFACE_MODE_RMII
,
160 .ether_link_active_low
= 1,
163 static const struct resource ether_resources
[] __initconst
= {
164 DEFINE_RES_MEM(0xee700000, 0x400),
165 DEFINE_RES_IRQ(gic_spi(162)),
168 static const struct pinctrl_map lager_pinctrl_map
[] = {
169 /* DU (CN10: ARGB0, CN13: LVDS) */
170 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
172 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
174 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
175 "du_clk_out_0", "du"),
176 /* SCIF0 (CN19: DEBUG SERIAL0) */
177 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
178 "scif0_data", "scif0"),
179 /* SCIF1 (CN20: DEBUG SERIAL1) */
180 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
181 "scif1_data", "scif1"),
183 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
184 "mmc1_data8", "mmc1"),
185 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
186 "mmc1_ctrl", "mmc1"),
188 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
190 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
192 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
194 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
195 "intc_irq0", "intc"),
198 static void __init
lager_add_standard_devices(void)
200 r8a7790_clock_init();
202 pinctrl_register_mappings(lager_pinctrl_map
,
203 ARRAY_SIZE(lager_pinctrl_map
));
204 r8a7790_pinmux_init();
206 r8a7790_add_standard_devices();
207 platform_device_register_data(&platform_bus
, "leds-gpio", -1,
209 sizeof(lager_leds_pdata
));
210 platform_device_register_data(&platform_bus
, "gpio-keys", -1,
212 sizeof(lager_keys_pdata
));
213 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers
,
214 ARRAY_SIZE(fixed3v3_power_consumers
), 3300000);
215 platform_device_register_resndata(&platform_bus
, "sh_mmcif", 1,
216 mmcif1_resources
, ARRAY_SIZE(mmcif1_resources
),
217 &mmcif1_pdata
, sizeof(mmcif1_pdata
));
219 platform_device_register_resndata(&platform_bus
, "r8a7790-ether", -1,
221 ARRAY_SIZE(ether_resources
),
222 ðer_pdata
, sizeof(ether_pdata
));
224 lager_add_du_device();
228 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
229 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
230 * 14-15. We have to set them back to 01 from the default 00 value each time
231 * the PHY is reset. It's also important because the PHY's LED0 signal is
232 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
233 * bounce on and off after each packet, which we apparently want to avoid.
235 static int lager_ksz8041_fixup(struct phy_device
*phydev
)
237 u16 phyctrl1
= phy_read(phydev
, 0x1e);
241 return phy_write(phydev
, 0x1e, phyctrl1
);
244 static void __init
lager_init(void)
246 lager_add_standard_devices();
248 phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup
);
251 static const char * const lager_boards_compat_dt
[] __initconst
= {
256 DT_MACHINE_START(LAGER_DT
, "lager")
257 .smp
= smp_ops(r8a7790_smp_ops
),
258 .init_early
= r8a7790_init_early
,
259 .init_time
= rcar_gen2_timer_init
,
260 .init_machine
= lager_init
,
261 .dt_compat
= lager_boards_compat_dt
,