pinctrl: exynos: add exynos5420 SoC specific data
[deliverable/linux.git] / arch / arm / mach-shmobile / clock-r8a7790.c
1 /*
2 * r8a7790 clock framework support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20 #include <linux/init.h>
21 #include <linux/io.h>
22 #include <linux/kernel.h>
23 #include <linux/sh_clk.h>
24 #include <linux/clkdev.h>
25 #include <mach/common.h>
26
27 #define CPG_BASE 0xe6150000
28 #define CPG_LEN 0x1000
29
30 #define SMSTPCR2 0xe6150138
31 #define SMSTPCR7 0xe615014c
32
33 static struct clk_mapping cpg_mapping = {
34 .phys = CPG_BASE,
35 .len = CPG_LEN,
36 };
37
38 static struct clk p_clk = {
39 .rate = 65000000, /* shortcut for now */
40 .mapping = &cpg_mapping,
41 };
42
43 static struct clk mp_clk = {
44 .rate = 52000000, /* shortcut for now */
45 .mapping = &cpg_mapping,
46 };
47
48 static struct clk *main_clks[] = {
49 &p_clk,
50 &mp_clk,
51 };
52
53 enum { MSTP721, MSTP720,
54 MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
55 static struct clk mstp_clks[MSTP_NR] = {
56 [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
57 [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
58 [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
59 [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
60 [MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
61 [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
62 [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
63 [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
64 };
65
66 static struct clk_lookup lookups[] = {
67 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
68 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
69 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
70 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
71 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
72 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),
73 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),
74 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
75 };
76
77 void __init r8a7790_clock_init(void)
78 {
79 int k, ret = 0;
80
81 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
82 ret = clk_register(main_clks[k]);
83
84 if (!ret)
85 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
86
87 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
88
89 if (!ret)
90 shmobile_clk_init();
91 else
92 panic("failed to setup r8a7790 clocks\n");
93 }
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