2 * r8a7790 processor support
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/irq.h>
22 #include <linux/irqchip.h>
23 #include <linux/kernel.h>
24 #include <linux/of_platform.h>
25 #include <linux/serial_sci.h>
26 #include <linux/platform_data/irq-renesas-irqc.h>
27 #include <mach/common.h>
28 #include <mach/irqs.h>
29 #include <mach/r8a7790.h>
30 #include <asm/mach/arch.h>
32 static const struct resource pfc_resources
[] = {
33 DEFINE_RES_MEM(0xe6060000, 0x250),
36 void __init
r8a7790_pinmux_init(void)
38 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources
,
39 ARRAY_SIZE(pfc_resources
));
42 #define SCIF_COMMON(scif_type, baseaddr, irq) \
44 .mapbase = baseaddr, \
45 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
46 .irqs = SCIx_IRQ_MUXED(irq)
48 #define SCIFA_DATA(index, baseaddr, irq) \
50 SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
51 .scbrr_algo_id = SCBRR_ALGO_4, \
52 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
55 #define SCIFB_DATA(index, baseaddr, irq) \
57 SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
58 .scbrr_algo_id = SCBRR_ALGO_4, \
59 .scscr = SCSCR_RE | SCSCR_TE, \
62 #define SCIF_DATA(index, baseaddr, irq) \
64 SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
65 .scbrr_algo_id = SCBRR_ALGO_2, \
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
69 enum { SCIFA0
, SCIFA1
, SCIFB0
, SCIFB1
, SCIFB2
, SCIFA2
, SCIF0
, SCIF1
};
71 static const struct plat_sci_port scif
[] = {
72 SCIFA_DATA(SCIFA0
, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
73 SCIFA_DATA(SCIFA1
, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
74 SCIFB_DATA(SCIFB0
, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
75 SCIFB_DATA(SCIFB1
, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
76 SCIFB_DATA(SCIFB2
, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
77 SCIFA_DATA(SCIFA2
, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
78 SCIF_DATA(SCIF0
, 0xe6e60000, gic_spi(152)), /* SCIF0 */
79 SCIF_DATA(SCIF1
, 0xe6e68000, gic_spi(153)), /* SCIF1 */
82 static inline void r8a7790_register_scif(int idx
)
84 platform_device_register_data(&platform_bus
, "sh-sci", idx
, &scif
[idx
],
85 sizeof(struct plat_sci_port
));
88 static struct renesas_irqc_config irqc0_data
= {
89 .irq_base
= irq_pin(0), /* IRQ0 -> IRQ3 */
92 static struct resource irqc0_resources
[] = {
93 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
94 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
95 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
96 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
97 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
100 #define r8a7790_register_irqc(idx) \
101 platform_device_register_resndata(&platform_bus, "renesas_irqc", \
102 idx, irqc##idx##_resources, \
103 ARRAY_SIZE(irqc##idx##_resources), \
105 sizeof(struct renesas_irqc_config))
107 void __init
r8a7790_add_standard_devices(void)
109 r8a7790_register_scif(SCIFA0
);
110 r8a7790_register_scif(SCIFA1
);
111 r8a7790_register_scif(SCIFB0
);
112 r8a7790_register_scif(SCIFB1
);
113 r8a7790_register_scif(SCIFB2
);
114 r8a7790_register_scif(SCIFA2
);
115 r8a7790_register_scif(SCIF0
);
116 r8a7790_register_scif(SCIF1
);
117 r8a7790_register_irqc(0);
121 void __init
r8a7790_add_standard_devices_dt(void)
123 of_platform_populate(NULL
, of_default_bus_match_table
, NULL
, NULL
);
126 static const char *r8a7790_boards_compat_dt
[] __initdata
= {
131 DT_MACHINE_START(R8A7790_DT
, "Generic R8A7790 (Flattened Device Tree)")
132 .init_irq
= irqchip_init
,
133 .init_machine
= r8a7790_add_standard_devices_dt
,
134 .init_time
= shmobile_timer_init
,
135 .dt_compat
= r8a7790_boards_compat_dt
,
137 #endif /* CONFIG_USE_OF */