Merge tag 'fbdev-fixes-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba...
[deliverable/linux.git] / arch / arm / mach-tegra / Kconfig
1 menuconfig ARCH_TEGRA
2 bool "NVIDIA Tegra" if ARCH_MULTI_V7
3 select ARCH_REQUIRE_GPIOLIB
4 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
5 select ARM_AMBA
6 select ARM_GIC
7 select CLKSRC_MMIO
8 select HAVE_ARM_SCU if SMP
9 select HAVE_ARM_TWD if SMP
10 select PINCTRL
11 select ARCH_HAS_RESET_CONTROLLER
12 select RESET_CONTROLLER
13 select SOC_BUS
14 select USB_ULPI if USB_PHY
15 select USB_ULPI_VIEWPORT if USB_PHY
16 help
17 This enables support for NVIDIA Tegra based systems.
18
19 if ARCH_TEGRA
20
21 config ARCH_TEGRA_2x_SOC
22 bool "Enable support for Tegra20 family"
23 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
24 select ARM_ERRATA_720789
25 select ARM_ERRATA_754327 if SMP
26 select ARM_ERRATA_764369 if SMP
27 select PINCTRL_TEGRA20
28 select PL310_ERRATA_727915 if CACHE_L2X0
29 select PL310_ERRATA_769419 if CACHE_L2X0
30 select TEGRA_TIMER
31 help
32 Support for NVIDIA Tegra AP20 and T20 processors, based on the
33 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
34
35 config ARCH_TEGRA_3x_SOC
36 bool "Enable support for Tegra30 family"
37 select ARM_ERRATA_754322
38 select ARM_ERRATA_764369 if SMP
39 select PINCTRL_TEGRA30
40 select PL310_ERRATA_769419 if CACHE_L2X0
41 select TEGRA_TIMER
42 help
43 Support for NVIDIA Tegra T30 processor family, based on the
44 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
45
46 config ARCH_TEGRA_114_SOC
47 bool "Enable support for Tegra114 family"
48 select ARM_ERRATA_798181 if SMP
49 select ARM_L1_CACHE_SHIFT_6
50 select HAVE_ARM_ARCH_TIMER
51 select PINCTRL_TEGRA114
52 select TEGRA_TIMER
53 help
54 Support for NVIDIA Tegra T114 processor family, based on the
55 ARM CortexA15MP CPU
56
57 config ARCH_TEGRA_124_SOC
58 bool "Enable support for Tegra124 family"
59 select ARM_L1_CACHE_SHIFT_6
60 select HAVE_ARM_ARCH_TIMER
61 select PINCTRL_TEGRA124
62 select TEGRA_TIMER
63 help
64 Support for NVIDIA Tegra T124 processor family, based on the
65 ARM CortexA15MP CPU
66
67 endif
This page took 0.031413 seconds and 5 git commands to generate.