ftrace, sched: Add TRACE_FLAG_PREEMPT_RESCHED
[deliverable/linux.git] / arch / arm / mach-ux500 / board-mop500-sdi.c
1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8 #include <linux/kernel.h>
9 #include <linux/gpio.h>
10 #include <linux/amba/bus.h>
11 #include <linux/amba/mmci.h>
12 #include <linux/mmc/host.h>
13 #include <linux/platform_device.h>
14 #include <linux/platform_data/dma-ste-dma40.h>
15
16 #include <asm/mach-types.h>
17 #include "devices.h"
18
19 #include "db8500-regs.h"
20 #include "devices-db8500.h"
21 #include "board-mop500.h"
22 #include "ste-dma40-db8500.h"
23
24 /*
25 * v2 has a new version of this block that need to be forced, the number found
26 * in hardware is incorrect
27 */
28 #define U8500_SDI_V2_PERIPHID 0x10480180
29
30 /*
31 * SDI 0 (MicroSD slot)
32 */
33
34 #ifdef CONFIG_STE_DMA40
35 struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
36 .mode = STEDMA40_MODE_LOGICAL,
37 .dir = DMA_DEV_TO_MEM,
38 .dev_type = DB8500_DMA_DEV29_SD_MM0,
39 };
40
41 static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
42 .mode = STEDMA40_MODE_LOGICAL,
43 .dir = DMA_MEM_TO_DEV,
44 .dev_type = DB8500_DMA_DEV29_SD_MM0,
45 };
46 #endif
47
48 struct mmci_platform_data mop500_sdi0_data = {
49 .f_max = 100000000,
50 .capabilities = MMC_CAP_4_BIT_DATA |
51 MMC_CAP_SD_HIGHSPEED |
52 MMC_CAP_MMC_HIGHSPEED |
53 MMC_CAP_ERASE |
54 MMC_CAP_UHS_SDR12 |
55 MMC_CAP_UHS_SDR25,
56 .gpio_wp = -1,
57 .sigdir = MCI_ST_FBCLKEN |
58 MCI_ST_CMDDIREN |
59 MCI_ST_DATA0DIREN |
60 MCI_ST_DATA2DIREN,
61 #ifdef CONFIG_STE_DMA40
62 .dma_filter = stedma40_filter,
63 .dma_rx_param = &mop500_sdi0_dma_cfg_rx,
64 .dma_tx_param = &mop500_sdi0_dma_cfg_tx,
65 #endif
66 };
67
68 static void sdi0_configure(struct device *parent)
69 {
70 /* Add the device, force v2 to subrevision 1 */
71 db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
72 }
73
74 void mop500_sdi_tc35892_init(struct device *parent)
75 {
76 mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
77 sdi0_configure(parent);
78 }
79
80 /*
81 * SDI1 (SDIO WLAN)
82 */
83 #ifdef CONFIG_STE_DMA40
84 static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
85 .mode = STEDMA40_MODE_LOGICAL,
86 .dir = DMA_DEV_TO_MEM,
87 .dev_type = DB8500_DMA_DEV32_SD_MM1,
88 };
89
90 static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
91 .mode = STEDMA40_MODE_LOGICAL,
92 .dir = DMA_MEM_TO_DEV,
93 .dev_type = DB8500_DMA_DEV32_SD_MM1,
94 };
95 #endif
96
97 struct mmci_platform_data mop500_sdi1_data = {
98 .ocr_mask = MMC_VDD_29_30,
99 .f_max = 100000000,
100 .capabilities = MMC_CAP_4_BIT_DATA |
101 MMC_CAP_NONREMOVABLE,
102 .gpio_cd = -1,
103 .gpio_wp = -1,
104 #ifdef CONFIG_STE_DMA40
105 .dma_filter = stedma40_filter,
106 .dma_rx_param = &sdi1_dma_cfg_rx,
107 .dma_tx_param = &sdi1_dma_cfg_tx,
108 #endif
109 };
110
111 /*
112 * SDI 2 (POP eMMC, not on DB8500ed)
113 */
114
115 #ifdef CONFIG_STE_DMA40
116 struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
117 .mode = STEDMA40_MODE_LOGICAL,
118 .dir = DMA_DEV_TO_MEM,
119 .dev_type = DB8500_DMA_DEV28_SD_MM2,
120 };
121
122 static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
123 .mode = STEDMA40_MODE_LOGICAL,
124 .dir = DMA_MEM_TO_DEV,
125 .dev_type = DB8500_DMA_DEV28_SD_MM2,
126 };
127 #endif
128
129 struct mmci_platform_data mop500_sdi2_data = {
130 .ocr_mask = MMC_VDD_165_195,
131 .f_max = 100000000,
132 .capabilities = MMC_CAP_4_BIT_DATA |
133 MMC_CAP_8_BIT_DATA |
134 MMC_CAP_NONREMOVABLE |
135 MMC_CAP_MMC_HIGHSPEED |
136 MMC_CAP_ERASE |
137 MMC_CAP_CMD23,
138 .gpio_cd = -1,
139 .gpio_wp = -1,
140 #ifdef CONFIG_STE_DMA40
141 .dma_filter = stedma40_filter,
142 .dma_rx_param = &mop500_sdi2_dma_cfg_rx,
143 .dma_tx_param = &mop500_sdi2_dma_cfg_tx,
144 #endif
145 };
146
147 /*
148 * SDI 4 (on-board eMMC)
149 */
150
151 #ifdef CONFIG_STE_DMA40
152 struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
153 .mode = STEDMA40_MODE_LOGICAL,
154 .dir = DMA_DEV_TO_MEM,
155 .dev_type = DB8500_DMA_DEV42_SD_MM4,
156 };
157
158 static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
159 .mode = STEDMA40_MODE_LOGICAL,
160 .dir = DMA_MEM_TO_DEV,
161 .dev_type = DB8500_DMA_DEV42_SD_MM4,
162 };
163 #endif
164
165 struct mmci_platform_data mop500_sdi4_data = {
166 .f_max = 100000000,
167 .capabilities = MMC_CAP_4_BIT_DATA |
168 MMC_CAP_8_BIT_DATA |
169 MMC_CAP_NONREMOVABLE |
170 MMC_CAP_MMC_HIGHSPEED |
171 MMC_CAP_ERASE |
172 MMC_CAP_CMD23,
173 .gpio_cd = -1,
174 .gpio_wp = -1,
175 #ifdef CONFIG_STE_DMA40
176 .dma_filter = stedma40_filter,
177 .dma_rx_param = &mop500_sdi4_dma_cfg_rx,
178 .dma_tx_param = &mop500_sdi4_dma_cfg_tx,
179 #endif
180 };
181
182 void __init mop500_sdi_init(struct device *parent)
183 {
184 /* PoP:ed eMMC */
185 db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
186 /* On-board eMMC */
187 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
188
189 /*
190 * On boards with the TC35892 GPIO expander, sdi0 will finally
191 * be added when the TC35892 initializes and calls
192 * mop500_sdi_tc35892_init() above.
193 */
194 }
195
196 void __init snowball_sdi_init(struct device *parent)
197 {
198 /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
199 mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
200 /* On-board eMMC */
201 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
202 /* External Micro SD slot */
203 mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
204 mop500_sdi0_data.cd_invert = true;
205 sdi0_configure(parent);
206 }
207
208 void __init hrefv60_sdi_init(struct device *parent)
209 {
210 /* PoP:ed eMMC */
211 db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
212 /* On-board eMMC */
213 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
214 /* External Micro SD slot */
215 mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
216 sdi0_configure(parent);
217 /* WLAN SDIO channel */
218 db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
219 }
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