2 * arch/arm/plat-orion/mpp.c
4 * MPP functions for Marvell orion SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/mbus.h>
15 #include <linux/gpio.h>
16 #include <mach/hardware.h>
17 #include <plat/orion-gpio.h>
20 /* Address of the ith MPP control register */
21 static __init
void __iomem
*mpp_ctrl_addr(unsigned int i
,
22 void __iomem
*dev_bus
)
24 return dev_bus
+ (i
) * 4;
28 void __init
orion_mpp_conf(unsigned int *mpp_list
, unsigned int variant_mask
,
29 unsigned int mpp_max
, void __iomem
*dev_bus
)
31 unsigned int mpp_nr_regs
= (1 + mpp_max
/8);
32 u32 mpp_ctrl
[mpp_nr_regs
];
35 printk(KERN_DEBUG
"initial MPP regs:");
36 for (i
= 0; i
< mpp_nr_regs
; i
++) {
37 mpp_ctrl
[i
] = readl(mpp_ctrl_addr(i
, dev_bus
));
38 printk(" %08x", mpp_ctrl
[i
]);
42 for ( ; *mpp_list
; mpp_list
++) {
43 unsigned int num
= MPP_NUM(*mpp_list
);
44 unsigned int sel
= MPP_SEL(*mpp_list
);
48 printk(KERN_ERR
"orion_mpp_conf: invalid MPP "
49 "number (%u)\n", num
);
52 if (variant_mask
&& !(*mpp_list
& variant_mask
)) {
54 "orion_mpp_conf: requested MPP%u config "
55 "unavailable on this hardware\n", num
);
59 shift
= (num
& 7) << 2;
60 mpp_ctrl
[num
/ 8] &= ~(0xf << shift
);
61 mpp_ctrl
[num
/ 8] |= sel
<< shift
;
64 if (*mpp_list
& MPP_INPUT_MASK
)
65 gpio_mode
|= GPIO_INPUT_OK
;
66 if (*mpp_list
& MPP_OUTPUT_MASK
)
67 gpio_mode
|= GPIO_OUTPUT_OK
;
69 orion_gpio_set_valid(num
, gpio_mode
);
72 printk(KERN_DEBUG
" final MPP regs:");
73 for (i
= 0; i
< mpp_nr_regs
; i
++) {
74 writel(mpp_ctrl
[i
], mpp_ctrl_addr(i
, dev_bus
));
75 printk(" %08x", mpp_ctrl
[i
]);
This page took 0.031381 seconds and 5 git commands to generate.