ARM: S5P64X0: Add Power Management support
[deliverable/linux.git] / arch / arm / plat-s3c24xx / devs.c
1 /* linux/arch/arm/plat-s3c24xx/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C24XX platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/dma-mapping.h>
26
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/irq.h>
30 #include <mach/fb.h>
31 #include <mach/hardware.h>
32 #include <mach/dma.h>
33 #include <mach/irqs.h>
34 #include <asm/irq.h>
35
36 #include <plat/regs-serial.h>
37 #include <plat/udc.h>
38 #include <plat/mci.h>
39
40 #include <plat/devs.h>
41 #include <plat/cpu.h>
42 #include <plat/regs-spi.h>
43 #include <plat/ts.h>
44
45 /* Serial port registrations */
46
47 static struct resource s3c2410_uart0_resource[] = {
48 [0] = {
49 .start = S3C2410_PA_UART0,
50 .end = S3C2410_PA_UART0 + 0x3fff,
51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
54 .start = IRQ_S3CUART_RX0,
55 .end = IRQ_S3CUART_ERR0,
56 .flags = IORESOURCE_IRQ,
57 }
58 };
59
60 static struct resource s3c2410_uart1_resource[] = {
61 [0] = {
62 .start = S3C2410_PA_UART1,
63 .end = S3C2410_PA_UART1 + 0x3fff,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = IRQ_S3CUART_RX1,
68 .end = IRQ_S3CUART_ERR1,
69 .flags = IORESOURCE_IRQ,
70 }
71 };
72
73 static struct resource s3c2410_uart2_resource[] = {
74 [0] = {
75 .start = S3C2410_PA_UART2,
76 .end = S3C2410_PA_UART2 + 0x3fff,
77 .flags = IORESOURCE_MEM,
78 },
79 [1] = {
80 .start = IRQ_S3CUART_RX2,
81 .end = IRQ_S3CUART_ERR2,
82 .flags = IORESOURCE_IRQ,
83 }
84 };
85
86 static struct resource s3c2410_uart3_resource[] = {
87 [0] = {
88 .start = S3C2443_PA_UART3,
89 .end = S3C2443_PA_UART3 + 0x3fff,
90 .flags = IORESOURCE_MEM,
91 },
92 [1] = {
93 .start = IRQ_S3CUART_RX3,
94 .end = IRQ_S3CUART_ERR3,
95 .flags = IORESOURCE_IRQ,
96 },
97 };
98
99 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
100 [0] = {
101 .resources = s3c2410_uart0_resource,
102 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
103 },
104 [1] = {
105 .resources = s3c2410_uart1_resource,
106 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
107 },
108 [2] = {
109 .resources = s3c2410_uart2_resource,
110 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
111 },
112 [3] = {
113 .resources = s3c2410_uart3_resource,
114 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
115 },
116 };
117
118 /* LCD Controller */
119
120 static struct resource s3c_lcd_resource[] = {
121 [0] = {
122 .start = S3C24XX_PA_LCD,
123 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
124 .flags = IORESOURCE_MEM,
125 },
126 [1] = {
127 .start = IRQ_LCD,
128 .end = IRQ_LCD,
129 .flags = IORESOURCE_IRQ,
130 }
131
132 };
133
134 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
135
136 struct platform_device s3c_device_lcd = {
137 .name = "s3c2410-lcd",
138 .id = -1,
139 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
140 .resource = s3c_lcd_resource,
141 .dev = {
142 .dma_mask = &s3c_device_lcd_dmamask,
143 .coherent_dma_mask = 0xffffffffUL
144 }
145 };
146
147 EXPORT_SYMBOL(s3c_device_lcd);
148
149 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
150 {
151 struct s3c2410fb_mach_info *npd;
152
153 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
154 if (npd) {
155 npd->displays = kmemdup(pd->displays,
156 sizeof(struct s3c2410fb_display) * npd->num_displays,
157 GFP_KERNEL);
158 if (!npd->displays)
159 printk(KERN_ERR "no memory for LCD display data\n");
160 } else {
161 printk(KERN_ERR "no memory for LCD platform data\n");
162 }
163 }
164
165 /* Touchscreen */
166
167 static struct resource s3c_ts_resource[] = {
168 [0] = {
169 .start = S3C24XX_PA_ADC,
170 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
171 .flags = IORESOURCE_MEM,
172 },
173 [1] = {
174 .start = IRQ_TC,
175 .end = IRQ_TC,
176 .flags = IORESOURCE_IRQ,
177 },
178
179 };
180
181 struct platform_device s3c_device_ts = {
182 .name = "s3c2410-ts",
183 .id = -1,
184 .dev.parent = &s3c_device_adc.dev,
185 .num_resources = ARRAY_SIZE(s3c_ts_resource),
186 .resource = s3c_ts_resource,
187 };
188 EXPORT_SYMBOL(s3c_device_ts);
189
190 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
191 {
192 s3c_set_platdata(hard_s3c2410ts_info,
193 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
194 }
195
196 /* USB Device (Gadget)*/
197
198 static struct resource s3c_usbgadget_resource[] = {
199 [0] = {
200 .start = S3C24XX_PA_USBDEV,
201 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = IRQ_USBD,
206 .end = IRQ_USBD,
207 .flags = IORESOURCE_IRQ,
208 }
209
210 };
211
212 struct platform_device s3c_device_usbgadget = {
213 .name = "s3c2410-usbgadget",
214 .id = -1,
215 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
216 .resource = s3c_usbgadget_resource,
217 };
218
219 EXPORT_SYMBOL(s3c_device_usbgadget);
220
221 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
222 {
223 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
224 }
225
226 /* USB High Speed 2.0 Device (Gadget) */
227 static struct resource s3c_hsudc_resource[] = {
228 [0] = {
229 .start = S3C2416_PA_HSUDC,
230 .end = S3C2416_PA_HSUDC + S3C2416_SZ_HSUDC - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = IRQ_USBD,
235 .end = IRQ_USBD,
236 .flags = IORESOURCE_IRQ,
237 }
238 };
239
240 static u64 s3c_hsudc_dmamask = DMA_BIT_MASK(32);
241
242 struct platform_device s3c_device_usb_hsudc = {
243 .name = "s3c-hsudc",
244 .id = -1,
245 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
246 .resource = s3c_hsudc_resource,
247 .dev = {
248 .dma_mask = &s3c_hsudc_dmamask,
249 .coherent_dma_mask = DMA_BIT_MASK(32),
250 },
251 };
252
253 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
254 {
255 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
256 }
257
258 /* IIS */
259
260 static struct resource s3c_iis_resource[] = {
261 [0] = {
262 .start = S3C24XX_PA_IIS,
263 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
264 .flags = IORESOURCE_MEM,
265 }
266 };
267
268 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
269
270 struct platform_device s3c_device_iis = {
271 .name = "s3c24xx-iis",
272 .id = -1,
273 .num_resources = ARRAY_SIZE(s3c_iis_resource),
274 .resource = s3c_iis_resource,
275 .dev = {
276 .dma_mask = &s3c_device_iis_dmamask,
277 .coherent_dma_mask = 0xffffffffUL
278 }
279 };
280
281 EXPORT_SYMBOL(s3c_device_iis);
282
283 /* RTC */
284
285 static struct resource s3c_rtc_resource[] = {
286 [0] = {
287 .start = S3C24XX_PA_RTC,
288 .end = S3C24XX_PA_RTC + 0xff,
289 .flags = IORESOURCE_MEM,
290 },
291 [1] = {
292 .start = IRQ_RTC,
293 .end = IRQ_RTC,
294 .flags = IORESOURCE_IRQ,
295 },
296 [2] = {
297 .start = IRQ_TICK,
298 .end = IRQ_TICK,
299 .flags = IORESOURCE_IRQ
300 }
301 };
302
303 struct platform_device s3c_device_rtc = {
304 .name = "s3c2410-rtc",
305 .id = -1,
306 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
307 .resource = s3c_rtc_resource,
308 };
309
310 EXPORT_SYMBOL(s3c_device_rtc);
311
312 /* ADC */
313
314 static struct resource s3c_adc_resource[] = {
315 [0] = {
316 .start = S3C24XX_PA_ADC,
317 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
318 .flags = IORESOURCE_MEM,
319 },
320 [1] = {
321 .start = IRQ_TC,
322 .end = IRQ_TC,
323 .flags = IORESOURCE_IRQ,
324 },
325 [2] = {
326 .start = IRQ_ADC,
327 .end = IRQ_ADC,
328 .flags = IORESOURCE_IRQ,
329 }
330
331 };
332
333 struct platform_device s3c_device_adc = {
334 .name = "s3c24xx-adc",
335 .id = -1,
336 .num_resources = ARRAY_SIZE(s3c_adc_resource),
337 .resource = s3c_adc_resource,
338 };
339
340 /* SDI */
341
342 static struct resource s3c_sdi_resource[] = {
343 [0] = {
344 .start = S3C24XX_PA_SDI,
345 .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
346 .flags = IORESOURCE_MEM,
347 },
348 [1] = {
349 .start = IRQ_SDI,
350 .end = IRQ_SDI,
351 .flags = IORESOURCE_IRQ,
352 }
353
354 };
355
356 struct platform_device s3c_device_sdi = {
357 .name = "s3c2410-sdi",
358 .id = -1,
359 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
360 .resource = s3c_sdi_resource,
361 };
362
363 EXPORT_SYMBOL(s3c_device_sdi);
364
365 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
366 {
367 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
368 &s3c_device_sdi);
369 }
370
371
372 /* SPI (0) */
373
374 static struct resource s3c_spi0_resource[] = {
375 [0] = {
376 .start = S3C24XX_PA_SPI,
377 .end = S3C24XX_PA_SPI + 0x1f,
378 .flags = IORESOURCE_MEM,
379 },
380 [1] = {
381 .start = IRQ_SPI0,
382 .end = IRQ_SPI0,
383 .flags = IORESOURCE_IRQ,
384 }
385
386 };
387
388 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
389
390 struct platform_device s3c_device_spi0 = {
391 .name = "s3c2410-spi",
392 .id = 0,
393 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
394 .resource = s3c_spi0_resource,
395 .dev = {
396 .dma_mask = &s3c_device_spi0_dmamask,
397 .coherent_dma_mask = 0xffffffffUL
398 }
399 };
400
401 EXPORT_SYMBOL(s3c_device_spi0);
402
403 /* SPI (1) */
404
405 static struct resource s3c_spi1_resource[] = {
406 [0] = {
407 .start = S3C24XX_PA_SPI + S3C2410_SPI1,
408 .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
409 .flags = IORESOURCE_MEM,
410 },
411 [1] = {
412 .start = IRQ_SPI1,
413 .end = IRQ_SPI1,
414 .flags = IORESOURCE_IRQ,
415 }
416
417 };
418
419 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
420
421 struct platform_device s3c_device_spi1 = {
422 .name = "s3c2410-spi",
423 .id = 1,
424 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
425 .resource = s3c_spi1_resource,
426 .dev = {
427 .dma_mask = &s3c_device_spi1_dmamask,
428 .coherent_dma_mask = 0xffffffffUL
429 }
430 };
431
432 EXPORT_SYMBOL(s3c_device_spi1);
433
434 #ifdef CONFIG_CPU_S3C2440
435
436 /* Camif Controller */
437
438 static struct resource s3c_camif_resource[] = {
439 [0] = {
440 .start = S3C2440_PA_CAMIF,
441 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
442 .flags = IORESOURCE_MEM,
443 },
444 [1] = {
445 .start = IRQ_CAM,
446 .end = IRQ_CAM,
447 .flags = IORESOURCE_IRQ,
448 }
449
450 };
451
452 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
453
454 struct platform_device s3c_device_camif = {
455 .name = "s3c2440-camif",
456 .id = -1,
457 .num_resources = ARRAY_SIZE(s3c_camif_resource),
458 .resource = s3c_camif_resource,
459 .dev = {
460 .dma_mask = &s3c_device_camif_dmamask,
461 .coherent_dma_mask = 0xffffffffUL
462 }
463 };
464
465 EXPORT_SYMBOL(s3c_device_camif);
466
467 /* AC97 */
468
469 static struct resource s3c_ac97_resource[] = {
470 [0] = {
471 .start = S3C2440_PA_AC97,
472 .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1,
473 .flags = IORESOURCE_MEM,
474 },
475 [1] = {
476 .start = IRQ_S3C244x_AC97,
477 .end = IRQ_S3C244x_AC97,
478 .flags = IORESOURCE_IRQ,
479 },
480 [2] = {
481 .name = "PCM out",
482 .start = DMACH_PCM_OUT,
483 .end = DMACH_PCM_OUT,
484 .flags = IORESOURCE_DMA,
485 },
486 [3] = {
487 .name = "PCM in",
488 .start = DMACH_PCM_IN,
489 .end = DMACH_PCM_IN,
490 .flags = IORESOURCE_DMA,
491 },
492 [4] = {
493 .name = "Mic in",
494 .start = DMACH_MIC_IN,
495 .end = DMACH_MIC_IN,
496 .flags = IORESOURCE_DMA,
497 },
498 };
499
500 static u64 s3c_device_audio_dmamask = 0xffffffffUL;
501
502 struct platform_device s3c_device_ac97 = {
503 .name = "samsung-ac97",
504 .id = -1,
505 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
506 .resource = s3c_ac97_resource,
507 .dev = {
508 .dma_mask = &s3c_device_audio_dmamask,
509 .coherent_dma_mask = 0xffffffffUL
510 }
511 };
512
513 EXPORT_SYMBOL(s3c_device_ac97);
514
515 /* ASoC I2S */
516
517 struct platform_device s3c2412_device_iis = {
518 .name = "s3c2412-iis",
519 .id = -1,
520 .dev = {
521 .dma_mask = &s3c_device_audio_dmamask,
522 .coherent_dma_mask = 0xffffffffUL
523 }
524 };
525
526 EXPORT_SYMBOL(s3c2412_device_iis);
527
528 #endif // CONFIG_CPU_S32440
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