1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
35 #include <asm/mach/arch.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/irq.h>
39 #include <mach/hardware.h>
41 #include <mach/irqs.h>
45 #include <plat/devs.h>
48 #include <plat/ehci.h>
50 #include <plat/fb-s3c2410.h>
51 #include <plat/hwmon.h>
53 #include <plat/keypad.h>
55 #include <plat/nand.h>
56 #include <plat/sdhci.h>
59 #include <plat/usb-control.h>
60 #include <plat/usb-phy.h>
61 #include <plat/regs-iic.h>
62 #include <plat/regs-serial.h>
63 #include <plat/regs-spi.h>
65 static u64 samsung_device_dma_mask
= DMA_BIT_MASK(32);
68 #ifdef CONFIG_CPU_S3C2440
69 static struct resource s3c_ac97_resource
[] = {
70 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97
, S3C2440_SZ_AC97
),
71 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97
),
72 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT
, "PCM out"),
73 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN
, "PCM in"),
74 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN
, "Mic in"),
77 struct platform_device s3c_device_ac97
= {
78 .name
= "samsung-ac97",
80 .num_resources
= ARRAY_SIZE(s3c_ac97_resource
),
81 .resource
= s3c_ac97_resource
,
83 .dma_mask
= &samsung_device_dma_mask
,
84 .coherent_dma_mask
= DMA_BIT_MASK(32),
87 #endif /* CONFIG_CPU_S3C2440 */
91 #ifdef CONFIG_PLAT_S3C24XX
92 static struct resource s3c_adc_resource
[] = {
93 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
94 [1] = DEFINE_RES_IRQ(IRQ_TC
),
95 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
98 struct platform_device s3c_device_adc
= {
99 .name
= "s3c24xx-adc",
101 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
102 .resource
= s3c_adc_resource
,
104 #endif /* CONFIG_PLAT_S3C24XX */
106 #if defined(CONFIG_SAMSUNG_DEV_ADC)
107 static struct resource s3c_adc_resource
[] = {
108 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
109 [1] = DEFINE_RES_IRQ(IRQ_TC
),
110 [2] = DEFINE_RES_IRQ(IRQ_ADC
),
113 struct platform_device s3c_device_adc
= {
114 .name
= "samsung-adc",
116 .num_resources
= ARRAY_SIZE(s3c_adc_resource
),
117 .resource
= s3c_adc_resource
,
119 #endif /* CONFIG_SAMSUNG_DEV_ADC */
121 /* Camif Controller */
123 #ifdef CONFIG_CPU_S3C2440
124 static struct resource s3c_camif_resource
[] = {
125 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF
, S3C2440_SZ_CAMIF
),
126 [1] = DEFINE_RES_IRQ(IRQ_CAM
),
129 struct platform_device s3c_device_camif
= {
130 .name
= "s3c2440-camif",
132 .num_resources
= ARRAY_SIZE(s3c_camif_resource
),
133 .resource
= s3c_camif_resource
,
135 .dma_mask
= &samsung_device_dma_mask
,
136 .coherent_dma_mask
= DMA_BIT_MASK(32),
139 #endif /* CONFIG_CPU_S3C2440 */
143 struct platform_device samsung_asoc_dma
= {
144 .name
= "samsung-audio",
147 .dma_mask
= &samsung_device_dma_mask
,
148 .coherent_dma_mask
= DMA_BIT_MASK(32),
152 struct platform_device samsung_asoc_idma
= {
153 .name
= "samsung-idma",
156 .dma_mask
= &samsung_device_dma_mask
,
157 .coherent_dma_mask
= DMA_BIT_MASK(32),
163 #ifdef CONFIG_S3C_DEV_FB
164 static struct resource s3c_fb_resource
[] = {
165 [0] = DEFINE_RES_MEM(S3C_PA_FB
, SZ_16K
),
166 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC
),
167 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO
),
168 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM
),
171 struct platform_device s3c_device_fb
= {
174 .num_resources
= ARRAY_SIZE(s3c_fb_resource
),
175 .resource
= s3c_fb_resource
,
177 .dma_mask
= &samsung_device_dma_mask
,
178 .coherent_dma_mask
= DMA_BIT_MASK(32),
182 void __init
s3c_fb_set_platdata(struct s3c_fb_platdata
*pd
)
184 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
187 #endif /* CONFIG_S3C_DEV_FB */
191 #ifdef CONFIG_S5P_DEV_FIMC0
192 static struct resource s5p_fimc0_resource
[] = {
193 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0
, SZ_4K
),
194 [1] = DEFINE_RES_IRQ(IRQ_FIMC0
),
197 struct platform_device s5p_device_fimc0
= {
200 .num_resources
= ARRAY_SIZE(s5p_fimc0_resource
),
201 .resource
= s5p_fimc0_resource
,
203 .dma_mask
= &samsung_device_dma_mask
,
204 .coherent_dma_mask
= DMA_BIT_MASK(32),
208 struct platform_device s5p_device_fimc_md
= {
209 .name
= "s5p-fimc-md",
212 #endif /* CONFIG_S5P_DEV_FIMC0 */
214 #ifdef CONFIG_S5P_DEV_FIMC1
215 static struct resource s5p_fimc1_resource
[] = {
216 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1
, SZ_4K
),
217 [1] = DEFINE_RES_IRQ(IRQ_FIMC1
),
220 struct platform_device s5p_device_fimc1
= {
223 .num_resources
= ARRAY_SIZE(s5p_fimc1_resource
),
224 .resource
= s5p_fimc1_resource
,
226 .dma_mask
= &samsung_device_dma_mask
,
227 .coherent_dma_mask
= DMA_BIT_MASK(32),
230 #endif /* CONFIG_S5P_DEV_FIMC1 */
232 #ifdef CONFIG_S5P_DEV_FIMC2
233 static struct resource s5p_fimc2_resource
[] = {
234 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2
, SZ_4K
),
235 [1] = DEFINE_RES_IRQ(IRQ_FIMC2
),
238 struct platform_device s5p_device_fimc2
= {
241 .num_resources
= ARRAY_SIZE(s5p_fimc2_resource
),
242 .resource
= s5p_fimc2_resource
,
244 .dma_mask
= &samsung_device_dma_mask
,
245 .coherent_dma_mask
= DMA_BIT_MASK(32),
248 #endif /* CONFIG_S5P_DEV_FIMC2 */
250 #ifdef CONFIG_S5P_DEV_FIMC3
251 static struct resource s5p_fimc3_resource
[] = {
252 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3
, SZ_4K
),
253 [1] = DEFINE_RES_IRQ(IRQ_FIMC3
),
256 struct platform_device s5p_device_fimc3
= {
259 .num_resources
= ARRAY_SIZE(s5p_fimc3_resource
),
260 .resource
= s5p_fimc3_resource
,
262 .dma_mask
= &samsung_device_dma_mask
,
263 .coherent_dma_mask
= DMA_BIT_MASK(32),
266 #endif /* CONFIG_S5P_DEV_FIMC3 */
270 #ifdef CONFIG_S5P_DEV_FIMD0
271 static struct resource s5p_fimd0_resource
[] = {
272 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0
, SZ_32K
),
273 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC
),
274 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO
),
275 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM
),
278 struct platform_device s5p_device_fimd0
= {
281 .num_resources
= ARRAY_SIZE(s5p_fimd0_resource
),
282 .resource
= s5p_fimd0_resource
,
284 .dma_mask
= &samsung_device_dma_mask
,
285 .coherent_dma_mask
= DMA_BIT_MASK(32),
289 void __init
s5p_fimd0_set_platdata(struct s3c_fb_platdata
*pd
)
291 s3c_set_platdata(pd
, sizeof(struct s3c_fb_platdata
),
294 #endif /* CONFIG_S5P_DEV_FIMD0 */
298 #ifdef CONFIG_S3C_DEV_HWMON
299 struct platform_device s3c_device_hwmon
= {
302 .dev
.parent
= &s3c_device_adc
.dev
,
305 void __init
s3c_hwmon_set_platdata(struct s3c_hwmon_pdata
*pd
)
307 s3c_set_platdata(pd
, sizeof(struct s3c_hwmon_pdata
),
310 #endif /* CONFIG_S3C_DEV_HWMON */
314 #ifdef CONFIG_S3C_DEV_HSMMC
315 static struct resource s3c_hsmmc_resource
[] = {
316 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0
, SZ_4K
),
317 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0
),
320 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata
= {
322 .host_caps
= (MMC_CAP_4_BIT_DATA
|
323 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
324 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
327 struct platform_device s3c_device_hsmmc0
= {
330 .num_resources
= ARRAY_SIZE(s3c_hsmmc_resource
),
331 .resource
= s3c_hsmmc_resource
,
333 .dma_mask
= &samsung_device_dma_mask
,
334 .coherent_dma_mask
= DMA_BIT_MASK(32),
335 .platform_data
= &s3c_hsmmc0_def_platdata
,
339 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata
*pd
)
341 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc0_def_platdata
);
343 #endif /* CONFIG_S3C_DEV_HSMMC */
345 #ifdef CONFIG_S3C_DEV_HSMMC1
346 static struct resource s3c_hsmmc1_resource
[] = {
347 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1
, SZ_4K
),
348 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1
),
351 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata
= {
353 .host_caps
= (MMC_CAP_4_BIT_DATA
|
354 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
355 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
358 struct platform_device s3c_device_hsmmc1
= {
361 .num_resources
= ARRAY_SIZE(s3c_hsmmc1_resource
),
362 .resource
= s3c_hsmmc1_resource
,
364 .dma_mask
= &samsung_device_dma_mask
,
365 .coherent_dma_mask
= DMA_BIT_MASK(32),
366 .platform_data
= &s3c_hsmmc1_def_platdata
,
370 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata
*pd
)
372 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc1_def_platdata
);
374 #endif /* CONFIG_S3C_DEV_HSMMC1 */
378 #ifdef CONFIG_S3C_DEV_HSMMC2
379 static struct resource s3c_hsmmc2_resource
[] = {
380 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2
, SZ_4K
),
381 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2
),
384 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata
= {
386 .host_caps
= (MMC_CAP_4_BIT_DATA
|
387 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
388 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
391 struct platform_device s3c_device_hsmmc2
= {
394 .num_resources
= ARRAY_SIZE(s3c_hsmmc2_resource
),
395 .resource
= s3c_hsmmc2_resource
,
397 .dma_mask
= &samsung_device_dma_mask
,
398 .coherent_dma_mask
= DMA_BIT_MASK(32),
399 .platform_data
= &s3c_hsmmc2_def_platdata
,
403 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata
*pd
)
405 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc2_def_platdata
);
407 #endif /* CONFIG_S3C_DEV_HSMMC2 */
409 #ifdef CONFIG_S3C_DEV_HSMMC3
410 static struct resource s3c_hsmmc3_resource
[] = {
411 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3
, SZ_4K
),
412 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3
),
415 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata
= {
417 .host_caps
= (MMC_CAP_4_BIT_DATA
|
418 MMC_CAP_MMC_HIGHSPEED
| MMC_CAP_SD_HIGHSPEED
),
419 .clk_type
= S3C_SDHCI_CLK_DIV_INTERNAL
,
422 struct platform_device s3c_device_hsmmc3
= {
425 .num_resources
= ARRAY_SIZE(s3c_hsmmc3_resource
),
426 .resource
= s3c_hsmmc3_resource
,
428 .dma_mask
= &samsung_device_dma_mask
,
429 .coherent_dma_mask
= DMA_BIT_MASK(32),
430 .platform_data
= &s3c_hsmmc3_def_platdata
,
434 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata
*pd
)
436 s3c_sdhci_set_platdata(pd
, &s3c_hsmmc3_def_platdata
);
438 #endif /* CONFIG_S3C_DEV_HSMMC3 */
442 static struct resource s3c_i2c0_resource
[] = {
443 [0] = DEFINE_RES_MEM(S3C_PA_IIC
, SZ_4K
),
444 [1] = DEFINE_RES_IRQ(IRQ_IIC
),
447 struct platform_device s3c_device_i2c0
= {
448 .name
= "s3c2410-i2c",
449 #ifdef CONFIG_S3C_DEV_I2C1
454 .num_resources
= ARRAY_SIZE(s3c_i2c0_resource
),
455 .resource
= s3c_i2c0_resource
,
458 struct s3c2410_platform_i2c default_i2c_data __initdata
= {
461 .frequency
= 100*1000,
465 void __init
s3c_i2c0_set_platdata(struct s3c2410_platform_i2c
*pd
)
467 struct s3c2410_platform_i2c
*npd
;
470 pd
= &default_i2c_data
;
472 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
476 npd
->cfg_gpio
= s3c_i2c0_cfg_gpio
;
479 #ifdef CONFIG_S3C_DEV_I2C1
480 static struct resource s3c_i2c1_resource
[] = {
481 [0] = DEFINE_RES_MEM(S3C_PA_IIC1
, SZ_4K
),
482 [1] = DEFINE_RES_IRQ(IRQ_IIC1
),
485 struct platform_device s3c_device_i2c1
= {
486 .name
= "s3c2410-i2c",
488 .num_resources
= ARRAY_SIZE(s3c_i2c1_resource
),
489 .resource
= s3c_i2c1_resource
,
492 void __init
s3c_i2c1_set_platdata(struct s3c2410_platform_i2c
*pd
)
494 struct s3c2410_platform_i2c
*npd
;
497 pd
= &default_i2c_data
;
501 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
505 npd
->cfg_gpio
= s3c_i2c1_cfg_gpio
;
507 #endif /* CONFIG_S3C_DEV_I2C1 */
509 #ifdef CONFIG_S3C_DEV_I2C2
510 static struct resource s3c_i2c2_resource
[] = {
511 [0] = DEFINE_RES_MEM(S3C_PA_IIC2
, SZ_4K
),
512 [1] = DEFINE_RES_IRQ(IRQ_IIC2
),
515 struct platform_device s3c_device_i2c2
= {
516 .name
= "s3c2410-i2c",
518 .num_resources
= ARRAY_SIZE(s3c_i2c2_resource
),
519 .resource
= s3c_i2c2_resource
,
522 void __init
s3c_i2c2_set_platdata(struct s3c2410_platform_i2c
*pd
)
524 struct s3c2410_platform_i2c
*npd
;
527 pd
= &default_i2c_data
;
531 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
535 npd
->cfg_gpio
= s3c_i2c2_cfg_gpio
;
537 #endif /* CONFIG_S3C_DEV_I2C2 */
539 #ifdef CONFIG_S3C_DEV_I2C3
540 static struct resource s3c_i2c3_resource
[] = {
541 [0] = DEFINE_RES_MEM(S3C_PA_IIC3
, SZ_4K
),
542 [1] = DEFINE_RES_IRQ(IRQ_IIC3
),
545 struct platform_device s3c_device_i2c3
= {
546 .name
= "s3c2440-i2c",
548 .num_resources
= ARRAY_SIZE(s3c_i2c3_resource
),
549 .resource
= s3c_i2c3_resource
,
552 void __init
s3c_i2c3_set_platdata(struct s3c2410_platform_i2c
*pd
)
554 struct s3c2410_platform_i2c
*npd
;
557 pd
= &default_i2c_data
;
561 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
565 npd
->cfg_gpio
= s3c_i2c3_cfg_gpio
;
567 #endif /*CONFIG_S3C_DEV_I2C3 */
569 #ifdef CONFIG_S3C_DEV_I2C4
570 static struct resource s3c_i2c4_resource
[] = {
571 [0] = DEFINE_RES_MEM(S3C_PA_IIC4
, SZ_4K
),
572 [1] = DEFINE_RES_IRQ(IRQ_IIC4
),
575 struct platform_device s3c_device_i2c4
= {
576 .name
= "s3c2440-i2c",
578 .num_resources
= ARRAY_SIZE(s3c_i2c4_resource
),
579 .resource
= s3c_i2c4_resource
,
582 void __init
s3c_i2c4_set_platdata(struct s3c2410_platform_i2c
*pd
)
584 struct s3c2410_platform_i2c
*npd
;
587 pd
= &default_i2c_data
;
591 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
595 npd
->cfg_gpio
= s3c_i2c4_cfg_gpio
;
597 #endif /*CONFIG_S3C_DEV_I2C4 */
599 #ifdef CONFIG_S3C_DEV_I2C5
600 static struct resource s3c_i2c5_resource
[] = {
601 [0] = DEFINE_RES_MEM(S3C_PA_IIC5
, SZ_4K
),
602 [1] = DEFINE_RES_IRQ(IRQ_IIC5
),
605 struct platform_device s3c_device_i2c5
= {
606 .name
= "s3c2440-i2c",
608 .num_resources
= ARRAY_SIZE(s3c_i2c5_resource
),
609 .resource
= s3c_i2c5_resource
,
612 void __init
s3c_i2c5_set_platdata(struct s3c2410_platform_i2c
*pd
)
614 struct s3c2410_platform_i2c
*npd
;
617 pd
= &default_i2c_data
;
621 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
625 npd
->cfg_gpio
= s3c_i2c5_cfg_gpio
;
627 #endif /*CONFIG_S3C_DEV_I2C5 */
629 #ifdef CONFIG_S3C_DEV_I2C6
630 static struct resource s3c_i2c6_resource
[] = {
631 [0] = DEFINE_RES_MEM(S3C_PA_IIC6
, SZ_4K
),
632 [1] = DEFINE_RES_IRQ(IRQ_IIC6
),
635 struct platform_device s3c_device_i2c6
= {
636 .name
= "s3c2440-i2c",
638 .num_resources
= ARRAY_SIZE(s3c_i2c6_resource
),
639 .resource
= s3c_i2c6_resource
,
642 void __init
s3c_i2c6_set_platdata(struct s3c2410_platform_i2c
*pd
)
644 struct s3c2410_platform_i2c
*npd
;
647 pd
= &default_i2c_data
;
651 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
655 npd
->cfg_gpio
= s3c_i2c6_cfg_gpio
;
657 #endif /* CONFIG_S3C_DEV_I2C6 */
659 #ifdef CONFIG_S3C_DEV_I2C7
660 static struct resource s3c_i2c7_resource
[] = {
661 [0] = DEFINE_RES_MEM(S3C_PA_IIC7
, SZ_4K
),
662 [1] = DEFINE_RES_IRQ(IRQ_IIC7
),
665 struct platform_device s3c_device_i2c7
= {
666 .name
= "s3c2440-i2c",
668 .num_resources
= ARRAY_SIZE(s3c_i2c7_resource
),
669 .resource
= s3c_i2c7_resource
,
672 void __init
s3c_i2c7_set_platdata(struct s3c2410_platform_i2c
*pd
)
674 struct s3c2410_platform_i2c
*npd
;
677 pd
= &default_i2c_data
;
681 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
685 npd
->cfg_gpio
= s3c_i2c7_cfg_gpio
;
687 #endif /* CONFIG_S3C_DEV_I2C7 */
691 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
692 static struct resource s5p_i2c_resource
[] = {
693 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY
, SZ_4K
),
694 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY
),
697 struct platform_device s5p_device_i2c_hdmiphy
= {
698 .name
= "s3c2440-hdmiphy-i2c",
700 .num_resources
= ARRAY_SIZE(s5p_i2c_resource
),
701 .resource
= s5p_i2c_resource
,
704 void __init
s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c
*pd
)
706 struct s3c2410_platform_i2c
*npd
;
709 pd
= &default_i2c_data
;
711 if (soc_is_exynos4210())
713 else if (soc_is_s5pv210())
719 npd
= s3c_set_platdata(pd
, sizeof(struct s3c2410_platform_i2c
),
720 &s5p_device_i2c_hdmiphy
);
722 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
726 #ifdef CONFIG_PLAT_S3C24XX
727 static struct resource s3c_iis_resource
[] = {
728 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS
, S3C24XX_SZ_IIS
),
731 struct platform_device s3c_device_iis
= {
732 .name
= "s3c24xx-iis",
734 .num_resources
= ARRAY_SIZE(s3c_iis_resource
),
735 .resource
= s3c_iis_resource
,
737 .dma_mask
= &samsung_device_dma_mask
,
738 .coherent_dma_mask
= DMA_BIT_MASK(32),
741 #endif /* CONFIG_PLAT_S3C24XX */
743 #ifdef CONFIG_CPU_S3C2440
744 struct platform_device s3c2412_device_iis
= {
745 .name
= "s3c2412-iis",
748 .dma_mask
= &samsung_device_dma_mask
,
749 .coherent_dma_mask
= DMA_BIT_MASK(32),
752 #endif /* CONFIG_CPU_S3C2440 */
756 #ifdef CONFIG_SAMSUNG_DEV_IDE
757 static struct resource s3c_cfcon_resource
[] = {
758 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON
, SZ_16K
),
759 [1] = DEFINE_RES_IRQ(IRQ_CFCON
),
762 struct platform_device s3c_device_cfcon
= {
764 .num_resources
= ARRAY_SIZE(s3c_cfcon_resource
),
765 .resource
= s3c_cfcon_resource
,
768 void s3c_ide_set_platdata(struct s3c_ide_platdata
*pdata
)
770 s3c_set_platdata(pdata
, sizeof(struct s3c_ide_platdata
),
773 #endif /* CONFIG_SAMSUNG_DEV_IDE */
777 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
778 static struct resource samsung_keypad_resources
[] = {
779 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD
, SZ_32
),
780 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD
),
783 struct platform_device samsung_device_keypad
= {
784 .name
= "samsung-keypad",
786 .num_resources
= ARRAY_SIZE(samsung_keypad_resources
),
787 .resource
= samsung_keypad_resources
,
790 void __init
samsung_keypad_set_platdata(struct samsung_keypad_platdata
*pd
)
792 struct samsung_keypad_platdata
*npd
;
794 npd
= s3c_set_platdata(pd
, sizeof(struct samsung_keypad_platdata
),
795 &samsung_device_keypad
);
798 npd
->cfg_gpio
= samsung_keypad_cfg_gpio
;
800 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
804 #ifdef CONFIG_PLAT_S3C24XX
805 static struct resource s3c_lcd_resource
[] = {
806 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD
, S3C24XX_SZ_LCD
),
807 [1] = DEFINE_RES_IRQ(IRQ_LCD
),
810 struct platform_device s3c_device_lcd
= {
811 .name
= "s3c2410-lcd",
813 .num_resources
= ARRAY_SIZE(s3c_lcd_resource
),
814 .resource
= s3c_lcd_resource
,
816 .dma_mask
= &samsung_device_dma_mask
,
817 .coherent_dma_mask
= DMA_BIT_MASK(32),
821 void __init
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info
*pd
)
823 struct s3c2410fb_mach_info
*npd
;
825 npd
= s3c_set_platdata(pd
, sizeof(*npd
), &s3c_device_lcd
);
827 npd
->displays
= kmemdup(pd
->displays
,
828 sizeof(struct s3c2410fb_display
) * npd
->num_displays
,
831 printk(KERN_ERR
"no memory for LCD display data\n");
833 printk(KERN_ERR
"no memory for LCD platform data\n");
836 #endif /* CONFIG_PLAT_S3C24XX */
840 #ifdef CONFIG_S5P_DEV_MFC
841 static struct resource s5p_mfc_resource
[] = {
842 [0] = DEFINE_RES_MEM(S5P_PA_MFC
, SZ_64K
),
843 [1] = DEFINE_RES_IRQ(IRQ_MFC
),
846 struct platform_device s5p_device_mfc
= {
849 .num_resources
= ARRAY_SIZE(s5p_mfc_resource
),
850 .resource
= s5p_mfc_resource
,
854 * MFC hardware has 2 memory interfaces which are modelled as two separate
855 * platform devices to let dma-mapping distinguish between them.
857 * MFC parent device (s5p_device_mfc) must be registered before memory
858 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
861 struct platform_device s5p_device_mfc_l
= {
865 .parent
= &s5p_device_mfc
.dev
,
866 .dma_mask
= &samsung_device_dma_mask
,
867 .coherent_dma_mask
= DMA_BIT_MASK(32),
871 struct platform_device s5p_device_mfc_r
= {
875 .parent
= &s5p_device_mfc
.dev
,
876 .dma_mask
= &samsung_device_dma_mask
,
877 .coherent_dma_mask
= DMA_BIT_MASK(32),
880 #endif /* CONFIG_S5P_DEV_MFC */
884 #ifdef CONFIG_S5P_DEV_CSIS0
885 static struct resource s5p_mipi_csis0_resource
[] = {
886 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0
, SZ_4K
),
887 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0
),
890 struct platform_device s5p_device_mipi_csis0
= {
891 .name
= "s5p-mipi-csis",
893 .num_resources
= ARRAY_SIZE(s5p_mipi_csis0_resource
),
894 .resource
= s5p_mipi_csis0_resource
,
896 #endif /* CONFIG_S5P_DEV_CSIS0 */
898 #ifdef CONFIG_S5P_DEV_CSIS1
899 static struct resource s5p_mipi_csis1_resource
[] = {
900 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1
, SZ_4K
),
901 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1
),
904 struct platform_device s5p_device_mipi_csis1
= {
905 .name
= "s5p-mipi-csis",
907 .num_resources
= ARRAY_SIZE(s5p_mipi_csis1_resource
),
908 .resource
= s5p_mipi_csis1_resource
,
914 #ifdef CONFIG_S3C_DEV_NAND
915 static struct resource s3c_nand_resource
[] = {
916 [0] = DEFINE_RES_MEM(S3C_PA_NAND
, SZ_1M
),
919 struct platform_device s3c_device_nand
= {
920 .name
= "s3c2410-nand",
922 .num_resources
= ARRAY_SIZE(s3c_nand_resource
),
923 .resource
= s3c_nand_resource
,
927 * s3c_nand_copy_set() - copy nand set data
928 * @set: The new structure, directly copied from the old.
930 * Copy all the fields from the NAND set field from what is probably __initdata
931 * to new kernel memory. The code returns 0 if the copy happened correctly or
932 * an error code for the calling function to display.
934 * Note, we currently do not try and look to see if we've already copied the
935 * data in a previous set.
937 static int __init
s3c_nand_copy_set(struct s3c2410_nand_set
*set
)
942 size
= sizeof(struct mtd_partition
) * set
->nr_partitions
;
944 ptr
= kmemdup(set
->partitions
, size
, GFP_KERNEL
);
945 set
->partitions
= ptr
;
951 if (set
->nr_map
&& set
->nr_chips
) {
952 size
= sizeof(int) * set
->nr_chips
;
953 ptr
= kmemdup(set
->nr_map
, size
, GFP_KERNEL
);
960 if (set
->ecc_layout
) {
961 ptr
= kmemdup(set
->ecc_layout
,
962 sizeof(struct nand_ecclayout
), GFP_KERNEL
);
963 set
->ecc_layout
= ptr
;
972 void __init
s3c_nand_set_platdata(struct s3c2410_platform_nand
*nand
)
974 struct s3c2410_platform_nand
*npd
;
978 /* note, if we get a failure in allocation, we simply drop out of the
979 * function. If there is so little memory available at initialisation
980 * time then there is little chance the system is going to run.
983 npd
= s3c_set_platdata(nand
, sizeof(struct s3c2410_platform_nand
),
988 /* now see if we need to copy any of the nand set data */
990 size
= sizeof(struct s3c2410_nand_set
) * npd
->nr_sets
;
992 struct s3c2410_nand_set
*from
= npd
->sets
;
993 struct s3c2410_nand_set
*to
;
996 to
= kmemdup(from
, size
, GFP_KERNEL
);
997 npd
->sets
= to
; /* set, even if we failed */
1000 printk(KERN_ERR
"%s: no memory for sets\n", __func__
);
1004 for (i
= 0; i
< npd
->nr_sets
; i
++) {
1005 ret
= s3c_nand_copy_set(to
);
1007 printk(KERN_ERR
"%s: failed to copy set %d\n",
1015 #endif /* CONFIG_S3C_DEV_NAND */
1019 #ifdef CONFIG_S3C_DEV_ONENAND
1020 static struct resource s3c_onenand_resources
[] = {
1021 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND
, SZ_1K
),
1022 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF
, S3C_SZ_ONENAND_BUF
),
1023 [2] = DEFINE_RES_IRQ(IRQ_ONENAND
),
1026 struct platform_device s3c_device_onenand
= {
1027 .name
= "samsung-onenand",
1029 .num_resources
= ARRAY_SIZE(s3c_onenand_resources
),
1030 .resource
= s3c_onenand_resources
,
1032 #endif /* CONFIG_S3C_DEV_ONENAND */
1034 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1035 static struct resource s3c64xx_onenand1_resources
[] = {
1036 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1
, SZ_1K
),
1037 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF
, S3C64XX_SZ_ONENAND1_BUF
),
1038 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1
),
1041 struct platform_device s3c64xx_device_onenand1
= {
1042 .name
= "samsung-onenand",
1044 .num_resources
= ARRAY_SIZE(s3c64xx_onenand1_resources
),
1045 .resource
= s3c64xx_onenand1_resources
,
1048 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data
*pdata
)
1050 s3c_set_platdata(pdata
, sizeof(struct onenand_platform_data
),
1051 &s3c64xx_device_onenand1
);
1053 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1055 #ifdef CONFIG_S5P_DEV_ONENAND
1056 static struct resource s5p_onenand_resources
[] = {
1057 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND
, SZ_128K
),
1058 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA
, SZ_8K
),
1059 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI
),
1062 struct platform_device s5p_device_onenand
= {
1063 .name
= "s5pc110-onenand",
1065 .num_resources
= ARRAY_SIZE(s5p_onenand_resources
),
1066 .resource
= s5p_onenand_resources
,
1068 #endif /* CONFIG_S5P_DEV_ONENAND */
1072 #ifdef CONFIG_PLAT_S5P
1073 static struct resource s5p_pmu_resource
[] = {
1074 DEFINE_RES_IRQ(IRQ_PMU
)
1077 struct platform_device s5p_device_pmu
= {
1079 .id
= ARM_PMU_DEVICE_CPU
,
1080 .num_resources
= ARRAY_SIZE(s5p_pmu_resource
),
1081 .resource
= s5p_pmu_resource
,
1084 static int __init
s5p_pmu_init(void)
1086 platform_device_register(&s5p_device_pmu
);
1089 arch_initcall(s5p_pmu_init
);
1090 #endif /* CONFIG_PLAT_S5P */
1094 #ifdef CONFIG_SAMSUNG_DEV_PWM
1096 #define TIMER_RESOURCE_SIZE (1)
1098 #define TIMER_RESOURCE(_tmr, _irq) \
1099 (struct resource [TIMER_RESOURCE_SIZE]) { \
1103 .flags = IORESOURCE_IRQ \
1107 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1108 .name = "s3c24xx-pwm", \
1110 .num_resources = TIMER_RESOURCE_SIZE, \
1111 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1114 * since we already have an static mapping for the timer,
1115 * we do not bother setting any IO resource for the base.
1118 struct platform_device s3c_device_timer
[] = {
1119 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0
) },
1120 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1
) },
1121 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2
) },
1122 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3
) },
1123 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4
) },
1125 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1129 #ifdef CONFIG_PLAT_S3C24XX
1130 static struct resource s3c_rtc_resource
[] = {
1131 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC
, SZ_256
),
1132 [1] = DEFINE_RES_IRQ(IRQ_RTC
),
1133 [2] = DEFINE_RES_IRQ(IRQ_TICK
),
1136 struct platform_device s3c_device_rtc
= {
1137 .name
= "s3c2410-rtc",
1139 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1140 .resource
= s3c_rtc_resource
,
1142 #endif /* CONFIG_PLAT_S3C24XX */
1144 #ifdef CONFIG_S3C_DEV_RTC
1145 static struct resource s3c_rtc_resource
[] = {
1146 [0] = DEFINE_RES_MEM(S3C_PA_RTC
, SZ_256
),
1147 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM
),
1148 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC
),
1151 struct platform_device s3c_device_rtc
= {
1152 .name
= "s3c64xx-rtc",
1154 .num_resources
= ARRAY_SIZE(s3c_rtc_resource
),
1155 .resource
= s3c_rtc_resource
,
1157 #endif /* CONFIG_S3C_DEV_RTC */
1161 #ifdef CONFIG_PLAT_S3C24XX
1162 static struct resource s3c_sdi_resource
[] = {
1163 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI
, S3C24XX_SZ_SDI
),
1164 [1] = DEFINE_RES_IRQ(IRQ_SDI
),
1167 struct platform_device s3c_device_sdi
= {
1168 .name
= "s3c2410-sdi",
1170 .num_resources
= ARRAY_SIZE(s3c_sdi_resource
),
1171 .resource
= s3c_sdi_resource
,
1174 void __init
s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata
*pdata
)
1176 s3c_set_platdata(pdata
, sizeof(struct s3c24xx_mci_pdata
),
1179 #endif /* CONFIG_PLAT_S3C24XX */
1183 #ifdef CONFIG_PLAT_S3C24XX
1184 static struct resource s3c_spi0_resource
[] = {
1185 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI
, SZ_32
),
1186 [1] = DEFINE_RES_IRQ(IRQ_SPI0
),
1189 struct platform_device s3c_device_spi0
= {
1190 .name
= "s3c2410-spi",
1192 .num_resources
= ARRAY_SIZE(s3c_spi0_resource
),
1193 .resource
= s3c_spi0_resource
,
1195 .dma_mask
= &samsung_device_dma_mask
,
1196 .coherent_dma_mask
= DMA_BIT_MASK(32),
1200 static struct resource s3c_spi1_resource
[] = {
1201 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1
, SZ_32
),
1202 [1] = DEFINE_RES_IRQ(IRQ_SPI1
),
1205 struct platform_device s3c_device_spi1
= {
1206 .name
= "s3c2410-spi",
1208 .num_resources
= ARRAY_SIZE(s3c_spi1_resource
),
1209 .resource
= s3c_spi1_resource
,
1211 .dma_mask
= &samsung_device_dma_mask
,
1212 .coherent_dma_mask
= DMA_BIT_MASK(32),
1215 #endif /* CONFIG_PLAT_S3C24XX */
1219 #ifdef CONFIG_PLAT_S3C24XX
1220 static struct resource s3c_ts_resource
[] = {
1221 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC
, S3C24XX_SZ_ADC
),
1222 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1225 struct platform_device s3c_device_ts
= {
1226 .name
= "s3c2410-ts",
1228 .dev
.parent
= &s3c_device_adc
.dev
,
1229 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1230 .resource
= s3c_ts_resource
,
1233 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*hard_s3c2410ts_info
)
1235 s3c_set_platdata(hard_s3c2410ts_info
,
1236 sizeof(struct s3c2410_ts_mach_info
), &s3c_device_ts
);
1238 #endif /* CONFIG_PLAT_S3C24XX */
1240 #ifdef CONFIG_SAMSUNG_DEV_TS
1241 static struct resource s3c_ts_resource
[] = {
1242 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC
, SZ_256
),
1243 [1] = DEFINE_RES_IRQ(IRQ_TC
),
1246 static struct s3c2410_ts_mach_info default_ts_data __initdata
= {
1249 .oversampling_shift
= 2,
1252 struct platform_device s3c_device_ts
= {
1253 .name
= "s3c64xx-ts",
1255 .num_resources
= ARRAY_SIZE(s3c_ts_resource
),
1256 .resource
= s3c_ts_resource
,
1259 void __init
s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info
*pd
)
1262 pd
= &default_ts_data
;
1264 s3c_set_platdata(pd
, sizeof(struct s3c2410_ts_mach_info
),
1267 #endif /* CONFIG_SAMSUNG_DEV_TS */
1271 #ifdef CONFIG_S5P_DEV_TV
1273 static struct resource s5p_hdmi_resources
[] = {
1274 [0] = DEFINE_RES_MEM(S5P_PA_HDMI
, SZ_1M
),
1275 [1] = DEFINE_RES_IRQ(IRQ_HDMI
),
1278 struct platform_device s5p_device_hdmi
= {
1281 .num_resources
= ARRAY_SIZE(s5p_hdmi_resources
),
1282 .resource
= s5p_hdmi_resources
,
1285 static struct resource s5p_sdo_resources
[] = {
1286 [0] = DEFINE_RES_MEM(S5P_PA_SDO
, SZ_64K
),
1287 [1] = DEFINE_RES_IRQ(IRQ_SDO
),
1290 struct platform_device s5p_device_sdo
= {
1293 .num_resources
= ARRAY_SIZE(s5p_sdo_resources
),
1294 .resource
= s5p_sdo_resources
,
1297 static struct resource s5p_mixer_resources
[] = {
1298 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER
, SZ_64K
, "mxr"),
1299 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP
, SZ_64K
, "vp"),
1300 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER
, "irq"),
1303 struct platform_device s5p_device_mixer
= {
1304 .name
= "s5p-mixer",
1306 .num_resources
= ARRAY_SIZE(s5p_mixer_resources
),
1307 .resource
= s5p_mixer_resources
,
1309 .dma_mask
= &samsung_device_dma_mask
,
1310 .coherent_dma_mask
= DMA_BIT_MASK(32),
1313 #endif /* CONFIG_S5P_DEV_TV */
1317 #ifdef CONFIG_S3C_DEV_USB_HOST
1318 static struct resource s3c_usb_resource
[] = {
1319 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST
, SZ_256
),
1320 [1] = DEFINE_RES_IRQ(IRQ_USBH
),
1323 struct platform_device s3c_device_ohci
= {
1324 .name
= "s3c2410-ohci",
1326 .num_resources
= ARRAY_SIZE(s3c_usb_resource
),
1327 .resource
= s3c_usb_resource
,
1329 .dma_mask
= &samsung_device_dma_mask
,
1330 .coherent_dma_mask
= DMA_BIT_MASK(32),
1335 * s3c_ohci_set_platdata - initialise OHCI device platform data
1336 * @info: The platform data.
1338 * This call copies the @info passed in and sets the device .platform_data
1339 * field to that copy. The @info is copied so that the original can be marked
1343 void __init
s3c_ohci_set_platdata(struct s3c2410_hcd_info
*info
)
1345 s3c_set_platdata(info
, sizeof(struct s3c2410_hcd_info
),
1348 #endif /* CONFIG_S3C_DEV_USB_HOST */
1350 /* USB Device (Gadget) */
1352 #ifdef CONFIG_PLAT_S3C24XX
1353 static struct resource s3c_usbgadget_resource
[] = {
1354 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV
, S3C24XX_SZ_USBDEV
),
1355 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1358 struct platform_device s3c_device_usbgadget
= {
1359 .name
= "s3c2410-usbgadget",
1361 .num_resources
= ARRAY_SIZE(s3c_usbgadget_resource
),
1362 .resource
= s3c_usbgadget_resource
,
1365 void __init
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info
*pd
)
1367 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usbgadget
);
1369 #endif /* CONFIG_PLAT_S3C24XX */
1371 /* USB EHCI Host Controller */
1373 #ifdef CONFIG_S5P_DEV_USB_EHCI
1374 static struct resource s5p_ehci_resource
[] = {
1375 [0] = DEFINE_RES_MEM(S5P_PA_EHCI
, SZ_256
),
1376 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST
),
1379 struct platform_device s5p_device_ehci
= {
1382 .num_resources
= ARRAY_SIZE(s5p_ehci_resource
),
1383 .resource
= s5p_ehci_resource
,
1385 .dma_mask
= &samsung_device_dma_mask
,
1386 .coherent_dma_mask
= DMA_BIT_MASK(32),
1390 void __init
s5p_ehci_set_platdata(struct s5p_ehci_platdata
*pd
)
1392 struct s5p_ehci_platdata
*npd
;
1394 npd
= s3c_set_platdata(pd
, sizeof(struct s5p_ehci_platdata
),
1398 npd
->phy_init
= s5p_usb_phy_init
;
1400 npd
->phy_exit
= s5p_usb_phy_exit
;
1402 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1406 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1407 static struct resource s3c_usb_hsotg_resources
[] = {
1408 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG
, SZ_16K
),
1409 [1] = DEFINE_RES_IRQ(IRQ_OTG
),
1412 struct platform_device s3c_device_usb_hsotg
= {
1413 .name
= "s3c-hsotg",
1415 .num_resources
= ARRAY_SIZE(s3c_usb_hsotg_resources
),
1416 .resource
= s3c_usb_hsotg_resources
,
1418 .dma_mask
= &samsung_device_dma_mask
,
1419 .coherent_dma_mask
= DMA_BIT_MASK(32),
1422 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1424 /* USB High Spped 2.0 Device (Gadget) */
1426 #ifdef CONFIG_PLAT_S3C24XX
1427 static struct resource s3c_hsudc_resource
[] = {
1428 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC
, S3C2416_SZ_HSUDC
),
1429 [1] = DEFINE_RES_IRQ(IRQ_USBD
),
1432 struct platform_device s3c_device_usb_hsudc
= {
1433 .name
= "s3c-hsudc",
1435 .num_resources
= ARRAY_SIZE(s3c_hsudc_resource
),
1436 .resource
= s3c_hsudc_resource
,
1438 .dma_mask
= &samsung_device_dma_mask
,
1439 .coherent_dma_mask
= DMA_BIT_MASK(32),
1443 void __init
s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata
*pd
)
1445 s3c_set_platdata(pd
, sizeof(*pd
), &s3c_device_usb_hsudc
);
1447 #endif /* CONFIG_PLAT_S3C24XX */
1451 #ifdef CONFIG_S3C_DEV_WDT
1452 static struct resource s3c_wdt_resource
[] = {
1453 [0] = DEFINE_RES_MEM(S3C_PA_WDT
, SZ_1K
),
1454 [1] = DEFINE_RES_IRQ(IRQ_WDT
),
1457 struct platform_device s3c_device_wdt
= {
1458 .name
= "s3c2410-wdt",
1460 .num_resources
= ARRAY_SIZE(s3c_wdt_resource
),
1461 .resource
= s3c_wdt_resource
,
1463 #endif /* CONFIG_S3C_DEV_WDT */