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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
1 /* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/fb.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
34
35 #include <media/s5p_hdmi.h>
36
37 #include <asm/irq.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41
42 #include <mach/hardware.h>
43 #include <mach/dma.h>
44 #include <mach/irqs.h>
45 #include <mach/map.h>
46
47 #include <plat/cpu.h>
48 #include <plat/devs.h>
49 #include <plat/adc.h>
50 #include <linux/platform_data/ata-samsung_cf.h>
51 #include <linux/platform_data/usb-ehci-s5p.h>
52 #include <plat/fb.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/sdhci.h>
61 #include <linux/platform_data/touchscreen-s3c2410.h>
62 #include <linux/platform_data/usb-s3c2410_udc.h>
63 #include <linux/platform_data/usb-ohci-s3c2410.h>
64 #include <plat/usb-phy.h>
65 #include <plat/regs-iic.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
69
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71
72 /* AC97 */
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
80 };
81
82 struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
84 .id = -1,
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
87 .dev = {
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
90 }
91 };
92 #endif /* CONFIG_CPU_S3C2440 */
93
94 /* ADC */
95
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
101 };
102
103 struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
105 .id = -1,
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
108 };
109 #endif /* CONFIG_PLAT_S3C24XX */
110
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
116 };
117
118 struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
120 .id = -1,
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
123 };
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
125
126 /* Camif Controller */
127
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
133 };
134
135 struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
140 .dev = {
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
143 }
144 };
145 #endif /* CONFIG_CPU_S3C2440 */
146
147 /* ASOC DMA */
148
149 struct platform_device samsung_asoc_idma = {
150 .name = "samsung-idma",
151 .id = -1,
152 .dev = {
153 .dma_mask = &samsung_device_dma_mask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
155 }
156 };
157
158 /* FB */
159
160 #ifdef CONFIG_S3C_DEV_FB
161 static struct resource s3c_fb_resource[] = {
162 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
163 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
164 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
165 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
166 };
167
168 struct platform_device s3c_device_fb = {
169 .name = "s3c-fb",
170 .id = -1,
171 .num_resources = ARRAY_SIZE(s3c_fb_resource),
172 .resource = s3c_fb_resource,
173 .dev = {
174 .dma_mask = &samsung_device_dma_mask,
175 .coherent_dma_mask = DMA_BIT_MASK(32),
176 },
177 };
178
179 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
180 {
181 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
182 &s3c_device_fb);
183 }
184 #endif /* CONFIG_S3C_DEV_FB */
185
186 /* FIMC */
187
188 #ifdef CONFIG_S5P_DEV_FIMC0
189 static struct resource s5p_fimc0_resource[] = {
190 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
191 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
192 };
193
194 struct platform_device s5p_device_fimc0 = {
195 .name = "s5p-fimc",
196 .id = 0,
197 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
198 .resource = s5p_fimc0_resource,
199 .dev = {
200 .dma_mask = &samsung_device_dma_mask,
201 .coherent_dma_mask = DMA_BIT_MASK(32),
202 },
203 };
204
205 struct platform_device s5p_device_fimc_md = {
206 .name = "s5p-fimc-md",
207 .id = -1,
208 };
209 #endif /* CONFIG_S5P_DEV_FIMC0 */
210
211 #ifdef CONFIG_S5P_DEV_FIMC1
212 static struct resource s5p_fimc1_resource[] = {
213 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
214 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
215 };
216
217 struct platform_device s5p_device_fimc1 = {
218 .name = "s5p-fimc",
219 .id = 1,
220 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
221 .resource = s5p_fimc1_resource,
222 .dev = {
223 .dma_mask = &samsung_device_dma_mask,
224 .coherent_dma_mask = DMA_BIT_MASK(32),
225 },
226 };
227 #endif /* CONFIG_S5P_DEV_FIMC1 */
228
229 #ifdef CONFIG_S5P_DEV_FIMC2
230 static struct resource s5p_fimc2_resource[] = {
231 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
232 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
233 };
234
235 struct platform_device s5p_device_fimc2 = {
236 .name = "s5p-fimc",
237 .id = 2,
238 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
239 .resource = s5p_fimc2_resource,
240 .dev = {
241 .dma_mask = &samsung_device_dma_mask,
242 .coherent_dma_mask = DMA_BIT_MASK(32),
243 },
244 };
245 #endif /* CONFIG_S5P_DEV_FIMC2 */
246
247 #ifdef CONFIG_S5P_DEV_FIMC3
248 static struct resource s5p_fimc3_resource[] = {
249 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
250 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
251 };
252
253 struct platform_device s5p_device_fimc3 = {
254 .name = "s5p-fimc",
255 .id = 3,
256 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
257 .resource = s5p_fimc3_resource,
258 .dev = {
259 .dma_mask = &samsung_device_dma_mask,
260 .coherent_dma_mask = DMA_BIT_MASK(32),
261 },
262 };
263 #endif /* CONFIG_S5P_DEV_FIMC3 */
264
265 /* G2D */
266
267 #ifdef CONFIG_S5P_DEV_G2D
268 static struct resource s5p_g2d_resource[] = {
269 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
270 [1] = DEFINE_RES_IRQ(IRQ_2D),
271 };
272
273 struct platform_device s5p_device_g2d = {
274 .name = "s5p-g2d",
275 .id = 0,
276 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
277 .resource = s5p_g2d_resource,
278 .dev = {
279 .dma_mask = &samsung_device_dma_mask,
280 .coherent_dma_mask = DMA_BIT_MASK(32),
281 },
282 };
283 #endif /* CONFIG_S5P_DEV_G2D */
284
285 #ifdef CONFIG_S5P_DEV_JPEG
286 static struct resource s5p_jpeg_resource[] = {
287 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
288 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
289 };
290
291 struct platform_device s5p_device_jpeg = {
292 .name = "s5p-jpeg",
293 .id = 0,
294 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
295 .resource = s5p_jpeg_resource,
296 .dev = {
297 .dma_mask = &samsung_device_dma_mask,
298 .coherent_dma_mask = DMA_BIT_MASK(32),
299 },
300 };
301 #endif /* CONFIG_S5P_DEV_JPEG */
302
303 /* FIMD0 */
304
305 #ifdef CONFIG_S5P_DEV_FIMD0
306 static struct resource s5p_fimd0_resource[] = {
307 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
308 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
309 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
310 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
311 };
312
313 struct platform_device s5p_device_fimd0 = {
314 .name = "s5p-fb",
315 .id = 0,
316 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
317 .resource = s5p_fimd0_resource,
318 .dev = {
319 .dma_mask = &samsung_device_dma_mask,
320 .coherent_dma_mask = DMA_BIT_MASK(32),
321 },
322 };
323
324 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
325 {
326 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
327 &s5p_device_fimd0);
328 }
329 #endif /* CONFIG_S5P_DEV_FIMD0 */
330
331 /* HWMON */
332
333 #ifdef CONFIG_S3C_DEV_HWMON
334 struct platform_device s3c_device_hwmon = {
335 .name = "s3c-hwmon",
336 .id = -1,
337 .dev.parent = &s3c_device_adc.dev,
338 };
339
340 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
341 {
342 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
343 &s3c_device_hwmon);
344 }
345 #endif /* CONFIG_S3C_DEV_HWMON */
346
347 /* HSMMC */
348
349 #ifdef CONFIG_S3C_DEV_HSMMC
350 static struct resource s3c_hsmmc_resource[] = {
351 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
352 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
353 };
354
355 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
356 .max_width = 4,
357 .host_caps = (MMC_CAP_4_BIT_DATA |
358 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
359 };
360
361 struct platform_device s3c_device_hsmmc0 = {
362 .name = "s3c-sdhci",
363 .id = 0,
364 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
365 .resource = s3c_hsmmc_resource,
366 .dev = {
367 .dma_mask = &samsung_device_dma_mask,
368 .coherent_dma_mask = DMA_BIT_MASK(32),
369 .platform_data = &s3c_hsmmc0_def_platdata,
370 },
371 };
372
373 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
374 {
375 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
376 }
377 #endif /* CONFIG_S3C_DEV_HSMMC */
378
379 #ifdef CONFIG_S3C_DEV_HSMMC1
380 static struct resource s3c_hsmmc1_resource[] = {
381 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
382 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
383 };
384
385 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
386 .max_width = 4,
387 .host_caps = (MMC_CAP_4_BIT_DATA |
388 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
389 };
390
391 struct platform_device s3c_device_hsmmc1 = {
392 .name = "s3c-sdhci",
393 .id = 1,
394 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
395 .resource = s3c_hsmmc1_resource,
396 .dev = {
397 .dma_mask = &samsung_device_dma_mask,
398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &s3c_hsmmc1_def_platdata,
400 },
401 };
402
403 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
404 {
405 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
406 }
407 #endif /* CONFIG_S3C_DEV_HSMMC1 */
408
409 /* HSMMC2 */
410
411 #ifdef CONFIG_S3C_DEV_HSMMC2
412 static struct resource s3c_hsmmc2_resource[] = {
413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
415 };
416
417 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
418 .max_width = 4,
419 .host_caps = (MMC_CAP_4_BIT_DATA |
420 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
421 };
422
423 struct platform_device s3c_device_hsmmc2 = {
424 .name = "s3c-sdhci",
425 .id = 2,
426 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
427 .resource = s3c_hsmmc2_resource,
428 .dev = {
429 .dma_mask = &samsung_device_dma_mask,
430 .coherent_dma_mask = DMA_BIT_MASK(32),
431 .platform_data = &s3c_hsmmc2_def_platdata,
432 },
433 };
434
435 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
436 {
437 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
438 }
439 #endif /* CONFIG_S3C_DEV_HSMMC2 */
440
441 #ifdef CONFIG_S3C_DEV_HSMMC3
442 static struct resource s3c_hsmmc3_resource[] = {
443 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
444 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
445 };
446
447 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
448 .max_width = 4,
449 .host_caps = (MMC_CAP_4_BIT_DATA |
450 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
451 };
452
453 struct platform_device s3c_device_hsmmc3 = {
454 .name = "s3c-sdhci",
455 .id = 3,
456 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
457 .resource = s3c_hsmmc3_resource,
458 .dev = {
459 .dma_mask = &samsung_device_dma_mask,
460 .coherent_dma_mask = DMA_BIT_MASK(32),
461 .platform_data = &s3c_hsmmc3_def_platdata,
462 },
463 };
464
465 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
466 {
467 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
468 }
469 #endif /* CONFIG_S3C_DEV_HSMMC3 */
470
471 /* I2C */
472
473 static struct resource s3c_i2c0_resource[] = {
474 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
475 [1] = DEFINE_RES_IRQ(IRQ_IIC),
476 };
477
478 struct platform_device s3c_device_i2c0 = {
479 .name = "s3c2410-i2c",
480 .id = 0,
481 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
482 .resource = s3c_i2c0_resource,
483 };
484
485 struct s3c2410_platform_i2c default_i2c_data __initdata = {
486 .flags = 0,
487 .slave_addr = 0x10,
488 .frequency = 100*1000,
489 .sda_delay = 100,
490 };
491
492 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
493 {
494 struct s3c2410_platform_i2c *npd;
495
496 if (!pd) {
497 pd = &default_i2c_data;
498 pd->bus_num = 0;
499 }
500
501 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
502 &s3c_device_i2c0);
503
504 if (!npd->cfg_gpio)
505 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
506 }
507
508 #ifdef CONFIG_S3C_DEV_I2C1
509 static struct resource s3c_i2c1_resource[] = {
510 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
511 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
512 };
513
514 struct platform_device s3c_device_i2c1 = {
515 .name = "s3c2410-i2c",
516 .id = 1,
517 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
518 .resource = s3c_i2c1_resource,
519 };
520
521 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
522 {
523 struct s3c2410_platform_i2c *npd;
524
525 if (!pd) {
526 pd = &default_i2c_data;
527 pd->bus_num = 1;
528 }
529
530 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
531 &s3c_device_i2c1);
532
533 if (!npd->cfg_gpio)
534 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
535 }
536 #endif /* CONFIG_S3C_DEV_I2C1 */
537
538 #ifdef CONFIG_S3C_DEV_I2C2
539 static struct resource s3c_i2c2_resource[] = {
540 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
541 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
542 };
543
544 struct platform_device s3c_device_i2c2 = {
545 .name = "s3c2410-i2c",
546 .id = 2,
547 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
548 .resource = s3c_i2c2_resource,
549 };
550
551 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
552 {
553 struct s3c2410_platform_i2c *npd;
554
555 if (!pd) {
556 pd = &default_i2c_data;
557 pd->bus_num = 2;
558 }
559
560 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
561 &s3c_device_i2c2);
562
563 if (!npd->cfg_gpio)
564 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
565 }
566 #endif /* CONFIG_S3C_DEV_I2C2 */
567
568 #ifdef CONFIG_S3C_DEV_I2C3
569 static struct resource s3c_i2c3_resource[] = {
570 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
571 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
572 };
573
574 struct platform_device s3c_device_i2c3 = {
575 .name = "s3c2440-i2c",
576 .id = 3,
577 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
578 .resource = s3c_i2c3_resource,
579 };
580
581 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
582 {
583 struct s3c2410_platform_i2c *npd;
584
585 if (!pd) {
586 pd = &default_i2c_data;
587 pd->bus_num = 3;
588 }
589
590 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
591 &s3c_device_i2c3);
592
593 if (!npd->cfg_gpio)
594 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
595 }
596 #endif /*CONFIG_S3C_DEV_I2C3 */
597
598 #ifdef CONFIG_S3C_DEV_I2C4
599 static struct resource s3c_i2c4_resource[] = {
600 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
601 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
602 };
603
604 struct platform_device s3c_device_i2c4 = {
605 .name = "s3c2440-i2c",
606 .id = 4,
607 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
608 .resource = s3c_i2c4_resource,
609 };
610
611 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
612 {
613 struct s3c2410_platform_i2c *npd;
614
615 if (!pd) {
616 pd = &default_i2c_data;
617 pd->bus_num = 4;
618 }
619
620 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
621 &s3c_device_i2c4);
622
623 if (!npd->cfg_gpio)
624 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
625 }
626 #endif /*CONFIG_S3C_DEV_I2C4 */
627
628 #ifdef CONFIG_S3C_DEV_I2C5
629 static struct resource s3c_i2c5_resource[] = {
630 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
631 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
632 };
633
634 struct platform_device s3c_device_i2c5 = {
635 .name = "s3c2440-i2c",
636 .id = 5,
637 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
638 .resource = s3c_i2c5_resource,
639 };
640
641 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
642 {
643 struct s3c2410_platform_i2c *npd;
644
645 if (!pd) {
646 pd = &default_i2c_data;
647 pd->bus_num = 5;
648 }
649
650 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
651 &s3c_device_i2c5);
652
653 if (!npd->cfg_gpio)
654 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
655 }
656 #endif /*CONFIG_S3C_DEV_I2C5 */
657
658 #ifdef CONFIG_S3C_DEV_I2C6
659 static struct resource s3c_i2c6_resource[] = {
660 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
661 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
662 };
663
664 struct platform_device s3c_device_i2c6 = {
665 .name = "s3c2440-i2c",
666 .id = 6,
667 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
668 .resource = s3c_i2c6_resource,
669 };
670
671 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
672 {
673 struct s3c2410_platform_i2c *npd;
674
675 if (!pd) {
676 pd = &default_i2c_data;
677 pd->bus_num = 6;
678 }
679
680 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
681 &s3c_device_i2c6);
682
683 if (!npd->cfg_gpio)
684 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
685 }
686 #endif /* CONFIG_S3C_DEV_I2C6 */
687
688 #ifdef CONFIG_S3C_DEV_I2C7
689 static struct resource s3c_i2c7_resource[] = {
690 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
691 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
692 };
693
694 struct platform_device s3c_device_i2c7 = {
695 .name = "s3c2440-i2c",
696 .id = 7,
697 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
698 .resource = s3c_i2c7_resource,
699 };
700
701 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
702 {
703 struct s3c2410_platform_i2c *npd;
704
705 if (!pd) {
706 pd = &default_i2c_data;
707 pd->bus_num = 7;
708 }
709
710 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
711 &s3c_device_i2c7);
712
713 if (!npd->cfg_gpio)
714 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
715 }
716 #endif /* CONFIG_S3C_DEV_I2C7 */
717
718 /* I2C HDMIPHY */
719
720 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
721 static struct resource s5p_i2c_resource[] = {
722 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
723 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
724 };
725
726 struct platform_device s5p_device_i2c_hdmiphy = {
727 .name = "s3c2440-hdmiphy-i2c",
728 .id = -1,
729 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
730 .resource = s5p_i2c_resource,
731 };
732
733 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
734 {
735 struct s3c2410_platform_i2c *npd;
736
737 if (!pd) {
738 pd = &default_i2c_data;
739
740 if (soc_is_exynos4210() ||
741 soc_is_exynos4212() || soc_is_exynos4412())
742 pd->bus_num = 8;
743 else if (soc_is_s5pv210())
744 pd->bus_num = 3;
745 else
746 pd->bus_num = 0;
747 }
748
749 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
750 &s5p_device_i2c_hdmiphy);
751 }
752
753 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
754
755 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
756 struct i2c_board_info *mhl_info, int mhl_bus)
757 {
758 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
759
760 if (soc_is_exynos4210() ||
761 soc_is_exynos4212() || soc_is_exynos4412())
762 pd->hdmiphy_bus = 8;
763 else if (soc_is_s5pv210())
764 pd->hdmiphy_bus = 3;
765 else
766 pd->hdmiphy_bus = 0;
767
768 pd->hdmiphy_info = hdmiphy_info;
769 pd->mhl_info = mhl_info;
770 pd->mhl_bus = mhl_bus;
771
772 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
773 &s5p_device_hdmi);
774 }
775
776 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
777
778 /* I2S */
779
780 #ifdef CONFIG_PLAT_S3C24XX
781 static struct resource s3c_iis_resource[] = {
782 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
783 };
784
785 struct platform_device s3c_device_iis = {
786 .name = "s3c24xx-iis",
787 .id = -1,
788 .num_resources = ARRAY_SIZE(s3c_iis_resource),
789 .resource = s3c_iis_resource,
790 .dev = {
791 .dma_mask = &samsung_device_dma_mask,
792 .coherent_dma_mask = DMA_BIT_MASK(32),
793 }
794 };
795 #endif /* CONFIG_PLAT_S3C24XX */
796
797 /* IDE CFCON */
798
799 #ifdef CONFIG_SAMSUNG_DEV_IDE
800 static struct resource s3c_cfcon_resource[] = {
801 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
802 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
803 };
804
805 struct platform_device s3c_device_cfcon = {
806 .id = 0,
807 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
808 .resource = s3c_cfcon_resource,
809 };
810
811 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
812 {
813 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
814 &s3c_device_cfcon);
815 }
816 #endif /* CONFIG_SAMSUNG_DEV_IDE */
817
818 /* KEYPAD */
819
820 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
821 static struct resource samsung_keypad_resources[] = {
822 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
823 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
824 };
825
826 struct platform_device samsung_device_keypad = {
827 .name = "samsung-keypad",
828 .id = -1,
829 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
830 .resource = samsung_keypad_resources,
831 };
832
833 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
834 {
835 struct samsung_keypad_platdata *npd;
836
837 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
838 &samsung_device_keypad);
839
840 if (!npd->cfg_gpio)
841 npd->cfg_gpio = samsung_keypad_cfg_gpio;
842 }
843 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
844
845 /* LCD Controller */
846
847 #ifdef CONFIG_PLAT_S3C24XX
848 static struct resource s3c_lcd_resource[] = {
849 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
850 [1] = DEFINE_RES_IRQ(IRQ_LCD),
851 };
852
853 struct platform_device s3c_device_lcd = {
854 .name = "s3c2410-lcd",
855 .id = -1,
856 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
857 .resource = s3c_lcd_resource,
858 .dev = {
859 .dma_mask = &samsung_device_dma_mask,
860 .coherent_dma_mask = DMA_BIT_MASK(32),
861 }
862 };
863
864 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
865 {
866 struct s3c2410fb_mach_info *npd;
867
868 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
869 if (npd) {
870 npd->displays = kmemdup(pd->displays,
871 sizeof(struct s3c2410fb_display) * npd->num_displays,
872 GFP_KERNEL);
873 if (!npd->displays)
874 printk(KERN_ERR "no memory for LCD display data\n");
875 } else {
876 printk(KERN_ERR "no memory for LCD platform data\n");
877 }
878 }
879 #endif /* CONFIG_PLAT_S3C24XX */
880
881 /* MFC */
882
883 #ifdef CONFIG_S5P_DEV_MFC
884 static struct resource s5p_mfc_resource[] = {
885 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
886 [1] = DEFINE_RES_IRQ(IRQ_MFC),
887 };
888
889 struct platform_device s5p_device_mfc = {
890 .name = "s5p-mfc",
891 .id = -1,
892 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
893 .resource = s5p_mfc_resource,
894 };
895
896 /*
897 * MFC hardware has 2 memory interfaces which are modelled as two separate
898 * platform devices to let dma-mapping distinguish between them.
899 *
900 * MFC parent device (s5p_device_mfc) must be registered before memory
901 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
902 */
903
904 struct platform_device s5p_device_mfc_l = {
905 .name = "s5p-mfc-l",
906 .id = -1,
907 .dev = {
908 .parent = &s5p_device_mfc.dev,
909 .dma_mask = &samsung_device_dma_mask,
910 .coherent_dma_mask = DMA_BIT_MASK(32),
911 },
912 };
913
914 struct platform_device s5p_device_mfc_r = {
915 .name = "s5p-mfc-r",
916 .id = -1,
917 .dev = {
918 .parent = &s5p_device_mfc.dev,
919 .dma_mask = &samsung_device_dma_mask,
920 .coherent_dma_mask = DMA_BIT_MASK(32),
921 },
922 };
923
924 #endif /* CONFIG_S5P_DEV_MFC */
925
926 /* MIPI CSIS */
927
928 #ifdef CONFIG_S5P_DEV_CSIS0
929 static struct resource s5p_mipi_csis0_resource[] = {
930 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
931 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
932 };
933
934 struct platform_device s5p_device_mipi_csis0 = {
935 .name = "s5p-mipi-csis",
936 .id = 0,
937 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
938 .resource = s5p_mipi_csis0_resource,
939 };
940 #endif /* CONFIG_S5P_DEV_CSIS0 */
941
942 #ifdef CONFIG_S5P_DEV_CSIS1
943 static struct resource s5p_mipi_csis1_resource[] = {
944 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
945 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
946 };
947
948 struct platform_device s5p_device_mipi_csis1 = {
949 .name = "s5p-mipi-csis",
950 .id = 1,
951 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
952 .resource = s5p_mipi_csis1_resource,
953 };
954 #endif
955
956 /* NAND */
957
958 #ifdef CONFIG_S3C_DEV_NAND
959 static struct resource s3c_nand_resource[] = {
960 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
961 };
962
963 struct platform_device s3c_device_nand = {
964 .name = "s3c2410-nand",
965 .id = -1,
966 .num_resources = ARRAY_SIZE(s3c_nand_resource),
967 .resource = s3c_nand_resource,
968 };
969
970 /*
971 * s3c_nand_copy_set() - copy nand set data
972 * @set: The new structure, directly copied from the old.
973 *
974 * Copy all the fields from the NAND set field from what is probably __initdata
975 * to new kernel memory. The code returns 0 if the copy happened correctly or
976 * an error code for the calling function to display.
977 *
978 * Note, we currently do not try and look to see if we've already copied the
979 * data in a previous set.
980 */
981 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
982 {
983 void *ptr;
984 int size;
985
986 size = sizeof(struct mtd_partition) * set->nr_partitions;
987 if (size) {
988 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
989 set->partitions = ptr;
990
991 if (!ptr)
992 return -ENOMEM;
993 }
994
995 if (set->nr_map && set->nr_chips) {
996 size = sizeof(int) * set->nr_chips;
997 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
998 set->nr_map = ptr;
999
1000 if (!ptr)
1001 return -ENOMEM;
1002 }
1003
1004 if (set->ecc_layout) {
1005 ptr = kmemdup(set->ecc_layout,
1006 sizeof(struct nand_ecclayout), GFP_KERNEL);
1007 set->ecc_layout = ptr;
1008
1009 if (!ptr)
1010 return -ENOMEM;
1011 }
1012
1013 return 0;
1014 }
1015
1016 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1017 {
1018 struct s3c2410_platform_nand *npd;
1019 int size;
1020 int ret;
1021
1022 /* note, if we get a failure in allocation, we simply drop out of the
1023 * function. If there is so little memory available at initialisation
1024 * time then there is little chance the system is going to run.
1025 */
1026
1027 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1028 &s3c_device_nand);
1029 if (!npd)
1030 return;
1031
1032 /* now see if we need to copy any of the nand set data */
1033
1034 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1035 if (size) {
1036 struct s3c2410_nand_set *from = npd->sets;
1037 struct s3c2410_nand_set *to;
1038 int i;
1039
1040 to = kmemdup(from, size, GFP_KERNEL);
1041 npd->sets = to; /* set, even if we failed */
1042
1043 if (!to) {
1044 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1045 return;
1046 }
1047
1048 for (i = 0; i < npd->nr_sets; i++) {
1049 ret = s3c_nand_copy_set(to);
1050 if (ret) {
1051 printk(KERN_ERR "%s: failed to copy set %d\n",
1052 __func__, i);
1053 return;
1054 }
1055 to++;
1056 }
1057 }
1058 }
1059 #endif /* CONFIG_S3C_DEV_NAND */
1060
1061 /* ONENAND */
1062
1063 #ifdef CONFIG_S3C_DEV_ONENAND
1064 static struct resource s3c_onenand_resources[] = {
1065 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1066 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1067 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1068 };
1069
1070 struct platform_device s3c_device_onenand = {
1071 .name = "samsung-onenand",
1072 .id = 0,
1073 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1074 .resource = s3c_onenand_resources,
1075 };
1076 #endif /* CONFIG_S3C_DEV_ONENAND */
1077
1078 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1079 static struct resource s3c64xx_onenand1_resources[] = {
1080 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1081 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1082 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1083 };
1084
1085 struct platform_device s3c64xx_device_onenand1 = {
1086 .name = "samsung-onenand",
1087 .id = 1,
1088 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1089 .resource = s3c64xx_onenand1_resources,
1090 };
1091
1092 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1093 {
1094 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1095 &s3c64xx_device_onenand1);
1096 }
1097 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1098
1099 #ifdef CONFIG_S5P_DEV_ONENAND
1100 static struct resource s5p_onenand_resources[] = {
1101 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1102 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1103 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1104 };
1105
1106 struct platform_device s5p_device_onenand = {
1107 .name = "s5pc110-onenand",
1108 .id = -1,
1109 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1110 .resource = s5p_onenand_resources,
1111 };
1112 #endif /* CONFIG_S5P_DEV_ONENAND */
1113
1114 /* PMU */
1115
1116 #ifdef CONFIG_PLAT_S5P
1117 static struct resource s5p_pmu_resource[] = {
1118 DEFINE_RES_IRQ(IRQ_PMU)
1119 };
1120
1121 static struct platform_device s5p_device_pmu = {
1122 .name = "arm-pmu",
1123 .id = -1,
1124 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1125 .resource = s5p_pmu_resource,
1126 };
1127
1128 static int __init s5p_pmu_init(void)
1129 {
1130 platform_device_register(&s5p_device_pmu);
1131 return 0;
1132 }
1133 arch_initcall(s5p_pmu_init);
1134 #endif /* CONFIG_PLAT_S5P */
1135
1136 /* PWM Timer */
1137
1138 #ifdef CONFIG_SAMSUNG_DEV_PWM
1139
1140 #define TIMER_RESOURCE_SIZE (1)
1141
1142 #define TIMER_RESOURCE(_tmr, _irq) \
1143 (struct resource [TIMER_RESOURCE_SIZE]) { \
1144 [0] = { \
1145 .start = _irq, \
1146 .end = _irq, \
1147 .flags = IORESOURCE_IRQ \
1148 } \
1149 }
1150
1151 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1152 .name = "s3c24xx-pwm", \
1153 .id = _tmr_no, \
1154 .num_resources = TIMER_RESOURCE_SIZE, \
1155 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1156
1157 /*
1158 * since we already have an static mapping for the timer,
1159 * we do not bother setting any IO resource for the base.
1160 */
1161
1162 struct platform_device s3c_device_timer[] = {
1163 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1164 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1165 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1166 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1167 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1168 };
1169 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1170
1171 /* RTC */
1172
1173 #ifdef CONFIG_PLAT_S3C24XX
1174 static struct resource s3c_rtc_resource[] = {
1175 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1176 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1177 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1178 };
1179
1180 struct platform_device s3c_device_rtc = {
1181 .name = "s3c2410-rtc",
1182 .id = -1,
1183 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1184 .resource = s3c_rtc_resource,
1185 };
1186 #endif /* CONFIG_PLAT_S3C24XX */
1187
1188 #ifdef CONFIG_S3C_DEV_RTC
1189 static struct resource s3c_rtc_resource[] = {
1190 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1191 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1192 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1193 };
1194
1195 struct platform_device s3c_device_rtc = {
1196 .name = "s3c64xx-rtc",
1197 .id = -1,
1198 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1199 .resource = s3c_rtc_resource,
1200 };
1201 #endif /* CONFIG_S3C_DEV_RTC */
1202
1203 /* SDI */
1204
1205 #ifdef CONFIG_PLAT_S3C24XX
1206 static struct resource s3c_sdi_resource[] = {
1207 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1208 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1209 };
1210
1211 struct platform_device s3c_device_sdi = {
1212 .name = "s3c2410-sdi",
1213 .id = -1,
1214 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1215 .resource = s3c_sdi_resource,
1216 };
1217
1218 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1219 {
1220 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1221 &s3c_device_sdi);
1222 }
1223 #endif /* CONFIG_PLAT_S3C24XX */
1224
1225 /* SPI */
1226
1227 #ifdef CONFIG_PLAT_S3C24XX
1228 static struct resource s3c_spi0_resource[] = {
1229 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1230 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1231 };
1232
1233 struct platform_device s3c_device_spi0 = {
1234 .name = "s3c2410-spi",
1235 .id = 0,
1236 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1237 .resource = s3c_spi0_resource,
1238 .dev = {
1239 .dma_mask = &samsung_device_dma_mask,
1240 .coherent_dma_mask = DMA_BIT_MASK(32),
1241 }
1242 };
1243
1244 static struct resource s3c_spi1_resource[] = {
1245 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1246 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1247 };
1248
1249 struct platform_device s3c_device_spi1 = {
1250 .name = "s3c2410-spi",
1251 .id = 1,
1252 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1253 .resource = s3c_spi1_resource,
1254 .dev = {
1255 .dma_mask = &samsung_device_dma_mask,
1256 .coherent_dma_mask = DMA_BIT_MASK(32),
1257 }
1258 };
1259 #endif /* CONFIG_PLAT_S3C24XX */
1260
1261 /* Touchscreen */
1262
1263 #ifdef CONFIG_PLAT_S3C24XX
1264 static struct resource s3c_ts_resource[] = {
1265 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1266 [1] = DEFINE_RES_IRQ(IRQ_TC),
1267 };
1268
1269 struct platform_device s3c_device_ts = {
1270 .name = "s3c2410-ts",
1271 .id = -1,
1272 .dev.parent = &s3c_device_adc.dev,
1273 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1274 .resource = s3c_ts_resource,
1275 };
1276
1277 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1278 {
1279 s3c_set_platdata(hard_s3c2410ts_info,
1280 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1281 }
1282 #endif /* CONFIG_PLAT_S3C24XX */
1283
1284 #ifdef CONFIG_SAMSUNG_DEV_TS
1285 static struct resource s3c_ts_resource[] = {
1286 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1287 [1] = DEFINE_RES_IRQ(IRQ_TC),
1288 };
1289
1290 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1291 .delay = 10000,
1292 .presc = 49,
1293 .oversampling_shift = 2,
1294 };
1295
1296 struct platform_device s3c_device_ts = {
1297 .name = "s3c64xx-ts",
1298 .id = -1,
1299 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1300 .resource = s3c_ts_resource,
1301 };
1302
1303 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1304 {
1305 if (!pd)
1306 pd = &default_ts_data;
1307
1308 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1309 &s3c_device_ts);
1310 }
1311 #endif /* CONFIG_SAMSUNG_DEV_TS */
1312
1313 /* TV */
1314
1315 #ifdef CONFIG_S5P_DEV_TV
1316
1317 static struct resource s5p_hdmi_resources[] = {
1318 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1319 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1320 };
1321
1322 struct platform_device s5p_device_hdmi = {
1323 .name = "s5p-hdmi",
1324 .id = -1,
1325 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1326 .resource = s5p_hdmi_resources,
1327 };
1328
1329 static struct resource s5p_sdo_resources[] = {
1330 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1331 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1332 };
1333
1334 struct platform_device s5p_device_sdo = {
1335 .name = "s5p-sdo",
1336 .id = -1,
1337 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1338 .resource = s5p_sdo_resources,
1339 };
1340
1341 static struct resource s5p_mixer_resources[] = {
1342 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1343 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1344 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1345 };
1346
1347 struct platform_device s5p_device_mixer = {
1348 .name = "s5p-mixer",
1349 .id = -1,
1350 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1351 .resource = s5p_mixer_resources,
1352 .dev = {
1353 .dma_mask = &samsung_device_dma_mask,
1354 .coherent_dma_mask = DMA_BIT_MASK(32),
1355 }
1356 };
1357 #endif /* CONFIG_S5P_DEV_TV */
1358
1359 /* USB */
1360
1361 #ifdef CONFIG_S3C_DEV_USB_HOST
1362 static struct resource s3c_usb_resource[] = {
1363 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1364 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1365 };
1366
1367 struct platform_device s3c_device_ohci = {
1368 .name = "s3c2410-ohci",
1369 .id = -1,
1370 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1371 .resource = s3c_usb_resource,
1372 .dev = {
1373 .dma_mask = &samsung_device_dma_mask,
1374 .coherent_dma_mask = DMA_BIT_MASK(32),
1375 }
1376 };
1377
1378 /*
1379 * s3c_ohci_set_platdata - initialise OHCI device platform data
1380 * @info: The platform data.
1381 *
1382 * This call copies the @info passed in and sets the device .platform_data
1383 * field to that copy. The @info is copied so that the original can be marked
1384 * __initdata.
1385 */
1386
1387 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1388 {
1389 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1390 &s3c_device_ohci);
1391 }
1392 #endif /* CONFIG_S3C_DEV_USB_HOST */
1393
1394 /* USB Device (Gadget) */
1395
1396 #ifdef CONFIG_PLAT_S3C24XX
1397 static struct resource s3c_usbgadget_resource[] = {
1398 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1399 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1400 };
1401
1402 struct platform_device s3c_device_usbgadget = {
1403 .name = "s3c2410-usbgadget",
1404 .id = -1,
1405 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1406 .resource = s3c_usbgadget_resource,
1407 };
1408
1409 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1410 {
1411 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1412 }
1413 #endif /* CONFIG_PLAT_S3C24XX */
1414
1415 /* USB EHCI Host Controller */
1416
1417 #ifdef CONFIG_S5P_DEV_USB_EHCI
1418 static struct resource s5p_ehci_resource[] = {
1419 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1420 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1421 };
1422
1423 struct platform_device s5p_device_ehci = {
1424 .name = "s5p-ehci",
1425 .id = -1,
1426 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1427 .resource = s5p_ehci_resource,
1428 .dev = {
1429 .dma_mask = &samsung_device_dma_mask,
1430 .coherent_dma_mask = DMA_BIT_MASK(32),
1431 }
1432 };
1433
1434 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1435 {
1436 struct s5p_ehci_platdata *npd;
1437
1438 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1439 &s5p_device_ehci);
1440
1441 if (!npd->phy_init)
1442 npd->phy_init = s5p_usb_phy_init;
1443 if (!npd->phy_exit)
1444 npd->phy_exit = s5p_usb_phy_exit;
1445 }
1446 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1447
1448 /* USB HSOTG */
1449
1450 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1451 static struct resource s3c_usb_hsotg_resources[] = {
1452 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1453 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1454 };
1455
1456 struct platform_device s3c_device_usb_hsotg = {
1457 .name = "s3c-hsotg",
1458 .id = -1,
1459 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1460 .resource = s3c_usb_hsotg_resources,
1461 .dev = {
1462 .dma_mask = &samsung_device_dma_mask,
1463 .coherent_dma_mask = DMA_BIT_MASK(32),
1464 },
1465 };
1466
1467 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1468 {
1469 struct s3c_hsotg_plat *npd;
1470
1471 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1472 &s3c_device_usb_hsotg);
1473
1474 if (!npd->phy_init)
1475 npd->phy_init = s5p_usb_phy_init;
1476 if (!npd->phy_exit)
1477 npd->phy_exit = s5p_usb_phy_exit;
1478 }
1479 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1480
1481 /* USB High Spped 2.0 Device (Gadget) */
1482
1483 #ifdef CONFIG_PLAT_S3C24XX
1484 static struct resource s3c_hsudc_resource[] = {
1485 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1486 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1487 };
1488
1489 struct platform_device s3c_device_usb_hsudc = {
1490 .name = "s3c-hsudc",
1491 .id = -1,
1492 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1493 .resource = s3c_hsudc_resource,
1494 .dev = {
1495 .dma_mask = &samsung_device_dma_mask,
1496 .coherent_dma_mask = DMA_BIT_MASK(32),
1497 },
1498 };
1499
1500 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1501 {
1502 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1503 }
1504 #endif /* CONFIG_PLAT_S3C24XX */
1505
1506 /* WDT */
1507
1508 #ifdef CONFIG_S3C_DEV_WDT
1509 static struct resource s3c_wdt_resource[] = {
1510 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1511 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1512 };
1513
1514 struct platform_device s3c_device_wdt = {
1515 .name = "s3c2410-wdt",
1516 .id = -1,
1517 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1518 .resource = s3c_wdt_resource,
1519 };
1520 #endif /* CONFIG_S3C_DEV_WDT */
1521
1522 #ifdef CONFIG_S3C64XX_DEV_SPI0
1523 static struct resource s3c64xx_spi0_resource[] = {
1524 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1525 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1526 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1527 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1528 };
1529
1530 struct platform_device s3c64xx_device_spi0 = {
1531 .name = "s3c6410-spi",
1532 .id = 0,
1533 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1534 .resource = s3c64xx_spi0_resource,
1535 .dev = {
1536 .dma_mask = &samsung_device_dma_mask,
1537 .coherent_dma_mask = DMA_BIT_MASK(32),
1538 },
1539 };
1540
1541 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1542 int num_cs)
1543 {
1544 struct s3c64xx_spi_info pd;
1545
1546 /* Reject invalid configuration */
1547 if (!num_cs || src_clk_nr < 0) {
1548 pr_err("%s: Invalid SPI configuration\n", __func__);
1549 return;
1550 }
1551
1552 pd.num_cs = num_cs;
1553 pd.src_clk_nr = src_clk_nr;
1554 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1555
1556 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1557 }
1558 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1559
1560 #ifdef CONFIG_S3C64XX_DEV_SPI1
1561 static struct resource s3c64xx_spi1_resource[] = {
1562 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1563 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1564 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1565 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1566 };
1567
1568 struct platform_device s3c64xx_device_spi1 = {
1569 .name = "s3c6410-spi",
1570 .id = 1,
1571 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1572 .resource = s3c64xx_spi1_resource,
1573 .dev = {
1574 .dma_mask = &samsung_device_dma_mask,
1575 .coherent_dma_mask = DMA_BIT_MASK(32),
1576 },
1577 };
1578
1579 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1580 int num_cs)
1581 {
1582 struct s3c64xx_spi_info pd;
1583
1584 /* Reject invalid configuration */
1585 if (!num_cs || src_clk_nr < 0) {
1586 pr_err("%s: Invalid SPI configuration\n", __func__);
1587 return;
1588 }
1589
1590 pd.num_cs = num_cs;
1591 pd.src_clk_nr = src_clk_nr;
1592 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1593
1594 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1595 }
1596 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1597
1598 #ifdef CONFIG_S3C64XX_DEV_SPI2
1599 static struct resource s3c64xx_spi2_resource[] = {
1600 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1601 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1602 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1603 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1604 };
1605
1606 struct platform_device s3c64xx_device_spi2 = {
1607 .name = "s3c6410-spi",
1608 .id = 2,
1609 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1610 .resource = s3c64xx_spi2_resource,
1611 .dev = {
1612 .dma_mask = &samsung_device_dma_mask,
1613 .coherent_dma_mask = DMA_BIT_MASK(32),
1614 },
1615 };
1616
1617 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1618 int num_cs)
1619 {
1620 struct s3c64xx_spi_info pd;
1621
1622 /* Reject invalid configuration */
1623 if (!num_cs || src_clk_nr < 0) {
1624 pr_err("%s: Invalid SPI configuration\n", __func__);
1625 return;
1626 }
1627
1628 pd.num_cs = num_cs;
1629 pd.src_clk_nr = src_clk_nr;
1630 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1631
1632 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1633 }
1634 #endif /* CONFIG_S3C64XX_DEV_SPI2 */
Linux kernel - Deliverables
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