1 /* linux/arch/arm/plat-s3c/gpio-config.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008-2010 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C series GPIO configuration core
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/gpio.h>
20 #include <plat/gpio-core.h>
21 #include <plat/gpio-cfg.h>
22 #include <plat/gpio-cfg-helpers.h>
24 int s3c_gpio_cfgpin(unsigned int pin
, unsigned int config
)
26 struct s3c_gpio_chip
*chip
= s3c_gpiolib_getchip(pin
);
34 offset
= pin
- chip
->chip
.base
;
36 s3c_gpio_lock(chip
, flags
);
37 ret
= s3c_gpio_do_setcfg(chip
, offset
, config
);
38 s3c_gpio_unlock(chip
, flags
);
42 EXPORT_SYMBOL(s3c_gpio_cfgpin
);
44 int s3c_gpio_cfgpin_range(unsigned int start
, unsigned int nr
,
49 for (; nr
> 0; nr
--, start
++) {
50 ret
= s3c_gpio_cfgpin(start
, cfg
);
57 EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range
);
59 int s3c_gpio_cfgall_range(unsigned int start
, unsigned int nr
,
60 unsigned int cfg
, s3c_gpio_pull_t pull
)
64 for (; nr
> 0; nr
--, start
++) {
65 s3c_gpio_setpull(start
, pull
);
66 ret
= s3c_gpio_cfgpin(start
, cfg
);
73 EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range
);
75 unsigned s3c_gpio_getcfg(unsigned int pin
)
77 struct s3c_gpio_chip
*chip
= s3c_gpiolib_getchip(pin
);
83 offset
= pin
- chip
->chip
.base
;
85 s3c_gpio_lock(chip
, flags
);
86 ret
= s3c_gpio_do_getcfg(chip
, offset
);
87 s3c_gpio_unlock(chip
, flags
);
92 EXPORT_SYMBOL(s3c_gpio_getcfg
);
95 int s3c_gpio_setpull(unsigned int pin
, s3c_gpio_pull_t pull
)
97 struct s3c_gpio_chip
*chip
= s3c_gpiolib_getchip(pin
);
104 offset
= pin
- chip
->chip
.base
;
106 s3c_gpio_lock(chip
, flags
);
107 ret
= s3c_gpio_do_setpull(chip
, offset
, pull
);
108 s3c_gpio_unlock(chip
, flags
);
112 EXPORT_SYMBOL(s3c_gpio_setpull
);
114 s3c_gpio_pull_t
s3c_gpio_getpull(unsigned int pin
)
116 struct s3c_gpio_chip
*chip
= s3c_gpiolib_getchip(pin
);
122 offset
= pin
- chip
->chip
.base
;
124 s3c_gpio_lock(chip
, flags
);
125 pup
= s3c_gpio_do_getpull(chip
, offset
);
126 s3c_gpio_unlock(chip
, flags
);
129 return (__force s3c_gpio_pull_t
)pup
;
131 EXPORT_SYMBOL(s3c_gpio_getpull
);
133 #ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
134 int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip
*chip
,
135 unsigned int off
, unsigned int cfg
)
137 void __iomem
*reg
= chip
->base
;
138 unsigned int shift
= off
;
141 if (s3c_gpio_is_cfg_special(cfg
)) {
144 /* Map output to 0, and SFN2 to 1 */
152 con
= __raw_readl(reg
);
153 con
&= ~(0x1 << shift
);
155 __raw_writel(con
, reg
);
160 unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip
*chip
,
165 con
= __raw_readl(chip
->base
);
170 return S3C_GPIO_SFN(con
);
173 int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip
*chip
,
174 unsigned int off
, unsigned int cfg
)
176 void __iomem
*reg
= chip
->base
;
177 unsigned int shift
= off
* 2;
180 if (s3c_gpio_is_cfg_special(cfg
)) {
188 con
= __raw_readl(reg
);
189 con
&= ~(0x3 << shift
);
191 __raw_writel(con
, reg
);
196 unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip
*chip
,
201 con
= __raw_readl(chip
->base
);
205 /* this conversion works for IN and OUT as well as special mode */
206 return S3C_GPIO_SPECIAL(con
);
210 #ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
211 int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip
*chip
,
212 unsigned int off
, unsigned int cfg
)
214 void __iomem
*reg
= chip
->base
;
215 unsigned int shift
= (off
& 7) * 4;
218 if (off
< 8 && chip
->chip
.ngpio
> 8)
221 if (s3c_gpio_is_cfg_special(cfg
)) {
226 con
= __raw_readl(reg
);
227 con
&= ~(0xf << shift
);
229 __raw_writel(con
, reg
);
234 unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip
*chip
,
237 void __iomem
*reg
= chip
->base
;
238 unsigned int shift
= (off
& 7) * 4;
241 if (off
< 8 && chip
->chip
.ngpio
> 8)
244 con
= __raw_readl(reg
);
248 /* this conversion works for IN and OUT as well as special mode */
249 return S3C_GPIO_SPECIAL(con
);
252 #endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
254 #ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
255 int s3c_gpio_setpull_updown(struct s3c_gpio_chip
*chip
,
256 unsigned int off
, s3c_gpio_pull_t pull
)
258 void __iomem
*reg
= chip
->base
+ 0x08;
262 pup
= __raw_readl(reg
);
263 pup
&= ~(3 << shift
);
264 pup
|= pull
<< shift
;
265 __raw_writel(pup
, reg
);
270 s3c_gpio_pull_t
s3c_gpio_getpull_updown(struct s3c_gpio_chip
*chip
,
273 void __iomem
*reg
= chip
->base
+ 0x08;
275 u32 pup
= __raw_readl(reg
);
279 return (__force s3c_gpio_pull_t
)pup
;
283 #ifdef CONFIG_S3C_GPIO_PULL_UP
284 int s3c_gpio_setpull_1up(struct s3c_gpio_chip
*chip
,
285 unsigned int off
, s3c_gpio_pull_t pull
)
287 void __iomem
*reg
= chip
->base
+ 0x08;
288 u32 pup
= __raw_readl(reg
);
290 pup
= __raw_readl(reg
);
292 if (pup
== S3C_GPIO_PULL_UP
)
294 else if (pup
== S3C_GPIO_PULL_NONE
)
299 __raw_writel(pup
, reg
);
303 s3c_gpio_pull_t
s3c_gpio_getpull_1up(struct s3c_gpio_chip
*chip
,
306 void __iomem
*reg
= chip
->base
+ 0x08;
307 u32 pup
= __raw_readl(reg
);
310 return pup
? S3C_GPIO_PULL_NONE
: S3C_GPIO_PULL_UP
;
312 #endif /* CONFIG_S3C_GPIO_PULL_UP */
314 #ifdef CONFIG_S5P_GPIO_DRVSTR
315 s5p_gpio_drvstr_t
s5p_gpio_get_drvstr(unsigned int pin
)
317 struct s3c_gpio_chip
*chip
= s3c_gpiolib_getchip(pin
);
326 off
= pin
- chip
->chip
.base
;
328 reg
= chip
->base
+ 0x0C;
330 drvstr
= __raw_readl(reg
);
331 drvstr
= drvstr
>> shift
;
334 return (__force s5p_gpio_drvstr_t
)drvstr
;
336 EXPORT_SYMBOL(s5p_gpio_get_drvstr
);
338 int s5p_gpio_set_drvstr(unsigned int pin
, s5p_gpio_drvstr_t drvstr
)
340 struct s3c_gpio_chip
*chip
= s3c_gpiolib_getchip(pin
);
349 off
= pin
- chip
->chip
.base
;
351 reg
= chip
->base
+ 0x0C;
353 tmp
= __raw_readl(reg
);
354 tmp
&= ~(0x3 << shift
);
355 tmp
|= drvstr
<< shift
;
357 __raw_writel(tmp
, reg
);
361 EXPORT_SYMBOL(s5p_gpio_set_drvstr
);
362 #endif /* CONFIG_S5P_GPIO_DRVSTR */