arch/arm64/Kconfig

   1 config ARM64
   2         def_bool y
   3         select ACPI_GENERIC_GSI if ACPI
   4         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAS_ELF_RANDOMIZE
   7         select ARCH_HAS_GCOV_PROFILE_ALL
   8         select ARCH_HAS_SG_CHAIN
   9         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  10         select ARCH_USE_CMPXCHG_LOCKREF
  11         select ARCH_SUPPORTS_ATOMIC_RMW
  12         select ARCH_WANT_OPTIONAL_GPIOLIB
  13         select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
  14         select ARCH_WANT_FRAME_POINTERS
  15         select ARM_AMBA
  16         select ARM_ARCH_TIMER
  17         select ARM_GIC
  18         select AUDIT_ARCH_COMPAT_GENERIC
  19         select ARM_GIC_V2M if PCI_MSI
  20         select ARM_GIC_V3
  21         select ARM_GIC_V3_ITS if PCI_MSI
  22         select BUILDTIME_EXTABLE_SORT
  23         select CLONE_BACKWARDS
  24         select COMMON_CLK
  25         select CPU_PM if (SUSPEND || CPU_IDLE)
  26         select DCACHE_WORD_ACCESS
  27         select GENERIC_ALLOCATOR
  28         select GENERIC_CLOCKEVENTS
  29         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  30         select GENERIC_CPU_AUTOPROBE
  31         select GENERIC_EARLY_IOREMAP
  32         select GENERIC_IRQ_PROBE
  33         select GENERIC_IRQ_SHOW
  34         select GENERIC_IRQ_SHOW_LEVEL
  35         select GENERIC_PCI_IOMAP
  36         select GENERIC_SCHED_CLOCK
  37         select GENERIC_SMP_IDLE_THREAD
  38         select GENERIC_STRNCPY_FROM_USER
  39         select GENERIC_STRNLEN_USER
  40         select GENERIC_TIME_VSYSCALL
  41         select HANDLE_DOMAIN_IRQ
  42         select HARDIRQS_SW_RESEND
  43         select HAVE_ALIGNED_STRUCT_PAGE if SLUB
  44         select HAVE_ARCH_AUDITSYSCALL
  45         select HAVE_ARCH_BITREVERSE
  46         select HAVE_ARCH_JUMP_LABEL
  47         select HAVE_ARCH_KGDB
  48         select HAVE_ARCH_SECCOMP_FILTER
  49         select HAVE_ARCH_TRACEHOOK
  50         select HAVE_BPF_JIT
  51         select HAVE_C_RECORDMCOUNT
  52         select HAVE_CC_STACKPROTECTOR
  53         select HAVE_CMPXCHG_DOUBLE
  54         select HAVE_DEBUG_BUGVERBOSE
  55         select HAVE_DEBUG_KMEMLEAK
  56         select HAVE_DMA_API_DEBUG
  57         select HAVE_DMA_ATTRS
  58         select HAVE_DMA_CONTIGUOUS
  59         select HAVE_DYNAMIC_FTRACE
  60         select HAVE_EFFICIENT_UNALIGNED_ACCESS
  61         select HAVE_FTRACE_MCOUNT_RECORD
  62         select HAVE_FUNCTION_TRACER
  63         select HAVE_FUNCTION_GRAPH_TRACER
  64         select HAVE_GENERIC_DMA_COHERENT
  65         select HAVE_HW_BREAKPOINT if PERF_EVENTS
  66         select HAVE_MEMBLOCK
  67         select HAVE_PATA_PLATFORM
  68         select HAVE_PERF_EVENTS
  69         select HAVE_PERF_REGS
  70         select HAVE_PERF_USER_STACK_DUMP
  71         select HAVE_RCU_TABLE_FREE
  72         select HAVE_SYSCALL_TRACEPOINTS
  73         select IRQ_DOMAIN
  74         select MODULES_USE_ELF_RELA
  75         select NO_BOOTMEM
  76         select OF
  77         select OF_EARLY_FLATTREE
  78         select OF_RESERVED_MEM
  79         select PERF_USE_VMALLOC
  80         select POWER_RESET
  81         select POWER_SUPPLY
  82         select RTC_LIB
  83         select SPARSE_IRQ
  84         select SYSCTL_EXCEPTION_TRACE
  85         select HAVE_CONTEXT_TRACKING
  86         help
  87           ARM 64-bit (AArch64) Linux support.
  88
  89 config 64BIT
  90         def_bool y
  91
  92 config ARCH_PHYS_ADDR_T_64BIT
  93         def_bool y
  94
  95 config MMU
  96         def_bool y
  97
  98 config NO_IOPORT_MAP
  99         def_bool y if !PCI
 100
 101 config STACKTRACE_SUPPORT
 102         def_bool y
 103
 104 config LOCKDEP_SUPPORT
 105         def_bool y
 106
 107 config TRACE_IRQFLAGS_SUPPORT
 108         def_bool y
 109
 110 config RWSEM_XCHGADD_ALGORITHM
 111         def_bool y
 112
 113 config GENERIC_HWEIGHT
 114         def_bool y
 115
 116 config GENERIC_CSUM
 117         def_bool y
 118
 119 config GENERIC_CALIBRATE_DELAY
 120         def_bool y
 121
 122 config ZONE_DMA
 123         def_bool y
 124
 125 config HAVE_GENERIC_RCU_GUP
 126         def_bool y
 127
 128 config ARCH_DMA_ADDR_T_64BIT
 129         def_bool y
 130
 131 config NEED_DMA_MAP_STATE
 132         def_bool y
 133
 134 config NEED_SG_DMA_LENGTH
 135         def_bool y
 136
 137 config SWIOTLB
 138         def_bool y
 139
 140 config IOMMU_HELPER
 141         def_bool SWIOTLB
 142
 143 config KERNEL_MODE_NEON
 144         def_bool y
 145
 146 config FIX_EARLYCON_MEM
 147         def_bool y
 148
 149 config PGTABLE_LEVELS
 150         int
 151         default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
 152         default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
 153         default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
 154         default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
 155
 156 source "init/Kconfig"
 157
 158 source "kernel/Kconfig.freezer"
 159
 160 menu "Platform selection"
 161
 162 config ARCH_EXYNOS
 163         bool
 164         help
 165           This enables support for Samsung Exynos SoC family
 166
 167 config ARCH_EXYNOS7
 168         bool "ARMv8 based Samsung Exynos7"
 169         select ARCH_EXYNOS
 170         select COMMON_CLK_SAMSUNG
 171         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 172         select HAVE_S3C_RTC if RTC_CLASS
 173         select PINCTRL
 174         select PINCTRL_EXYNOS
 175
 176         help
 177           This enables support for Samsung Exynos7 SoC family
 178
 179 config ARCH_FSL_LS2085A
 180         bool "Freescale LS2085A SOC"
 181         help
 182           This enables support for Freescale LS2085A SOC.
 183
 184 config ARCH_MEDIATEK
 185         bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
 186         select ARM_GIC
 187         select PINCTRL
 188         help
 189           Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
 190
 191 config ARCH_QCOM
 192         bool "Qualcomm Platforms"
 193         select PINCTRL
 194         help
 195           This enables support for the ARMv8 based Qualcomm chipsets.
 196
 197 config ARCH_SEATTLE
 198         bool "AMD Seattle SoC Family"
 199         help
 200           This enables support for AMD Seattle SOC Family
 201
 202 config ARCH_TEGRA
 203         bool "NVIDIA Tegra SoC Family"
 204         select ARCH_HAS_RESET_CONTROLLER
 205         select ARCH_REQUIRE_GPIOLIB
 206         select CLKDEV_LOOKUP
 207         select CLKSRC_MMIO
 208         select CLKSRC_OF
 209         select GENERIC_CLOCKEVENTS
 210         select HAVE_CLK
 211         select PINCTRL
 212         select RESET_CONTROLLER
 213         help
 214           This enables support for the NVIDIA Tegra SoC family.
 215
 216 config ARCH_TEGRA_132_SOC
 217         bool "NVIDIA Tegra132 SoC"
 218         depends on ARCH_TEGRA
 219         select PINCTRL_TEGRA124
 220         select USB_ULPI if USB_PHY
 221         select USB_ULPI_VIEWPORT if USB_PHY
 222         help
 223           Enable support for NVIDIA Tegra132 SoC, based on the Denver
 224           ARMv8 CPU.  The Tegra132 SoC is similar to the Tegra124 SoC,
 225           but contains an NVIDIA Denver CPU complex in place of
 226           Tegra124's "4+1" Cortex-A15 CPU complex.
 227
 228 config ARCH_SPRD
 229         bool "Spreadtrum SoC platform"
 230         help
 231           Support for Spreadtrum ARM based SoCs
 232
 233 config ARCH_THUNDER
 234         bool "Cavium Inc. Thunder SoC Family"
 235         help
 236           This enables support for Cavium's Thunder Family of SoCs.
 237
 238 config ARCH_VEXPRESS
 239         bool "ARMv8 software model (Versatile Express)"
 240         select ARCH_REQUIRE_GPIOLIB
 241         select COMMON_CLK_VERSATILE
 242         select POWER_RESET_VEXPRESS
 243         select VEXPRESS_CONFIG
 244         help
 245           This enables support for the ARMv8 software model (Versatile
 246           Express).
 247
 248 config ARCH_XGENE
 249         bool "AppliedMicro X-Gene SOC Family"
 250         help
 251           This enables support for AppliedMicro X-Gene SOC Family
 252
 253 config ARCH_ZYNQMP
 254         bool "Xilinx ZynqMP Family"
 255         help
 256           This enables support for Xilinx ZynqMP Family
 257
 258 endmenu
 259
 260 menu "Bus support"
 261
 262 config PCI
 263         bool "PCI support"
 264         help
 265           This feature enables support for PCI bus system. If you say Y
 266           here, the kernel will include drivers and infrastructure code
 267           to support PCI bus devices.
 268
 269 config PCI_DOMAINS
 270         def_bool PCI
 271
 272 config PCI_DOMAINS_GENERIC
 273         def_bool PCI
 274
 275 config PCI_SYSCALL
 276         def_bool PCI
 277
 278 source "drivers/pci/Kconfig"
 279 source "drivers/pci/pcie/Kconfig"
 280 source "drivers/pci/hotplug/Kconfig"
 281
 282 endmenu
 283
 284 menu "Kernel Features"
 285
 286 menu "ARM errata workarounds via the alternatives framework"
 287
 288 config ARM64_ERRATUM_826319
 289         bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
 290         default y
 291         help
 292           This option adds an alternative code sequence to work around ARM
 293           erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
 294           AXI master interface and an L2 cache.
 295
 296           If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
 297           and is unable to accept a certain write via this interface, it will
 298           not progress on read data presented on the read data channel and the
 299           system can deadlock.
 300
 301           The workaround promotes data cache clean instructions to
 302           data cache clean-and-invalidate.
 303           Please note that this does not necessarily enable the workaround,
 304           as it depends on the alternative framework, which will only patch
 305           the kernel if an affected CPU is detected.
 306
 307           If unsure, say Y.
 308
 309 config ARM64_ERRATUM_827319
 310         bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
 311         default y
 312         help
 313           This option adds an alternative code sequence to work around ARM
 314           erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
 315           master interface and an L2 cache.
 316
 317           Under certain conditions this erratum can cause a clean line eviction
 318           to occur at the same time as another transaction to the same address
 319           on the AMBA 5 CHI interface, which can cause data corruption if the
 320           interconnect reorders the two transactions.
 321
 322           The workaround promotes data cache clean instructions to
 323           data cache clean-and-invalidate.
 324           Please note that this does not necessarily enable the workaround,
 325           as it depends on the alternative framework, which will only patch
 326           the kernel if an affected CPU is detected.
 327
 328           If unsure, say Y.
 329
 330 config ARM64_ERRATUM_824069
 331         bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
 332         default y
 333         help
 334           This option adds an alternative code sequence to work around ARM
 335           erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
 336           to a coherent interconnect.
 337
 338           If a Cortex-A53 processor is executing a store or prefetch for
 339           write instruction at the same time as a processor in another
 340           cluster is executing a cache maintenance operation to the same
 341           address, then this erratum might cause a clean cache line to be
 342           incorrectly marked as dirty.
 343
 344           The workaround promotes data cache clean instructions to
 345           data cache clean-and-invalidate.
 346           Please note that this option does not necessarily enable the
 347           workaround, as it depends on the alternative framework, which will
 348           only patch the kernel if an affected CPU is detected.
 349
 350           If unsure, say Y.
 351
 352 config ARM64_ERRATUM_819472
 353         bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
 354         default y
 355         help
 356           This option adds an alternative code sequence to work around ARM
 357           erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
 358           present when it is connected to a coherent interconnect.
 359
 360           If the processor is executing a load and store exclusive sequence at
 361           the same time as a processor in another cluster is executing a cache
 362           maintenance operation to the same address, then this erratum might
 363           cause data corruption.
 364
 365           The workaround promotes data cache clean instructions to
 366           data cache clean-and-invalidate.
 367           Please note that this does not necessarily enable the workaround,
 368           as it depends on the alternative framework, which will only patch
 369           the kernel if an affected CPU is detected.
 370
 371           If unsure, say Y.
 372
 373 config ARM64_ERRATUM_832075
 374         bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
 375         default y
 376         help
 377           This option adds an alternative code sequence to work around ARM
 378           erratum 832075 on Cortex-A57 parts up to r1p2.
 379
 380           Affected Cortex-A57 parts might deadlock when exclusive load/store
 381           instructions to Write-Back memory are mixed with Device loads.
 382
 383           The workaround is to promote device loads to use Load-Acquire
 384           semantics.
 385           Please note that this does not necessarily enable the workaround,
 386           as it depends on the alternative framework, which will only patch
 387           the kernel if an affected CPU is detected.
 388
 389           If unsure, say Y.
 390
 391 config ARM64_ERRATUM_845719
 392         bool "Cortex-A53: 845719: a load might read incorrect data"
 393         depends on COMPAT
 394         default y
 395         help
 396           This option adds an alternative code sequence to work around ARM
 397           erratum 845719 on Cortex-A53 parts up to r0p4.
 398
 399           When running a compat (AArch32) userspace on an affected Cortex-A53
 400           part, a load at EL0 from a virtual address that matches the bottom 32
 401           bits of the virtual address used by a recent load at (AArch64) EL1
 402           might return incorrect data.
 403
 404           The workaround is to write the contextidr_el1 register on exception
 405           return to a 32-bit task.
 406           Please note that this does not necessarily enable the workaround,
 407           as it depends on the alternative framework, which will only patch
 408           the kernel if an affected CPU is detected.
 409
 410           If unsure, say Y.
 411
 412 endmenu
 413
 414
 415 choice
 416         prompt "Page size"
 417         default ARM64_4K_PAGES
 418         help
 419           Page size (translation granule) configuration.
 420
 421 config ARM64_4K_PAGES
 422         bool "4KB"
 423         help
 424           This feature enables 4KB pages support.
 425
 426 config ARM64_64K_PAGES
 427         bool "64KB"
 428         help
 429           This feature enables 64KB pages support (4KB by default)
 430           allowing only two levels of page tables and faster TLB
 431           look-up. AArch32 emulation is not available when this feature
 432           is enabled.
 433
 434 endchoice
 435
 436 choice
 437         prompt "Virtual address space size"
 438         default ARM64_VA_BITS_39 if ARM64_4K_PAGES
 439         default ARM64_VA_BITS_42 if ARM64_64K_PAGES
 440         help
 441           Allows choosing one of multiple possible virtual address
 442           space sizes. The level of translation table is determined by
 443           a combination of page size and virtual address space size.
 444
 445 config ARM64_VA_BITS_39
 446         bool "39-bit"
 447         depends on ARM64_4K_PAGES
 448
 449 config ARM64_VA_BITS_42
 450         bool "42-bit"
 451         depends on ARM64_64K_PAGES
 452
 453 config ARM64_VA_BITS_48
 454         bool "48-bit"
 455
 456 endchoice
 457
 458 config ARM64_VA_BITS
 459         int
 460         default 39 if ARM64_VA_BITS_39
 461         default 42 if ARM64_VA_BITS_42
 462         default 48 if ARM64_VA_BITS_48
 463
 464 config CPU_BIG_ENDIAN
 465        bool "Build big-endian kernel"
 466        help
 467          Say Y if you plan on running a kernel in big-endian mode.
 468
 469 config SMP
 470         bool "Symmetric Multi-Processing"
 471         help
 472           This enables support for systems with more than one CPU.  If
 473           you say N here, the kernel will run on single and
 474           multiprocessor machines, but will use only one CPU of a
 475           multiprocessor machine. If you say Y here, the kernel will run
 476           on many, but not all, single processor machines. On a single
 477           processor machine, the kernel will run faster if you say N
 478           here.
 479
 480           If you don't know what to do here, say N.
 481
 482 config SCHED_MC
 483         bool "Multi-core scheduler support"
 484         depends on SMP
 485         help
 486           Multi-core scheduler support improves the CPU scheduler's decision
 487           making when dealing with multi-core CPU chips at a cost of slightly
 488           increased overhead in some places. If unsure say N here.
 489
 490 config SCHED_SMT
 491         bool "SMT scheduler support"
 492         depends on SMP
 493         help
 494           Improves the CPU scheduler's decision making when dealing with
 495           MultiThreading at a cost of slightly increased overhead in some
 496           places. If unsure say N here.
 497
 498 config NR_CPUS
 499         int "Maximum number of CPUs (2-4096)"
 500         range 2 4096
 501         depends on SMP
 502         # These have to remain sorted largest to smallest
 503         default "64"
 504
 505 config HOTPLUG_CPU
 506         bool "Support for hot-pluggable CPUs"
 507         depends on SMP
 508         help
 509           Say Y here to experiment with turning CPUs off and on.  CPUs
 510           can be controlled through /sys/devices/system/cpu.
 511
 512 source kernel/Kconfig.preempt
 513
 514 config UP_LATE_INIT
 515        def_bool y
 516        depends on !SMP
 517
 518 config HZ
 519         int
 520         default 100
 521
 522 config ARCH_HAS_HOLES_MEMORYMODEL
 523         def_bool y if SPARSEMEM
 524
 525 config ARCH_SPARSEMEM_ENABLE
 526         def_bool y
 527         select SPARSEMEM_VMEMMAP_ENABLE
 528
 529 config ARCH_SPARSEMEM_DEFAULT
 530         def_bool ARCH_SPARSEMEM_ENABLE
 531
 532 config ARCH_SELECT_MEMORY_MODEL
 533         def_bool ARCH_SPARSEMEM_ENABLE
 534
 535 config HAVE_ARCH_PFN_VALID
 536         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 537
 538 config HW_PERF_EVENTS
 539         bool "Enable hardware performance counter support for perf events"
 540         depends on PERF_EVENTS
 541         default y
 542         help
 543           Enable hardware performance counter support for perf events. If
 544           disabled, perf events will use software events only.
 545
 546 config SYS_SUPPORTS_HUGETLBFS
 547         def_bool y
 548
 549 config ARCH_WANT_GENERAL_HUGETLB
 550         def_bool y
 551
 552 config ARCH_WANT_HUGE_PMD_SHARE
 553         def_bool y if !ARM64_64K_PAGES
 554
 555 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
 556         def_bool y
 557
 558 config ARCH_HAS_CACHE_LINE_SIZE
 559         def_bool y
 560
 561 source "mm/Kconfig"
 562
 563 config SECCOMP
 564         bool "Enable seccomp to safely compute untrusted bytecode"
 565         ---help---
 566           This kernel feature is useful for number crunching applications
 567           that may need to compute untrusted bytecode during their
 568           execution. By using pipes or other transports made available to
 569           the process as file descriptors supporting the read/write
 570           syscalls, it's possible to isolate those applications in
 571           their own address space using seccomp. Once seccomp is
 572           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
 573           and the task is only allowed to execute a few safe syscalls
 574           defined by each seccomp mode.
 575
 576 config XEN_DOM0
 577         def_bool y
 578         depends on XEN
 579
 580 config XEN
 581         bool "Xen guest support on ARM64"
 582         depends on ARM64 && OF
 583         select SWIOTLB_XEN
 584         help
 585           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
 586
 587 config FORCE_MAX_ZONEORDER
 588         int
 589         default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
 590         default "11"
 591
 592 menuconfig ARMV8_DEPRECATED
 593         bool "Emulate deprecated/obsolete ARMv8 instructions"
 594         depends on COMPAT
 595         help
 596           Legacy software support may require certain instructions
 597           that have been deprecated or obsoleted in the architecture.
 598
 599           Enable this config to enable selective emulation of these
 600           features.
 601
 602           If unsure, say Y
 603
 604 if ARMV8_DEPRECATED
 605
 606 config SWP_EMULATION
 607         bool "Emulate SWP/SWPB instructions"
 608         help
 609           ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
 610           they are always undefined. Say Y here to enable software
 611           emulation of these instructions for userspace using LDXR/STXR.
 612
 613           In some older versions of glibc [<=2.8] SWP is used during futex
 614           trylock() operations with the assumption that the code will not
 615           be preempted. This invalid assumption may be more likely to fail
 616           with SWP emulation enabled, leading to deadlock of the user
 617           application.
 618
 619           NOTE: when accessing uncached shared regions, LDXR/STXR rely
 620           on an external transaction monitoring block called a global
 621           monitor to maintain update atomicity. If your system does not
 622           implement a global monitor, this option can cause programs that
 623           perform SWP operations to uncached memory to deadlock.
 624
 625           If unsure, say Y
 626
 627 config CP15_BARRIER_EMULATION
 628         bool "Emulate CP15 Barrier instructions"
 629         help
 630           The CP15 barrier instructions - CP15ISB, CP15DSB, and
 631           CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
 632           strongly recommended to use the ISB, DSB, and DMB
 633           instructions instead.
 634
 635           Say Y here to enable software emulation of these
 636           instructions for AArch32 userspace code. When this option is
 637           enabled, CP15 barrier usage is traced which can help
 638           identify software that needs updating.
 639
 640           If unsure, say Y
 641
 642 config SETEND_EMULATION
 643         bool "Emulate SETEND instruction"
 644         help
 645           The SETEND instruction alters the data-endianness of the
 646           AArch32 EL0, and is deprecated in ARMv8.
 647
 648           Say Y here to enable software emulation of the instruction
 649           for AArch32 userspace code.
 650
 651           Note: All the cpus on the system must have mixed endian support at EL0
 652           for this feature to be enabled. If a new CPU - which doesn't support mixed
 653           endian - is hotplugged in after this feature has been enabled, there could
 654           be unexpected results in the applications.
 655
 656           If unsure, say Y
 657 endif
 658
 659 endmenu
 660
 661 menu "Boot options"
 662
 663 config CMDLINE
 664         string "Default kernel command string"
 665         default ""
 666         help
 667           Provide a set of default command-line options at build time by
 668           entering them here. As a minimum, you should specify the the
 669           root device (e.g. root=/dev/nfs).
 670
 671 config CMDLINE_FORCE
 672         bool "Always use the default kernel command string"
 673         help
 674           Always use the default kernel command string, even if the boot
 675           loader passes other arguments to the kernel.
 676           This is useful if you cannot or don't want to change the
 677           command-line options your boot loader passes to the kernel.
 678
 679 config EFI_STUB
 680         bool
 681
 682 config EFI
 683         bool "UEFI runtime support"
 684         depends on OF && !CPU_BIG_ENDIAN
 685         select LIBFDT
 686         select UCS2_STRING
 687         select EFI_PARAMS_FROM_FDT
 688         select EFI_RUNTIME_WRAPPERS
 689         select EFI_STUB
 690         select EFI_ARMSTUB
 691         default y
 692         help
 693           This option provides support for runtime services provided
 694           by UEFI firmware (such as non-volatile variables, realtime
 695           clock, and platform reset). A UEFI stub is also provided to
 696           allow the kernel to be booted as an EFI application. This
 697           is only useful on systems that have UEFI firmware.
 698
 699 config DMI
 700         bool "Enable support for SMBIOS (DMI) tables"
 701         depends on EFI
 702         default y
 703         help
 704           This enables SMBIOS/DMI feature for systems.
 705
 706           This option is only useful on systems that have UEFI firmware.
 707           However, even with this option, the resultant kernel should
 708           continue to boot on existing non-UEFI platforms.
 709
 710 endmenu
 711
 712 menu "Userspace binary formats"
 713
 714 source "fs/Kconfig.binfmt"
 715
 716 config COMPAT
 717         bool "Kernel support for 32-bit EL0"
 718         depends on !ARM64_64K_PAGES || EXPERT
 719         select COMPAT_BINFMT_ELF
 720         select HAVE_UID16
 721         select OLD_SIGSUSPEND3
 722         select COMPAT_OLD_SIGACTION
 723         help
 724           This option enables support for a 32-bit EL0 running under a 64-bit
 725           kernel at EL1. AArch32-specific components such as system calls,
 726           the user helper functions, VFP support and the ptrace interface are
 727           handled appropriately by the kernel.
 728
 729           If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
 730           will only be able to execute AArch32 binaries that were compiled with
 731           64k aligned segments.
 732
 733           If you want to execute 32-bit userspace applications, say Y.
 734
 735 config SYSVIPC_COMPAT
 736         def_bool y
 737         depends on COMPAT && SYSVIPC
 738
 739 endmenu
 740
 741 menu "Power management options"
 742
 743 source "kernel/power/Kconfig"
 744
 745 config ARCH_SUSPEND_POSSIBLE
 746         def_bool y
 747
 748 endmenu
 749
 750 menu "CPU Power Management"
 751
 752 source "drivers/cpuidle/Kconfig"
 753
 754 source "drivers/cpufreq/Kconfig"
 755
 756 endmenu
 757
 758 source "net/Kconfig"
 759
 760 source "drivers/Kconfig"
 761
 762 source "drivers/firmware/Kconfig"
 763
 764 source "drivers/acpi/Kconfig"
 765
 766 source "fs/Kconfig"
 767
 768 source "arch/arm64/kvm/Kconfig"
 769
 770 source "arch/arm64/Kconfig.debug"
 771
 772 source "security/Kconfig"
 773
 774 source "crypto/Kconfig"
 775 if CRYPTO
 776 source "arch/arm64/crypto/Kconfig"
 777 endif
 778
 779 source "lib/Kconfig"