2 * Copyright (c) 2016 Andreas Färber
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/gpio/gpio.h>
44 #include <dt-bindings/interrupt-controller/irq.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
47 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
48 #include <dt-bindings/clock/gxbb-clkc.h>
49 #include <dt-bindings/clock/gxbb-aoclkc.h>
50 #include <dt-bindings/reset/gxbb-aoclkc.h>
53 compatible = "amlogic,meson-gxbb";
54 interrupt-parent = <&gic>;
59 #address-cells = <0x2>;
64 compatible = "arm,cortex-a53", "arm,armv8";
66 enable-method = "psci";
71 compatible = "arm,cortex-a53", "arm,armv8";
73 enable-method = "psci";
78 compatible = "arm,cortex-a53", "arm,armv8";
80 enable-method = "psci";
85 compatible = "arm,cortex-a53", "arm,armv8";
87 enable-method = "psci";
92 compatible = "arm,cortex-a53-pmu";
93 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
94 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
95 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
96 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
97 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
101 compatible = "arm,psci-0.2";
107 compatible = "amlogic,meson-gxbb-sm";
112 compatible = "amlogic,meson-gxbb-efuse";
113 #address-cells = <1>;
120 eth_mac: eth_mac@34 {
130 compatible = "arm,armv8-timer";
131 interrupts = <GIC_PPI 13
132 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
134 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
136 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
138 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
142 compatible = "fixed-clock";
143 clock-frequency = <24000000>;
144 clock-output-names = "xtal";
149 compatible = "simple-bus";
150 #address-cells = <2>;
154 cbus: cbus@c1100000 {
155 compatible = "simple-bus";
156 reg = <0x0 0xc1100000 0x0 0x100000>;
157 #address-cells = <2>;
159 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
161 reset: reset-controller@4404 {
162 compatible = "amlogic,meson-gxbb-reset";
163 reg = <0x0 0x04404 0x0 0x20>;
167 uart_A: serial@84c0 {
168 compatible = "amlogic,meson-uart";
169 reg = <0x0 0x84c0 0x0 0x14>;
170 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
175 uart_B: serial@84dc {
176 compatible = "amlogic,meson-uart";
177 reg = <0x0 0x84dc 0x0 0x14>;
178 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
183 uart_C: serial@8700 {
184 compatible = "amlogic,meson-uart";
185 reg = <0x0 0x8700 0x0 0x14>;
186 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
192 compatible = "amlogic,meson-gxbb-wdt";
193 reg = <0x0 0x098d0 0x0 0x10>;
198 gic: interrupt-controller@c4301000 {
199 compatible = "arm,gic-400";
200 reg = <0x0 0xc4301000 0 0x1000>,
201 <0x0 0xc4302000 0 0x2000>,
202 <0x0 0xc4304000 0 0x2000>,
203 <0x0 0xc4306000 0 0x2000>;
204 interrupt-controller;
205 interrupts = <GIC_PPI 9
206 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
207 #interrupt-cells = <3>;
208 #address-cells = <0>;
211 aobus: aobus@c8100000 {
212 compatible = "simple-bus";
213 reg = <0x0 0xc8100000 0x0 0x100000>;
214 #address-cells = <2>;
216 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
218 pinctrl_aobus: pinctrl@14 {
219 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
220 #address-cells = <2>;
225 reg = <0x0 0x00014 0x0 0x8>,
226 <0x0 0x0002c 0x0 0x4>,
227 <0x0 0x00024 0x0 0x8>;
228 reg-names = "mux", "pull", "gpio";
233 uart_ao_a_pins: uart_ao_a {
235 groups = "uart_tx_ao_a", "uart_rx_ao_a";
236 function = "uart_ao";
240 remote_input_ao_pins: remote_input_ao {
242 groups = "remote_input_ao";
243 function = "remote_input_ao";
247 pwm_ao_a_3_pins: pwm_ao_a_3 {
249 groups = "pwm_ao_a_3";
250 function = "pwm_ao_a_3";
254 pwm_ao_a_6_pins: pwm_ao_a_6 {
256 groups = "pwm_ao_a_6";
257 function = "pwm_ao_a_6";
261 pwm_ao_a_12_pins: pwm_ao_a_12 {
263 groups = "pwm_ao_a_12";
264 function = "pwm_ao_a_12";
268 pwm_ao_b_pins: pwm_ao_b {
271 function = "pwm_ao_b";
276 clkc_AO: clock-controller@040 {
277 compatible = "amlogic,gxbb-aoclkc";
278 reg = <0x0 0x00040 0x0 0x4>;
283 uart_AO: serial@4c0 {
284 compatible = "amlogic,meson-uart";
285 reg = <0x0 0x004c0 0x0 0x14>;
286 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
292 compatible = "amlogic,meson-gxbb-ir";
293 reg = <0x0 0x00580 0x0 0x40>;
294 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
299 periphs: periphs@c8834000 {
300 compatible = "simple-bus";
301 reg = <0x0 0xc8834000 0x0 0x2000>;
302 #address-cells = <2>;
304 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
307 compatible = "amlogic,meson-rng";
308 reg = <0x0 0x0 0x0 0x4>;
311 pinctrl_periphs: pinctrl@4b0 {
312 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
313 #address-cells = <2>;
318 reg = <0x0 0x004b0 0x0 0x28>,
319 <0x0 0x004e8 0x0 0x14>,
320 <0x0 0x00120 0x0 0x14>,
321 <0x0 0x00430 0x0 0x40>;
322 reg-names = "mux", "pull", "pull-enable", "gpio";
329 groups = "emmc_nand_d07",
337 sdcard_pins: sdcard {
339 groups = "sdcard_d0",
349 uart_a_pins: uart_a {
351 groups = "uart_tx_a",
357 uart_b_pins: uart_b {
359 groups = "uart_tx_b",
365 uart_c_pins: uart_c {
367 groups = "uart_tx_c",
393 pwm_a_x_pins: pwm_a_x {
396 function = "pwm_a_x";
400 pwm_a_y_pins: pwm_a_y {
403 function = "pwm_a_y";
428 pwm_f_x_pins: pwm_f_x {
431 function = "pwm_f_x";
435 pwm_f_y_pins: pwm_f_y {
438 function = "pwm_f_y";
444 hiubus: hiubus@c883c000 {
445 compatible = "simple-bus";
446 reg = <0x0 0xc883c000 0x0 0x2000>;
447 #address-cells = <2>;
449 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
451 clkc: clock-controller@0 {
452 compatible = "amlogic,gxbb-clkc";
454 reg = <0x0 0x0 0x0 0x3db>;
459 compatible = "simple-bus";
460 reg = <0x0 0xd0000000 0x0 0x200000>;
461 #address-cells = <2>;
463 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
465 sd_emmc_a: mmc@70000 {
466 compatible = "amlogic,meson-gxbb-mmc";
467 reg = <0x0 0x70000 0x0 0x2000>;
468 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
469 clocks = <&clkc CLKID_SD_EMMC_A>,
471 <&clkc CLKID_FCLK_DIV2>;
472 clock-names = "core", "clkin0", "clkin1";
476 sd_emmc_b: mmc@72000 {
477 compatible = "amlogic,meson-gxbb-mmc";
478 reg = <0x0 0x72000 0x0 0x2000>;
479 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
480 clocks = <&clkc CLKID_SD_EMMC_B>,
482 <&clkc CLKID_FCLK_DIV2>;
483 clock-names = "core", "clkin0", "clkin1";
487 sd_emmc_c: mmc@74000 {
488 compatible = "amlogic,meson-gxbb-mmc";
489 reg = <0x0 0x74000 0x0 0x2000>;
490 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
491 clocks = <&clkc CLKID_SD_EMMC_C>,
493 <&clkc CLKID_FCLK_DIV2>;
494 clock-names = "core", "clkin0", "clkin1";
499 ethmac: ethernet@c9410000 {
500 compatible = "amlogic,meson6-dwmac", "snps,dwmac";
501 reg = <0x0 0xc9410000 0x0 0x10000
502 0x0 0xc8834540 0x0 0x4>;
503 interrupts = <0 8 1>;
504 interrupt-names = "macirq";
505 clocks = <&clkc CLKID_ETH>;
506 clock-names = "stmmaceth";