Merge branch 'stable-4.8' of git://git.infradead.org/users/pcmoore/audit
[deliverable/linux.git] / arch / arm64 / boot / dts / nvidia / tegra210-smaug.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mfd/max77620.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6
7 #include "tegra210.dtsi"
8
9 / {
10 model = "Google Pixel C";
11 compatible = "google,smaug-rev8", "google,smaug-rev7",
12 "google,smaug-rev6", "google,smaug-rev5",
13 "google,smaug-rev4", "google,smaug-rev3",
14 "google,smaug-rev1", "google,smaug", "nvidia,tegra210";
15
16 aliases {
17 serial0 = &uarta;
18 };
19
20 chosen {
21 bootargs = "earlycon";
22 stdout-path = "serial0:115200n8";
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x0 0x80000000 0x0 0xc0000000>;
28 };
29
30 pinmux: pinmux@700008d4 {
31 pinctrl-names = "boot";
32 pinctrl-0 = <&state_boot>;
33
34 state_boot: pinmux {
35 pex_l0_rst_n_pa0 {
36 nvidia,pins = "pex_l0_rst_n_pa0";
37 nvidia,function = "rsvd1";
38 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
39 nvidia,tristate = <TEGRA_PIN_ENABLE>;
40 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
41 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
42 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
43 };
44 pex_l0_clkreq_n_pa1 {
45 nvidia,pins = "pex_l0_clkreq_n_pa1";
46 nvidia,function = "rsvd1";
47 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
48 nvidia,tristate = <TEGRA_PIN_ENABLE>;
49 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
50 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
51 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
52 };
53 pex_wake_n_pa2 {
54 nvidia,pins = "pex_wake_n_pa2";
55 nvidia,function = "rsvd1";
56 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
57 nvidia,tristate = <TEGRA_PIN_ENABLE>;
58 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
59 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
60 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
61 };
62 pex_l1_rst_n_pa3 {
63 nvidia,pins = "pex_l1_rst_n_pa3";
64 nvidia,function = "rsvd1";
65 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
66 nvidia,tristate = <TEGRA_PIN_ENABLE>;
67 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
68 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
69 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
70 };
71 pex_l1_clkreq_n_pa4 {
72 nvidia,pins = "pex_l1_clkreq_n_pa4";
73 nvidia,function = "rsvd1";
74 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
75 nvidia,tristate = <TEGRA_PIN_ENABLE>;
76 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
77 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
78 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
79 };
80 sata_led_active_pa5 {
81 nvidia,pins = "sata_led_active_pa5";
82 nvidia,function = "rsvd1";
83 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
84 nvidia,tristate = <TEGRA_PIN_ENABLE>;
85 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
86 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
87 };
88 pa6 {
89 nvidia,pins = "pa6";
90 nvidia,function = "rsvd1";
91 nvidia,pull = <TEGRA_PIN_PULL_UP>;
92 nvidia,tristate = <TEGRA_PIN_DISABLE>;
93 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
95 };
96 dap1_fs_pb0 {
97 nvidia,pins = "dap1_fs_pb0";
98 nvidia,function = "i2s1";
99 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
101 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
102 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
103 };
104 dap1_din_pb1 {
105 nvidia,pins = "dap1_din_pb1";
106 nvidia,function = "i2s1";
107 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
108 nvidia,tristate = <TEGRA_PIN_DISABLE>;
109 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
110 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
111 };
112 dap1_dout_pb2 {
113 nvidia,pins = "dap1_dout_pb2";
114 nvidia,function = "i2s1";
115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
117 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
118 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
119 };
120 dap1_sclk_pb3 {
121 nvidia,pins = "dap1_sclk_pb3";
122 nvidia,function = "i2s1";
123 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
126 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
127 };
128 spi2_mosi_pb4 {
129 nvidia,pins = "spi2_mosi_pb4";
130 nvidia,pull = <TEGRA_PIN_PULL_UP>;
131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
132 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
133 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
134 };
135 spi2_miso_pb5 {
136 nvidia,pins = "spi2_miso_pb5";
137 nvidia,function = "rsvd2";
138 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
139 nvidia,tristate = <TEGRA_PIN_ENABLE>;
140 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
141 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
142 };
143 spi2_sck_pb6 {
144 nvidia,pins = "spi2_sck_pb6";
145 nvidia,function = "rsvd2";
146 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
147 nvidia,tristate = <TEGRA_PIN_ENABLE>;
148 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
149 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
150 };
151 spi2_cs0_pb7 {
152 nvidia,pins = "spi2_cs0_pb7";
153 nvidia,function = "rsvd2";
154 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
155 nvidia,tristate = <TEGRA_PIN_ENABLE>;
156 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
157 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
158 };
159 spi1_mosi_pc0 {
160 nvidia,pins = "spi1_mosi_pc0";
161 nvidia,function = "spi1";
162 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
163 nvidia,tristate = <TEGRA_PIN_DISABLE>;
164 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
165 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
166 };
167 spi1_miso_pc1 {
168 nvidia,pins = "spi1_miso_pc1";
169 nvidia,function = "spi1";
170 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
171 nvidia,tristate = <TEGRA_PIN_DISABLE>;
172 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
173 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
174 };
175 spi1_sck_pc2 {
176 nvidia,pins = "spi1_sck_pc2";
177 nvidia,function = "spi1";
178 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
179 nvidia,tristate = <TEGRA_PIN_DISABLE>;
180 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
181 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
182 };
183 spi1_cs0_pc3 {
184 nvidia,pins = "spi1_cs0_pc3";
185 nvidia,function = "spi1";
186 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
187 nvidia,tristate = <TEGRA_PIN_DISABLE>;
188 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
189 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
190 };
191 spi1_cs1_pc4 {
192 nvidia,pins = "spi1_cs1_pc4";
193 nvidia,function = "rsvd1";
194 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
195 nvidia,tristate = <TEGRA_PIN_ENABLE>;
196 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
197 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
198 };
199 spi4_sck_pc5 {
200 nvidia,pins = "spi4_sck_pc5";
201 nvidia,function = "rsvd1";
202 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
203 nvidia,tristate = <TEGRA_PIN_ENABLE>;
204 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
205 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
206 };
207 spi4_cs0_pc6 {
208 nvidia,pins = "spi4_cs0_pc6";
209 nvidia,function = "rsvd1";
210 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
211 nvidia,tristate = <TEGRA_PIN_ENABLE>;
212 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
213 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
214 };
215 spi4_mosi_pc7 {
216 nvidia,pins = "spi4_mosi_pc7";
217 nvidia,function = "rsvd1";
218 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
219 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
221 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
222 };
223 spi4_miso_pd0 {
224 nvidia,pins = "spi4_miso_pd0";
225 nvidia,function = "rsvd1";
226 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
227 nvidia,tristate = <TEGRA_PIN_ENABLE>;
228 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
229 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
230 };
231 uart3_tx_pd1 {
232 nvidia,pins = "uart3_tx_pd1";
233 nvidia,function = "uartc";
234 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235 nvidia,tristate = <TEGRA_PIN_DISABLE>;
236 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
237 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
238 };
239 uart3_rx_pd2 {
240 nvidia,pins = "uart3_rx_pd2";
241 nvidia,function = "uartc";
242 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
243 nvidia,tristate = <TEGRA_PIN_DISABLE>;
244 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
245 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
246 };
247 uart3_rts_pd3 {
248 nvidia,pins = "uart3_rts_pd3";
249 nvidia,function = "uartc";
250 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
251 nvidia,tristate = <TEGRA_PIN_DISABLE>;
252 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
253 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
254 };
255 uart3_cts_pd4 {
256 nvidia,pins = "uart3_cts_pd4";
257 nvidia,function = "uartc";
258 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
259 nvidia,tristate = <TEGRA_PIN_DISABLE>;
260 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
261 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
262 };
263 dmic1_clk_pe0 {
264 nvidia,pins = "dmic1_clk_pe0";
265 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
266 nvidia,tristate = <TEGRA_PIN_DISABLE>;
267 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
268 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
269 };
270 dmic1_dat_pe1 {
271 nvidia,pins = "dmic1_dat_pe1";
272 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
273 nvidia,tristate = <TEGRA_PIN_DISABLE>;
274 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
275 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
276 };
277 dmic2_clk_pe2 {
278 nvidia,pins = "dmic2_clk_pe2";
279 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
280 nvidia,tristate = <TEGRA_PIN_DISABLE>;
281 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
282 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
283 };
284 dmic2_dat_pe3 {
285 nvidia,pins = "dmic2_dat_pe3";
286 nvidia,pull = <TEGRA_PIN_PULL_UP>;
287 nvidia,tristate = <TEGRA_PIN_DISABLE>;
288 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
289 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
290 };
291 dmic3_clk_pe4 {
292 nvidia,pins = "dmic3_clk_pe4";
293 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
294 nvidia,tristate = <TEGRA_PIN_DISABLE>;
295 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
296 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
297 };
298 dmic3_dat_pe5 {
299 nvidia,pins = "dmic3_dat_pe5";
300 nvidia,function = "rsvd2";
301 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
302 nvidia,tristate = <TEGRA_PIN_ENABLE>;
303 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
304 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
305 };
306 pe6 {
307 nvidia,pins = "pe6";
308 nvidia,pull = <TEGRA_PIN_PULL_UP>;
309 nvidia,tristate = <TEGRA_PIN_DISABLE>;
310 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
311 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
312 };
313 pe7 {
314 nvidia,pins = "pe7";
315 nvidia,pull = <TEGRA_PIN_PULL_UP>;
316 nvidia,tristate = <TEGRA_PIN_DISABLE>;
317 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
318 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
319 };
320 gen3_i2c_scl_pf0 {
321 nvidia,pins = "gen3_i2c_scl_pf0";
322 nvidia,function = "i2c3";
323 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
324 nvidia,tristate = <TEGRA_PIN_DISABLE>;
325 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
326 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
327 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
328 };
329 gen3_i2c_sda_pf1 {
330 nvidia,pins = "gen3_i2c_sda_pf1";
331 nvidia,function = "i2c3";
332 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
333 nvidia,tristate = <TEGRA_PIN_DISABLE>;
334 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
335 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
336 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
337 };
338 uart2_tx_pg0 {
339 nvidia,pins = "uart2_tx_pg0";
340 nvidia,function = "uartb";
341 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
342 nvidia,tristate = <TEGRA_PIN_ENABLE>;
343 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
344 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
345 };
346 uart2_rx_pg1 {
347 nvidia,pins = "uart2_rx_pg1";
348 nvidia,function = "uartb";
349 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
350 nvidia,tristate = <TEGRA_PIN_ENABLE>;
351 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
352 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
353 };
354 uart2_rts_pg2 {
355 nvidia,pins = "uart2_rts_pg2";
356 nvidia,function = "rsvd2";
357 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
358 nvidia,tristate = <TEGRA_PIN_ENABLE>;
359 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
360 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
361 };
362 uart2_cts_pg3 {
363 nvidia,pins = "uart2_cts_pg3";
364 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
365 nvidia,tristate = <TEGRA_PIN_DISABLE>;
366 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
367 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
368 };
369 wifi_en_ph0 {
370 nvidia,pins = "wifi_en_ph0";
371 nvidia,pull = <TEGRA_PIN_PULL_UP>;
372 nvidia,tristate = <TEGRA_PIN_DISABLE>;
373 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
374 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
375 };
376 wifi_rst_ph1 {
377 nvidia,pins = "wifi_rst_ph1";
378 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
379 nvidia,tristate = <TEGRA_PIN_DISABLE>;
380 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
381 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
382 };
383 wifi_wake_ap_ph2 {
384 nvidia,pins = "wifi_wake_ap_ph2";
385 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386 nvidia,tristate = <TEGRA_PIN_DISABLE>;
387 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
389 };
390 ap_wake_bt_ph3 {
391 nvidia,pins = "ap_wake_bt_ph3";
392 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
393 nvidia,tristate = <TEGRA_PIN_DISABLE>;
394 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
396 };
397 bt_rst_ph4 {
398 nvidia,pins = "bt_rst_ph4";
399 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400 nvidia,tristate = <TEGRA_PIN_DISABLE>;
401 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
402 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
403 };
404 bt_wake_ap_ph5 {
405 nvidia,pins = "bt_wake_ap_ph5";
406 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407 nvidia,tristate = <TEGRA_PIN_DISABLE>;
408 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
410 };
411 ph6 {
412 nvidia,pins = "ph6";
413 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414 nvidia,tristate = <TEGRA_PIN_DISABLE>;
415 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
416 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
417 };
418 ap_wake_nfc_ph7 {
419 nvidia,pins = "ap_wake_nfc_ph7";
420 nvidia,function = "rsvd0";
421 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
422 nvidia,tristate = <TEGRA_PIN_ENABLE>;
423 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
424 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
425 };
426 nfc_en_pi0 {
427 nvidia,pins = "nfc_en_pi0";
428 nvidia,function = "rsvd0";
429 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
430 nvidia,tristate = <TEGRA_PIN_ENABLE>;
431 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
432 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
433 };
434 nfc_int_pi1 {
435 nvidia,pins = "nfc_int_pi1";
436 nvidia,function = "rsvd0";
437 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
438 nvidia,tristate = <TEGRA_PIN_ENABLE>;
439 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
440 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
441 };
442 gps_en_pi2 {
443 nvidia,pins = "gps_en_pi2";
444 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
445 nvidia,tristate = <TEGRA_PIN_DISABLE>;
446 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
447 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
448 };
449 gps_rst_pi3 {
450 nvidia,pins = "gps_rst_pi3";
451 nvidia,function = "rsvd0";
452 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
453 nvidia,tristate = <TEGRA_PIN_ENABLE>;
454 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
455 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
456 };
457 uart4_tx_pi4 {
458 nvidia,pins = "uart4_tx_pi4";
459 nvidia,function = "uartd";
460 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
461 nvidia,tristate = <TEGRA_PIN_DISABLE>;
462 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
463 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
464 };
465 uart4_rx_pi5 {
466 nvidia,pins = "uart4_rx_pi5";
467 nvidia,function = "uartd";
468 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
469 nvidia,tristate = <TEGRA_PIN_DISABLE>;
470 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
471 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
472 };
473 uart4_rts_pi6 {
474 nvidia,pins = "uart4_rts_pi6";
475 nvidia,function = "uartd";
476 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
477 nvidia,tristate = <TEGRA_PIN_DISABLE>;
478 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
479 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
480 };
481 uart4_cts_pi7 {
482 nvidia,pins = "uart4_cts_pi7";
483 nvidia,function = "uartd";
484 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
485 nvidia,tristate = <TEGRA_PIN_DISABLE>;
486 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
487 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
488 };
489 gen1_i2c_sda_pj0 {
490 nvidia,pins = "gen1_i2c_sda_pj0";
491 nvidia,function = "i2c1";
492 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
493 nvidia,tristate = <TEGRA_PIN_DISABLE>;
494 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
495 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
496 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
497 };
498 gen1_i2c_scl_pj1 {
499 nvidia,pins = "gen1_i2c_scl_pj1";
500 nvidia,function = "i2c1";
501 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
502 nvidia,tristate = <TEGRA_PIN_DISABLE>;
503 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
504 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
505 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
506 };
507 gen2_i2c_scl_pj2 {
508 nvidia,pins = "gen2_i2c_scl_pj2";
509 nvidia,function = "i2c2";
510 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
511 nvidia,tristate = <TEGRA_PIN_DISABLE>;
512 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
513 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
514 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
515 };
516 gen2_i2c_sda_pj3 {
517 nvidia,pins = "gen2_i2c_sda_pj3";
518 nvidia,function = "i2c2";
519 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
520 nvidia,tristate = <TEGRA_PIN_DISABLE>;
521 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
523 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
524 };
525 dap4_fs_pj4 {
526 nvidia,pins = "dap4_fs_pj4";
527 nvidia,function = "rsvd1";
528 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
529 nvidia,tristate = <TEGRA_PIN_ENABLE>;
530 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
531 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
532 };
533 dap4_din_pj5 {
534 nvidia,pins = "dap4_din_pj5";
535 nvidia,function = "rsvd1";
536 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
537 nvidia,tristate = <TEGRA_PIN_ENABLE>;
538 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
539 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
540 };
541 dap4_dout_pj6 {
542 nvidia,pins = "dap4_dout_pj6";
543 nvidia,function = "rsvd1";
544 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
545 nvidia,tristate = <TEGRA_PIN_ENABLE>;
546 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
547 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
548 };
549 dap4_sclk_pj7 {
550 nvidia,pins = "dap4_sclk_pj7";
551 nvidia,function = "rsvd1";
552 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
553 nvidia,tristate = <TEGRA_PIN_ENABLE>;
554 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
555 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
556 };
557 pk0 {
558 nvidia,pins = "pk0";
559 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
560 nvidia,tristate = <TEGRA_PIN_DISABLE>;
561 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
562 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
563 };
564 pk1 {
565 nvidia,pins = "pk1";
566 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
567 nvidia,tristate = <TEGRA_PIN_DISABLE>;
568 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
569 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
570 };
571 pk2 {
572 nvidia,pins = "pk2";
573 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
574 nvidia,tristate = <TEGRA_PIN_DISABLE>;
575 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
576 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
577 };
578 pk3 {
579 nvidia,pins = "pk3";
580 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
581 nvidia,tristate = <TEGRA_PIN_DISABLE>;
582 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
583 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
584 };
585 pk4 {
586 nvidia,pins = "pk4";
587 nvidia,function = "rsvd1";
588 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
589 nvidia,tristate = <TEGRA_PIN_ENABLE>;
590 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
592 };
593 pk5 {
594 nvidia,pins = "pk5";
595 nvidia,function = "rsvd1";
596 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
597 nvidia,tristate = <TEGRA_PIN_ENABLE>;
598 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
599 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
600 };
601 pk6 {
602 nvidia,pins = "pk6";
603 nvidia,function = "rsvd1";
604 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605 nvidia,tristate = <TEGRA_PIN_ENABLE>;
606 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
607 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
608 };
609 pk7 {
610 nvidia,pins = "pk7";
611 nvidia,function = "rsvd1";
612 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
613 nvidia,tristate = <TEGRA_PIN_ENABLE>;
614 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
615 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
616 };
617 pl0 {
618 nvidia,pins = "pl0";
619 nvidia,function = "rsvd0";
620 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
621 nvidia,tristate = <TEGRA_PIN_ENABLE>;
622 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
623 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
624 };
625 pl1 {
626 nvidia,pins = "pl1";
627 nvidia,function = "rsvd1";
628 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
629 nvidia,tristate = <TEGRA_PIN_ENABLE>;
630 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
631 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
632 };
633 sdmmc1_clk_pm0 {
634 nvidia,pins = "sdmmc1_clk_pm0";
635 nvidia,function = "rsvd1";
636 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
637 nvidia,tristate = <TEGRA_PIN_ENABLE>;
638 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
639 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
640 };
641 sdmmc1_cmd_pm1 {
642 nvidia,pins = "sdmmc1_cmd_pm1";
643 nvidia,function = "rsvd2";
644 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
645 nvidia,tristate = <TEGRA_PIN_ENABLE>;
646 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
647 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
648 };
649 sdmmc1_dat3_pm2 {
650 nvidia,pins = "sdmmc1_dat3_pm2";
651 nvidia,function = "rsvd2";
652 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
653 nvidia,tristate = <TEGRA_PIN_ENABLE>;
654 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
655 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
656 };
657 sdmmc1_dat2_pm3 {
658 nvidia,pins = "sdmmc1_dat2_pm3";
659 nvidia,function = "rsvd2";
660 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
661 nvidia,tristate = <TEGRA_PIN_ENABLE>;
662 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
663 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
664 };
665 sdmmc1_dat1_pm4 {
666 nvidia,pins = "sdmmc1_dat1_pm4";
667 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
668 nvidia,tristate = <TEGRA_PIN_DISABLE>;
669 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
670 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
671 };
672 sdmmc1_dat0_pm5 {
673 nvidia,pins = "sdmmc1_dat0_pm5";
674 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
675 nvidia,tristate = <TEGRA_PIN_DISABLE>;
676 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
677 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
678 };
679 sdmmc3_clk_pp0 {
680 nvidia,pins = "sdmmc3_clk_pp0";
681 nvidia,function = "rsvd1";
682 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
683 nvidia,tristate = <TEGRA_PIN_ENABLE>;
684 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
685 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
686 };
687 sdmmc3_cmd_pp1 {
688 nvidia,pins = "sdmmc3_cmd_pp1";
689 nvidia,function = "rsvd1";
690 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
691 nvidia,tristate = <TEGRA_PIN_ENABLE>;
692 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
693 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
694 };
695 sdmmc3_dat3_pp2 {
696 nvidia,pins = "sdmmc3_dat3_pp2";
697 nvidia,function = "rsvd1";
698 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
699 nvidia,tristate = <TEGRA_PIN_ENABLE>;
700 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
701 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
702 };
703 sdmmc3_dat2_pp3 {
704 nvidia,pins = "sdmmc3_dat2_pp3";
705 nvidia,function = "rsvd1";
706 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
707 nvidia,tristate = <TEGRA_PIN_ENABLE>;
708 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
709 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
710 };
711 sdmmc3_dat1_pp4 {
712 nvidia,pins = "sdmmc3_dat1_pp4";
713 nvidia,function = "rsvd1";
714 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
715 nvidia,tristate = <TEGRA_PIN_ENABLE>;
716 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
717 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
718 };
719 sdmmc3_dat0_pp5 {
720 nvidia,pins = "sdmmc3_dat0_pp5";
721 nvidia,function = "rsvd1";
722 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
723 nvidia,tristate = <TEGRA_PIN_ENABLE>;
724 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
725 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
726 };
727 cam1_mclk_ps0 {
728 nvidia,pins = "cam1_mclk_ps0";
729 nvidia,function = "extperiph3";
730 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731 nvidia,tristate = <TEGRA_PIN_DISABLE>;
732 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
733 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
734 };
735 cam2_mclk_ps1 {
736 nvidia,pins = "cam2_mclk_ps1";
737 nvidia,function = "extperiph3";
738 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
739 nvidia,tristate = <TEGRA_PIN_DISABLE>;
740 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
741 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
742 };
743 cam_i2c_scl_ps2 {
744 nvidia,pins = "cam_i2c_scl_ps2";
745 nvidia,function = "i2cvi";
746 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
747 nvidia,tristate = <TEGRA_PIN_DISABLE>;
748 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
749 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
750 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
751 };
752 cam_i2c_sda_ps3 {
753 nvidia,pins = "cam_i2c_sda_ps3";
754 nvidia,function = "i2cvi";
755 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
756 nvidia,tristate = <TEGRA_PIN_DISABLE>;
757 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
758 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
759 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
760 };
761 cam_rst_ps4 {
762 nvidia,pins = "cam_rst_ps4";
763 nvidia,function = "rsvd1";
764 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
765 nvidia,tristate = <TEGRA_PIN_ENABLE>;
766 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
767 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
768 };
769 cam_af_en_ps5 {
770 nvidia,pins = "cam_af_en_ps5";
771 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
772 nvidia,tristate = <TEGRA_PIN_DISABLE>;
773 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
774 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
775 };
776 cam_flash_en_ps6 {
777 nvidia,pins = "cam_flash_en_ps6";
778 nvidia,function = "rsvd2";
779 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
780 nvidia,tristate = <TEGRA_PIN_ENABLE>;
781 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
782 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
783 };
784 cam1_pwdn_ps7 {
785 nvidia,pins = "cam1_pwdn_ps7";
786 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
787 nvidia,tristate = <TEGRA_PIN_DISABLE>;
788 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
789 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
790 };
791 cam2_pwdn_pt0 {
792 nvidia,pins = "cam2_pwdn_pt0";
793 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
794 nvidia,tristate = <TEGRA_PIN_DISABLE>;
795 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
796 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
797 };
798 cam1_strobe_pt1 {
799 nvidia,pins = "cam1_strobe_pt1";
800 nvidia,function = "rsvd1";
801 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
802 nvidia,tristate = <TEGRA_PIN_ENABLE>;
803 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
804 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
805 };
806 uart1_tx_pu0 {
807 nvidia,pins = "uart1_tx_pu0";
808 nvidia,function = "uarta";
809 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
810 nvidia,tristate = <TEGRA_PIN_DISABLE>;
811 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
812 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
813 };
814 uart1_rx_pu1 {
815 nvidia,pins = "uart1_rx_pu1";
816 nvidia,function = "uarta";
817 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
818 nvidia,tristate = <TEGRA_PIN_DISABLE>;
819 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
820 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
821 };
822 uart1_rts_pu2 {
823 nvidia,pins = "uart1_rts_pu2";
824 nvidia,function = "rsvd1";
825 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
826 nvidia,tristate = <TEGRA_PIN_ENABLE>;
827 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
828 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
829 };
830 uart1_cts_pu3 {
831 nvidia,pins = "uart1_cts_pu3";
832 nvidia,function = "rsvd1";
833 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
834 nvidia,tristate = <TEGRA_PIN_ENABLE>;
835 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
836 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
837 };
838 lcd_bl_pwm_pv0 {
839 nvidia,pins = "lcd_bl_pwm_pv0";
840 nvidia,function = "rsvd3";
841 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
842 nvidia,tristate = <TEGRA_PIN_ENABLE>;
843 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
844 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
845 };
846 lcd_bl_en_pv1 {
847 nvidia,pins = "lcd_bl_en_pv1";
848 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
849 nvidia,tristate = <TEGRA_PIN_DISABLE>;
850 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
851 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
852 };
853 lcd_rst_pv2 {
854 nvidia,pins = "lcd_rst_pv2";
855 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
856 nvidia,tristate = <TEGRA_PIN_DISABLE>;
857 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
858 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
859 };
860 lcd_gpio1_pv3 {
861 nvidia,pins = "lcd_gpio1_pv3";
862 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
863 nvidia,tristate = <TEGRA_PIN_DISABLE>;
864 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
865 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
866 };
867 lcd_gpio2_pv4 {
868 nvidia,pins = "lcd_gpio2_pv4";
869 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
870 nvidia,tristate = <TEGRA_PIN_DISABLE>;
871 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
872 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
873 };
874 ap_ready_pv5 {
875 nvidia,pins = "ap_ready_pv5";
876 nvidia,function = "rsvd0";
877 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
878 nvidia,tristate = <TEGRA_PIN_ENABLE>;
879 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
880 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
881 };
882 touch_rst_pv6 {
883 nvidia,pins = "touch_rst_pv6";
884 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
885 nvidia,tristate = <TEGRA_PIN_DISABLE>;
886 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
887 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
888 };
889 touch_clk_pv7 {
890 nvidia,pins = "touch_clk_pv7";
891 nvidia,function = "touch";
892 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
893 nvidia,tristate = <TEGRA_PIN_DISABLE>;
894 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
895 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
896 };
897 modem_wake_ap_px0 {
898 nvidia,pins = "modem_wake_ap_px0";
899 nvidia,function = "rsvd0";
900 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
901 nvidia,tristate = <TEGRA_PIN_ENABLE>;
902 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
903 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
904 };
905 touch_int_px1 {
906 nvidia,pins = "touch_int_px1";
907 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
908 nvidia,tristate = <TEGRA_PIN_DISABLE>;
909 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
910 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
911 };
912 motion_int_px2 {
913 nvidia,pins = "motion_int_px2";
914 nvidia,function = "rsvd0";
915 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
916 nvidia,tristate = <TEGRA_PIN_ENABLE>;
917 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
918 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
919 };
920 als_prox_int_px3 {
921 nvidia,pins = "als_prox_int_px3";
922 nvidia,function = "rsvd0";
923 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
924 nvidia,tristate = <TEGRA_PIN_ENABLE>;
925 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
926 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
927 };
928 temp_alert_px4 {
929 nvidia,pins = "temp_alert_px4";
930 nvidia,pull = <TEGRA_PIN_PULL_UP>;
931 nvidia,tristate = <TEGRA_PIN_DISABLE>;
932 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
933 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
934 };
935 button_power_on_px5 {
936 nvidia,pins = "button_power_on_px5";
937 nvidia,pull = <TEGRA_PIN_PULL_UP>;
938 nvidia,tristate = <TEGRA_PIN_DISABLE>;
939 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
940 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
941 };
942 button_vol_up_px6 {
943 nvidia,pins = "button_vol_up_px6";
944 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
945 nvidia,tristate = <TEGRA_PIN_DISABLE>;
946 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
947 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
948 };
949 button_vol_down_px7 {
950 nvidia,pins = "button_vol_down_px7";
951 nvidia,pull = <TEGRA_PIN_PULL_UP>;
952 nvidia,tristate = <TEGRA_PIN_DISABLE>;
953 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
954 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
955 };
956 button_slide_sw_py0 {
957 nvidia,pins = "button_slide_sw_py0";
958 nvidia,pull = <TEGRA_PIN_PULL_UP>;
959 nvidia,tristate = <TEGRA_PIN_DISABLE>;
960 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
961 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
962 };
963 button_home_py1 {
964 nvidia,pins = "button_home_py1";
965 nvidia,pull = <TEGRA_PIN_PULL_UP>;
966 nvidia,tristate = <TEGRA_PIN_DISABLE>;
967 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
968 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
969 };
970 lcd_te_py2 {
971 nvidia,pins = "lcd_te_py2";
972 nvidia,function = "displaya";
973 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
974 nvidia,tristate = <TEGRA_PIN_DISABLE>;
975 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
976 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
977 };
978 pwr_i2c_scl_py3 {
979 nvidia,pins = "pwr_i2c_scl_py3";
980 nvidia,function = "i2cpmu";
981 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
982 nvidia,tristate = <TEGRA_PIN_DISABLE>;
983 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
984 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
985 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
986 };
987 pwr_i2c_sda_py4 {
988 nvidia,pins = "pwr_i2c_sda_py4";
989 nvidia,function = "i2cpmu";
990 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
991 nvidia,tristate = <TEGRA_PIN_DISABLE>;
992 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
993 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
994 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
995 };
996 clk_32k_out_py5 {
997 nvidia,pins = "clk_32k_out_py5";
998 nvidia,function = "soc";
999 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1000 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1002 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1003 };
1004 pz0 {
1005 nvidia,pins = "pz0";
1006 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1007 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1008 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1009 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1010 };
1011 pz1 {
1012 nvidia,pins = "pz1";
1013 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1014 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1015 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1016 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1017 };
1018 pz2 {
1019 nvidia,pins = "pz2";
1020 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1021 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1022 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1023 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1024 };
1025 pz3 {
1026 nvidia,pins = "pz3";
1027 nvidia,function = "rsvd1";
1028 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1029 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1030 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1031 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1032 };
1033 pz4 {
1034 nvidia,pins = "pz4";
1035 nvidia,function = "rsvd1";
1036 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1037 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1038 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1039 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1040 };
1041 pz5 {
1042 nvidia,pins = "pz5";
1043 nvidia,function = "soc";
1044 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1045 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1046 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1047 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1048 };
1049 dap2_fs_paa0 {
1050 nvidia,pins = "dap2_fs_paa0";
1051 nvidia,function = "i2s2";
1052 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1053 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1054 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1055 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1056 };
1057 dap2_sclk_paa1 {
1058 nvidia,pins = "dap2_sclk_paa1";
1059 nvidia,function = "i2s2";
1060 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1061 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1062 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1063 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1064 };
1065 dap2_din_paa2 {
1066 nvidia,pins = "dap2_din_paa2";
1067 nvidia,function = "i2s2";
1068 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1069 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1070 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1071 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1072 };
1073 dap2_dout_paa3 {
1074 nvidia,pins = "dap2_dout_paa3";
1075 nvidia,function = "i2s2";
1076 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1077 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1078 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1079 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1080 };
1081 aud_mclk_pbb0 {
1082 nvidia,pins = "aud_mclk_pbb0";
1083 nvidia,function = "aud";
1084 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1085 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1086 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1087 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1088 };
1089 dvfs_pwm_pbb1 {
1090 nvidia,pins = "dvfs_pwm_pbb1";
1091 nvidia,function = "rsvd0";
1092 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1093 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1094 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1095 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1096 };
1097 dvfs_clk_pbb2 {
1098 nvidia,pins = "dvfs_clk_pbb2";
1099 nvidia,function = "rsvd0";
1100 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1101 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1102 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1103 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1104 };
1105 gpio_x1_aud_pbb3 {
1106 nvidia,pins = "gpio_x1_aud_pbb3";
1107 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1108 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1109 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1110 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1111 };
1112 gpio_x3_aud_pbb4 {
1113 nvidia,pins = "gpio_x3_aud_pbb4";
1114 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1115 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1116 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1117 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1118 };
1119 hdmi_cec_pcc0 {
1120 nvidia,pins = "hdmi_cec_pcc0";
1121 nvidia,function = "rsvd1";
1122 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1123 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1124 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1125 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1126 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1127 };
1128 hdmi_int_dp_hpd_pcc1 {
1129 nvidia,pins = "hdmi_int_dp_hpd_pcc1";
1130 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1132 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1133 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1134 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1135 };
1136 spdif_out_pcc2 {
1137 nvidia,pins = "spdif_out_pcc2";
1138 nvidia,function = "rsvd1";
1139 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1140 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1141 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1142 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1143 };
1144 spdif_in_pcc3 {
1145 nvidia,pins = "spdif_in_pcc3";
1146 nvidia,function = "rsvd1";
1147 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1148 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1149 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1150 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1151 };
1152 usb_vbus_en0_pcc4 {
1153 nvidia,pins = "usb_vbus_en0_pcc4";
1154 nvidia,function = "rsvd1";
1155 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1156 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1157 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1158 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1159 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1160 };
1161 usb_vbus_en1_pcc5 {
1162 nvidia,pins = "usb_vbus_en1_pcc5";
1163 nvidia,function = "rsvd1";
1164 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1165 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1166 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1167 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1168 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1169 };
1170 dp_hpd0_pcc6 {
1171 nvidia,pins = "dp_hpd0_pcc6";
1172 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1173 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1174 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1175 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1176 };
1177 pcc7 {
1178 nvidia,pins = "pcc7";
1179 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1180 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1181 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1182 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1183 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
1184 };
1185 spi2_cs1_pdd0 {
1186 nvidia,pins = "spi2_cs1_pdd0";
1187 nvidia,function = "rsvd1";
1188 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1189 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1190 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1191 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1192 };
1193 qspi_sck_pee0 {
1194 nvidia,pins = "qspi_sck_pee0";
1195 nvidia,function = "qspi";
1196 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1197 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1198 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1199 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1200 };
1201 qspi_cs_n_pee1 {
1202 nvidia,pins = "qspi_cs_n_pee1";
1203 nvidia,function = "qspi";
1204 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1205 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1206 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1207 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1208 };
1209 qspi_io0_pee2 {
1210 nvidia,pins = "qspi_io0_pee2";
1211 nvidia,function = "qspi";
1212 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1213 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1214 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1215 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1216 };
1217 qspi_io1_pee3 {
1218 nvidia,pins = "qspi_io1_pee3";
1219 nvidia,function = "qspi";
1220 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1221 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1222 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1223 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1224 };
1225 qspi_io2_pee4 {
1226 nvidia,pins = "qspi_io2_pee4";
1227 nvidia,function = "rsvd1";
1228 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1229 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1230 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1231 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1232 };
1233 qspi_io3_pee5 {
1234 nvidia,pins = "qspi_io3_pee5";
1235 nvidia,function = "rsvd1";
1236 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1237 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1238 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1239 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1240 };
1241 core_pwr_req {
1242 nvidia,pins = "core_pwr_req";
1243 nvidia,function = "core";
1244 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1245 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1246 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1247 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1248 };
1249 cpu_pwr_req {
1250 nvidia,pins = "cpu_pwr_req";
1251 nvidia,function = "cpu";
1252 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1253 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1254 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1255 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1256 };
1257 pwr_int_n {
1258 nvidia,pins = "pwr_int_n";
1259 nvidia,function = "pmi";
1260 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1261 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1262 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1263 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1264 };
1265 clk_32k_in {
1266 nvidia,pins = "clk_32k_in";
1267 nvidia,function = "clk";
1268 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1269 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1270 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1271 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1272 };
1273 jtag_rtck {
1274 nvidia,pins = "jtag_rtck";
1275 nvidia,function = "jtag";
1276 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1277 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1278 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1279 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1280 };
1281 clk_req {
1282 nvidia,pins = "clk_req";
1283 nvidia,function = "rsvd1";
1284 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1285 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1286 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1287 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1288 };
1289 shutdown {
1290 nvidia,pins = "shutdown";
1291 nvidia,function = "shutdown";
1292 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1293 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1294 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1295 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1296 };
1297 };
1298 };
1299
1300 serial@70006000 {
1301 status = "okay";
1302 };
1303
1304 i2c@7000c400 {
1305 status = "okay";
1306 clock-frequency = <1000000>;
1307
1308 ec@1e {
1309 compatible = "google,cros-ec-i2c";
1310 reg = <0x1e>;
1311 interrupt-parent = <&gpio>;
1312 interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
1313 wakeup-source;
1314
1315 ec_i2c_0: i2c-tunnel {
1316 compatible = "google,cros-ec-i2c-tunnel";
1317 #address-cells = <1>;
1318 #size-cells = <0>;
1319
1320 google,remote-bus = <0>;
1321
1322 battery: bq27742@55 {
1323 compatible = "ti,bq27742";
1324 reg = <0x55>;
1325 battery-name = "battery";
1326 };
1327 };
1328 };
1329 };
1330
1331 i2c@7000d000 {
1332 status = "okay";
1333 clock-frequency = <1000000>;
1334
1335 max77620: max77620@3c {
1336 compatible = "maxim,max77620";
1337 reg = <0x3c>;
1338 interrupts = <0 86 IRQ_TYPE_NONE>;
1339
1340 #interrupt-cells = <2>;
1341 interrupt-controller;
1342
1343 gpio-controller;
1344 #gpio-cells = <2>;
1345
1346 pinctrl-names = "default";
1347 pinctrl-0 = <&max77620_default>;
1348
1349 max77620_default: pinmux@0 {
1350 pin_gpio {
1351 pins = "gpio0", "gpio1", "gpio2", "gpio7";
1352 function = "gpio";
1353 };
1354
1355 /*
1356 * GPIO3 is used to en_pp3300, and it is part of power
1357 * sequence, So it must be sequenced up (automatically
1358 * set by OTP) and down properly.
1359 */
1360 pin_gpio3 {
1361 pins = "gpio3";
1362 function = "fps-out";
1363 drive-open-drain = <1>;
1364 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1365 maxim,active-fps-power-up-slot = <4>;
1366 maxim,active-fps-power-down-slot = <2>;
1367 };
1368
1369 pin_gpio5_6 {
1370 pins = "gpio5", "gpio6";
1371 function = "gpio";
1372 drive-push-pull = <1>;
1373 };
1374
1375 pin_32k {
1376 pins = "gpio4";
1377 function = "32k-out1";
1378 };
1379 };
1380
1381 fps {
1382 fps0 {
1383 maxim,shutdown-fps-time-period-us = <5120>;
1384 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1385 };
1386
1387 fps1 {
1388 maxim,shutdown-fps-time-period-us = <5120>;
1389 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1390 maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>;
1391 };
1392
1393 fps2 {
1394 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1395 };
1396 };
1397
1398 regulators {
1399 in-ldo0-1-supply = <&pp1350>;
1400 in-ldo2-supply = <&pp3300>;
1401 in-ldo3-5-supply = <&pp3300>;
1402 in-ldo7-8-supply = <&pp1350>;
1403
1404 ppvar_soc: sd0 {
1405 regulator-name = "PPVAR_SOC";
1406 regulator-min-microvolt = <825000>;
1407 regulator-max-microvolt = <1125000>;
1408 regulator-always-on;
1409 regulator-boot-on;
1410 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1411 maxim,active-fps-power-up-slot = <1>;
1412 maxim,active-fps-power-down-slot = <7>;
1413 };
1414
1415 pp1100_sd1: sd1 {
1416 regulator-name = "PP1100";
1417 regulator-min-microvolt = <1125000>;
1418 regulator-max-microvolt = <1125000>;
1419 regulator-always-on;
1420 regulator-boot-on;
1421 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1422 maxim,active-fps-power-up-slot = <5>;
1423 maxim,active-fps-power-down-slot = <1>;
1424 };
1425
1426 pp1350: sd2 {
1427 regulator-name = "PP1350";
1428 regulator-min-microvolt = <1350000>;
1429 regulator-max-microvolt = <1350000>;
1430 regulator-always-on;
1431 regulator-boot-on;
1432 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1433 maxim,active-fps-power-up-slot = <2>;
1434 maxim,active-fps-power-down-slot = <5>;
1435 };
1436
1437 pp1800: sd3 {
1438 regulator-name = "PP1800";
1439 regulator-min-microvolt = <1800000>;
1440 regulator-max-microvolt = <1800000>;
1441 regulator-always-on;
1442 regulator-boot-on;
1443 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1444 maxim,active-fps-power-up-slot = <3>;
1445 maxim,active-fps-power-down-slot = <3>;
1446 };
1447
1448 pp1200_avdd: ldo0 {
1449 regulator-name = "PP1200_AVDD";
1450 regulator-min-microvolt = <1200000>;
1451 regulator-max-microvolt = <1200000>;
1452 regulator-enable-ramp-delay = <26>;
1453 regulator-ramp-delay = <100000>;
1454 regulator-boot-on;
1455 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1456 maxim,active-fps-power-up-slot = <0>;
1457 maxim,active-fps-power-down-slot = <7>;
1458 };
1459
1460 pp1200_rcam: ldo1 {
1461 regulator-name = "PP1200_RCAM";
1462 regulator-min-microvolt = <1200000>;
1463 regulator-max-microvolt = <1200000>;
1464 regulator-enable-ramp-delay = <22>;
1465 regulator-ramp-delay = <100000>;
1466 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1467 maxim,active-fps-power-up-slot = <0>;
1468 maxim,active-fps-power-down-slot = <7>;
1469 };
1470
1471 pp_ldo2: ldo2 {
1472 regulator-name = "PP_LDO2";
1473 regulator-min-microvolt = <1800000>;
1474 regulator-max-microvolt = <1800000>;
1475 regulator-enable-ramp-delay = <62>;
1476 regulator-ramp-delay = <11000>;
1477 regulator-always-on;
1478 regulator-boot-on;
1479 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1480 maxim,active-fps-power-up-slot = <0>;
1481 maxim,active-fps-power-down-slot = <7>;
1482 };
1483
1484 pp2800l_rcam: ldo3 {
1485 regulator-name = "PP2800L_RCAM";
1486 regulator-min-microvolt = <2800000>;
1487 regulator-max-microvolt = <2800000>;
1488 regulator-enable-ramp-delay = <50>;
1489 regulator-ramp-delay = <100000>;
1490 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1491 maxim,active-fps-power-up-slot = <0>;
1492 maxim,active-fps-power-down-slot = <7>;
1493 };
1494
1495 pp100_soc_rtc: ldo4 {
1496 regulator-name = "PP1100_SOC_RTC";
1497 regulator-min-microvolt = <850000>;
1498 regulator-max-microvolt = <850000>;
1499 regulator-enable-ramp-delay = <22>;
1500 regulator-ramp-delay = <100000>;
1501 regulator-always-on; /* Check this */
1502 regulator-boot-on;
1503 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
1504 maxim,active-fps-power-up-slot = <1>;
1505 maxim,active-fps-power-down-slot = <7>;
1506 };
1507
1508 pp2800l_fcam: ldo5 {
1509 regulator-name = "PP2800L_FCAM";
1510 regulator-min-microvolt = <2800000>;
1511 regulator-max-microvolt = <2800000>;
1512 regulator-enable-ramp-delay = <62>;
1513 regulator-ramp-delay = <100000>;
1514 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1515 maxim,active-fps-power-up-slot = <0>;
1516 maxim,active-fps-power-down-slot = <7>;
1517 };
1518
1519 ldo6 {
1520 /* Unused. */
1521 regulator-name = "PP_LDO6";
1522 regulator-min-microvolt = <1800000>;
1523 regulator-max-microvolt = <1800000>;
1524 regulator-enable-ramp-delay = <36>;
1525 regulator-ramp-delay = <100000>;
1526 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1527 maxim,active-fps-power-up-slot = <0>;
1528 maxim,active-fps-power-down-slot = <7>;
1529 };
1530
1531 pp1050_avdd: ldo7 {
1532 regulator-name = "PP1050_AVDD";
1533 regulator-min-microvolt = <1050000>;
1534 regulator-max-microvolt = <1050000>;
1535 regulator-enable-ramp-delay = <24>;
1536 regulator-ramp-delay = <100000>;
1537 regulator-always-on;
1538 regulator-boot-on;
1539 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
1540 maxim,active-fps-power-up-slot = <3>;
1541 maxim,active-fps-power-down-slot = <4>;
1542 };
1543
1544 avddio_1v05: ldo8 {
1545 regulator-name = "AVDDIO_1V05";
1546 regulator-min-microvolt = <1050000>;
1547 regulator-max-microvolt = <1050000>;
1548 regulator-enable-ramp-delay = <22>;
1549 regulator-ramp-delay = <100000>;
1550 regulator-boot-on;
1551 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
1552 maxim,active-fps-power-up-slot = <0>;
1553 maxim,active-fps-power-down-slot = <7>;
1554 };
1555 };
1556 };
1557 };
1558
1559 pmc@7000e400 {
1560 nvidia,invert-interrupt;
1561 nvidia,suspend-mode = <0>;
1562 nvidia,cpu-pwr-good-time = <0>;
1563 nvidia,cpu-pwr-off-time = <0>;
1564 nvidia,core-pwr-good-time = <12000 6000>;
1565 nvidia,core-pwr-off-time = <39053>;
1566 nvidia,core-power-req-active-high;
1567 nvidia,sys-clock-req-active-high;
1568 status = "okay";
1569 };
1570
1571 sdhci@700b0600 {
1572 bus-width = <8>;
1573 non-removable;
1574 status = "okay";
1575 };
1576
1577 clocks {
1578 compatible = "simple-bus";
1579 #address-cells = <1>;
1580 #size-cells = <0>;
1581
1582 clk32k_in: clock@0 {
1583 compatible = "fixed-clock";
1584 reg = <0>;
1585 #clock-cells = <0>;
1586 clock-frequency = <32768>;
1587 };
1588 };
1589
1590 cpus {
1591 cpu@0 {
1592 enable-method = "psci";
1593 };
1594
1595 cpu@1 {
1596 enable-method = "psci";
1597 };
1598
1599 cpu@2 {
1600 enable-method = "psci";
1601 };
1602
1603 cpu@3 {
1604 enable-method = "psci";
1605 };
1606 };
1607
1608 gpio-keys {
1609 compatible = "gpio-keys";
1610 gpio-keys,name = "gpio-keys";
1611
1612 power {
1613 label = "Power";
1614 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>;
1615 linux,code = <KEY_POWER>;
1616 debounce-interval = <30>;
1617 wakeup-source;
1618 };
1619
1620 lid {
1621 label = "Lid";
1622 gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>;
1623 linux,input-type = <EV_SW>;
1624 linux,code = <SW_LID>;
1625 wakeup-source;
1626 };
1627
1628 tablet_mode {
1629 label = "Tablet Mode";
1630 gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
1631 linux,input-type = <EV_SW>;
1632 linux,code = <SW_TABLET_MODE>;
1633 wakeup-source;
1634 };
1635
1636 volume_down {
1637 label = "Volume Down";
1638 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
1639 linux,code = <KEY_VOLUMEDOWN>;
1640 };
1641
1642 volume_up {
1643 label = "Volume Up";
1644 gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>;
1645 linux,code = <KEY_VOLUMEUP>;
1646 };
1647 };
1648
1649 psci {
1650 compatible = "arm,psci-1.0";
1651 method = "smc";
1652 };
1653
1654 regulators {
1655 compatible = "simple-bus";
1656 device_type = "fixed-regulators";
1657 #address-cells = <1>;
1658 #size-cells = <0>;
1659
1660 ppvar_sys: regulator@0 {
1661 compatible = "regulator-fixed";
1662 reg = <0>;
1663 regulator-name = "PPVAR_SYS";
1664 regulator-min-microvolt = <4400000>;
1665 regulator-max-microvolt = <4400000>;
1666 regulator-always-on;
1667 };
1668
1669 pplcd_vdd: regulator@1 {
1670 compatible = "regulator-fixed";
1671 reg = <1>;
1672 regulator-name = "PPLCD_VDD";
1673 regulator-min-microvolt = <4400000>;
1674 regulator-max-microvolt = <4400000>;
1675 gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
1676 enable-active-high;
1677 regulator-boot-on;
1678 };
1679
1680 pp3000_always: regulator@2 {
1681 compatible = "regulator-fixed";
1682 reg = <2>;
1683 regulator-name = "PP3000_ALWAYS";
1684 regulator-min-microvolt = <3000000>;
1685 regulator-max-microvolt = <3000000>;
1686 regulator-always-on;
1687 };
1688
1689 pp3300: regulator@3 {
1690 compatible = "regulator-fixed";
1691 reg = <3>;
1692 regulator-name = "PP3300";
1693 regulator-min-microvolt = <3300000>;
1694 regulator-max-microvolt = <3300000>;
1695 regulator-boot-on;
1696 regulator-always-on;
1697 enable-active-high;
1698 };
1699
1700 pp5000: regulator@4 {
1701 compatible = "regulator-fixed";
1702 reg = <4>;
1703 regulator-name = "PP5000";
1704 regulator-min-microvolt = <5000000>;
1705 regulator-max-microvolt = <5000000>;
1706 regulator-always-on;
1707 };
1708
1709 pp1800_lcdio: regulator@5 {
1710 compatible = "regulator-fixed";
1711 reg = <5>;
1712 regulator-name = "PP1800_LCDIO";
1713 regulator-min-microvolt = <1800000>;
1714 regulator-max-microvolt = <1800000>;
1715 gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
1716 enable-active-high;
1717 regulator-boot-on;
1718 };
1719
1720 pp1800_cam: regulator@6 {
1721 compatible = "regulator-fixed";
1722 reg= <6>;
1723 regulator-name = "PP1800_CAM";
1724 regulator-min-microvolt = <1800000>;
1725 regulator-max-microvolt = <1800000>;
1726 gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
1727 enable-active-high;
1728 };
1729
1730 usbc_vbus: regulator@7 {
1731 compatible = "regulator-fixed";
1732 reg = <7>;
1733 regulator-name = "USBC_VBUS";
1734 regulator-min-microvolt = <5000000>;
1735 regulator-max-microvolt = <5000000>;
1736 };
1737 };
1738 };
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