arch/arm64/mm/mmu.c

   1 /*
   2  * Based on arch/arm/mm/mmu.c
   3  *
   4  * Copyright (C) 1995-2005 Russell King
   5  * Copyright (C) 2012 ARM Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/export.h>
  21 #include <linux/kernel.h>
  22 #include <linux/errno.h>
  23 #include <linux/init.h>
  24 #include <linux/mman.h>
  25 #include <linux/nodemask.h>
  26 #include <linux/memblock.h>
  27 #include <linux/fs.h>
  28 #include <linux/io.h>
  29
  30 #include <asm/cputype.h>
  31 #include <asm/sections.h>
  32 #include <asm/setup.h>
  33 #include <asm/sizes.h>
  34 #include <asm/tlb.h>
  35 #include <asm/mmu_context.h>
  36
  37 #include "mm.h"
  38
  39 /*
  40  * Empty_zero_page is a special page that is used for zero-initialized data
  41  * and COW.
  42  */
  43 struct page *empty_zero_page;
  44 EXPORT_SYMBOL(empty_zero_page);
  45
  46 pgprot_t pgprot_default;
  47 EXPORT_SYMBOL(pgprot_default);
  48
  49 static pmdval_t prot_sect_kernel;
  50
  51 struct cachepolicy {
  52         const char      policy[16];
  53         u64             mair;
  54         u64             tcr;
  55 };
  56
  57 static struct cachepolicy cache_policies[] __initdata = {
  58         {
  59                 .policy         = "uncached",
  60                 .mair           = 0x44,                 /* inner, outer non-cacheable */
  61                 .tcr            = TCR_IRGN_NC | TCR_ORGN_NC,
  62         }, {
  63                 .policy         = "writethrough",
  64                 .mair           = 0xaa,                 /* inner, outer write-through, read-allocate */
  65                 .tcr            = TCR_IRGN_WT | TCR_ORGN_WT,
  66         }, {
  67                 .policy         = "writeback",
  68                 .mair           = 0xee,                 /* inner, outer write-back, read-allocate */
  69                 .tcr            = TCR_IRGN_WBnWA | TCR_ORGN_WBnWA,
  70         }
  71 };
  72
  73 /*
  74  * These are useful for identifying cache coherency problems by allowing the
  75  * cache or the cache and writebuffer to be turned off. It changes the Normal
  76  * memory caching attributes in the MAIR_EL1 register.
  77  */
  78 static int __init early_cachepolicy(char *p)
  79 {
  80         int i;
  81         u64 tmp;
  82
  83         for (i = 0; i < ARRAY_SIZE(cache_policies); i++) {
  84                 int len = strlen(cache_policies[i].policy);
  85
  86                 if (memcmp(p, cache_policies[i].policy, len) == 0)
  87                         break;
  88         }
  89         if (i == ARRAY_SIZE(cache_policies)) {
  90                 pr_err("ERROR: unknown or unsupported cache policy: %s\n", p);
  91                 return 0;
  92         }
  93
  94         flush_cache_all();
  95
  96         /*
  97          * Modify MT_NORMAL attributes in MAIR_EL1.
  98          */
  99         asm volatile(
 100         "       mrs     %0, mair_el1\n"
 101         "       bfi     %0, %1, #%2, #8\n"
 102         "       msr     mair_el1, %0\n"
 103         "       isb\n"
 104         : "=&r" (tmp)
 105         : "r" (cache_policies[i].mair), "i" (MT_NORMAL * 8));
 106
 107         /*
 108          * Modify TCR PTW cacheability attributes.
 109          */
 110         asm volatile(
 111         "       mrs     %0, tcr_el1\n"
 112         "       bic     %0, %0, %2\n"
 113         "       orr     %0, %0, %1\n"
 114         "       msr     tcr_el1, %0\n"
 115         "       isb\n"
 116         : "=&r" (tmp)
 117         : "r" (cache_policies[i].tcr), "r" (TCR_IRGN_MASK | TCR_ORGN_MASK));
 118
 119         flush_cache_all();
 120
 121         return 0;
 122 }
 123 early_param("cachepolicy", early_cachepolicy);
 124
 125 /*
 126  * Adjust the PMD section entries according to the CPU in use.
 127  */
 128 void __init init_mem_pgprot(void)
 129 {
 130         pteval_t default_pgprot;
 131         int i;
 132
 133         default_pgprot = PTE_ATTRINDX(MT_NORMAL);
 134         prot_sect_kernel = PMD_TYPE_SECT | PMD_SECT_AF | PMD_ATTRINDX(MT_NORMAL);
 135
 136 #ifdef CONFIG_SMP
 137         /*
 138          * Mark memory with the "shared" attribute for SMP systems
 139          */
 140         default_pgprot |= PTE_SHARED;
 141         prot_sect_kernel |= PMD_SECT_S;
 142 #endif
 143
 144         for (i = 0; i < 16; i++) {
 145                 unsigned long v = pgprot_val(protection_map[i]);
 146                 protection_map[i] = __pgprot(v | default_pgprot);
 147         }
 148
 149         pgprot_default = __pgprot(PTE_TYPE_PAGE | PTE_AF | default_pgprot);
 150 }
 151
 152 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 153                               unsigned long size, pgprot_t vma_prot)
 154 {
 155         if (!pfn_valid(pfn))
 156                 return pgprot_noncached(vma_prot);
 157         else if (file->f_flags & O_SYNC)
 158                 return pgprot_writecombine(vma_prot);
 159         return vma_prot;
 160 }
 161 EXPORT_SYMBOL(phys_mem_access_prot);
 162
 163 static void __init *early_alloc(unsigned long sz)
 164 {
 165         void *ptr = __va(memblock_alloc(sz, sz));
 166         memset(ptr, 0, sz);
 167         return ptr;
 168 }
 169
 170 static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
 171                                   unsigned long end, unsigned long pfn)
 172 {
 173         pte_t *pte;
 174
 175         if (pmd_none(*pmd)) {
 176                 pte = early_alloc(PTRS_PER_PTE * sizeof(pte_t));
 177                 __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE);
 178         }
 179         BUG_ON(pmd_bad(*pmd));
 180
 181         pte = pte_offset_kernel(pmd, addr);
 182         do {
 183                 set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC));
 184                 pfn++;
 185         } while (pte++, addr += PAGE_SIZE, addr != end);
 186 }
 187
 188 static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
 189                                   unsigned long end, phys_addr_t phys)
 190 {
 191         pmd_t *pmd;
 192         unsigned long next;
 193
 194         /*
 195          * Check for initial section mappings in the pgd/pud and remove them.
 196          */
 197         if (pud_none(*pud) || pud_bad(*pud)) {
 198                 pmd = early_alloc(PTRS_PER_PMD * sizeof(pmd_t));
 199                 pud_populate(&init_mm, pud, pmd);
 200         }
 201
 202         pmd = pmd_offset(pud, addr);
 203         do {
 204                 next = pmd_addr_end(addr, end);
 205                 /* try section mapping first */
 206                 if (((addr | next | phys) & ~SECTION_MASK) == 0) {
 207                         pmd_t old_pmd =*pmd;
 208                         set_pmd(pmd, __pmd(phys | prot_sect_kernel));
 209                         /*
 210                          * Check for previous table entries created during
 211                          * boot (__create_page_tables) and flush them.
 212                          */
 213                         if (!pmd_none(old_pmd))
 214                                 flush_tlb_all();
 215                 } else {
 216                         alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys));
 217                 }
 218                 phys += next - addr;
 219         } while (pmd++, addr = next, addr != end);
 220 }
 221
 222 static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
 223                                   unsigned long end, unsigned long phys)
 224 {
 225         pud_t *pud = pud_offset(pgd, addr);
 226         unsigned long next;
 227
 228         do {
 229                 next = pud_addr_end(addr, end);
 230                 alloc_init_pmd(pud, addr, next, phys);
 231                 phys += next - addr;
 232         } while (pud++, addr = next, addr != end);
 233 }
 234
 235 /*
 236  * Create the page directory entries and any necessary page tables for the
 237  * mapping specified by 'md'.
 238  */
 239 static void __init create_mapping(phys_addr_t phys, unsigned long virt,
 240                                   phys_addr_t size)
 241 {
 242         unsigned long addr, length, end, next;
 243         pgd_t *pgd;
 244
 245         if (virt < VMALLOC_START) {
 246                 pr_warning("BUG: not creating mapping for 0x%016llx at 0x%016lx - outside kernel range\n",
 247                            phys, virt);
 248                 return;
 249         }
 250
 251         addr = virt & PAGE_MASK;
 252         length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
 253
 254         pgd = pgd_offset_k(addr);
 255         end = addr + length;
 256         do {
 257                 next = pgd_addr_end(addr, end);
 258                 alloc_init_pud(pgd, addr, next, phys);
 259                 phys += next - addr;
 260         } while (pgd++, addr = next, addr != end);
 261 }
 262
 263 static void __init map_mem(void)
 264 {
 265         struct memblock_region *reg;
 266         phys_addr_t limit;
 267
 268         /*
 269          * Temporarily limit the memblock range. We need to do this as
 270          * create_mapping requires puds, pmds and ptes to be allocated from
 271          * memory addressable from the initial direct kernel mapping.
 272          *
 273          * The initial direct kernel mapping, located at swapper_pg_dir,
 274          * gives us PGDIR_SIZE memory starting from PHYS_OFFSET (which must be
 275          * aligned to 2MB as per Documentation/arm64/booting.txt).
 276          */
 277         limit = PHYS_OFFSET + PGDIR_SIZE;
 278         memblock_set_current_limit(limit);
 279
 280         /* map all the memory banks */
 281         for_each_memblock(memory, reg) {
 282                 phys_addr_t start = reg->base;
 283                 phys_addr_t end = start + reg->size;
 284
 285                 if (start >= end)
 286                         break;
 287
 288 #ifndef CONFIG_ARM64_64K_PAGES
 289                 /*
 290                  * For the first memory bank align the start address and
 291                  * current memblock limit to prevent create_mapping() from
 292                  * allocating pte page tables from unmapped memory.
 293                  * When 64K pages are enabled, the pte page table for the
 294                  * first PGDIR_SIZE is already present in swapper_pg_dir.
 295                  */
 296                 if (start < limit)
 297                         start = ALIGN(start, PMD_SIZE);
 298                 if (end < limit) {
 299                         limit = end & PMD_MASK;
 300                         memblock_set_current_limit(limit);
 301                 }
 302 #endif
 303
 304                 create_mapping(start, __phys_to_virt(start), end - start);
 305         }
 306
 307         /* Limit no longer required. */
 308         memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
 309 }
 310
 311 /*
 312  * paging_init() sets up the page tables, initialises the zone memory
 313  * maps and sets up the zero page.
 314  */
 315 void __init paging_init(void)
 316 {
 317         void *zero_page;
 318
 319         map_mem();
 320
 321         /*
 322          * Finally flush the caches and tlb to ensure that we're in a
 323          * consistent state.
 324          */
 325         flush_cache_all();
 326         flush_tlb_all();
 327
 328         /* allocate the zero page. */
 329         zero_page = early_alloc(PAGE_SIZE);
 330
 331         bootmem_init();
 332
 333         empty_zero_page = virt_to_page(zero_page);
 334
 335         /*
 336          * TTBR0 is only used for the identity mapping at this stage. Make it
 337          * point to zero page to avoid speculatively fetching new entries.
 338          */
 339         cpu_set_reserved_ttbr0();
 340         flush_tlb_all();
 341 }
 342
 343 /*
 344  * Enable the identity mapping to allow the MMU disabling.
 345  */
 346 void setup_mm_for_reboot(void)
 347 {
 348         cpu_switch_mm(idmap_pg_dir, &init_mm);
 349         flush_tlb_all();
 350 }
 351
 352 /*
 353  * Check whether a kernel address is valid (derived from arch/x86/).
 354  */
 355 int kern_addr_valid(unsigned long addr)
 356 {
 357         pgd_t *pgd;
 358         pud_t *pud;
 359         pmd_t *pmd;
 360         pte_t *pte;
 361
 362         if ((((long)addr) >> VA_BITS) != -1UL)
 363                 return 0;
 364
 365         pgd = pgd_offset_k(addr);
 366         if (pgd_none(*pgd))
 367                 return 0;
 368
 369         pud = pud_offset(pgd, addr);
 370         if (pud_none(*pud))
 371                 return 0;
 372
 373         pmd = pmd_offset(pud, addr);
 374         if (pmd_none(*pmd))
 375                 return 0;
 376
 377         if (pmd_sect(*pmd))
 378                 return pfn_valid(pmd_pfn(*pmd));
 379
 380         pte = pte_offset_kernel(pmd, addr);
 381         if (pte_none(*pte))
 382                 return 0;
 383
 384         return pfn_valid(pte_pfn(*pte));
 385 }
 386 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 387 #ifdef CONFIG_ARM64_64K_PAGES
 388 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
 389 {
 390         return vmemmap_populate_basepages(start, end, node);
 391 }
 392 #else   /* !CONFIG_ARM64_64K_PAGES */
 393 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
 394 {
 395         unsigned long addr = start;
 396         unsigned long next;
 397         pgd_t *pgd;
 398         pud_t *pud;
 399         pmd_t *pmd;
 400
 401         do {
 402                 next = pmd_addr_end(addr, end);
 403
 404                 pgd = vmemmap_pgd_populate(addr, node);
 405                 if (!pgd)
 406                         return -ENOMEM;
 407
 408                 pud = vmemmap_pud_populate(pgd, addr, node);
 409                 if (!pud)
 410                         return -ENOMEM;
 411
 412                 pmd = pmd_offset(pud, addr);
 413                 if (pmd_none(*pmd)) {
 414                         void *p = NULL;
 415
 416                         p = vmemmap_alloc_block_buf(PMD_SIZE, node);
 417                         if (!p)
 418                                 return -ENOMEM;
 419
 420                         set_pmd(pmd, __pmd(__pa(p) | prot_sect_kernel));
 421                 } else
 422                         vmemmap_verify((pte_t *)pmd, node, addr, next);
 423         } while (addr = next, addr != end);
 424
 425         return 0;
 426 }
 427 #endif  /* CONFIG_ARM64_64K_PAGES */
 428 void vmemmap_free(unsigned long start, unsigned long end)
 429 {
 430 }
 431 #endif  /* CONFIG_SPARSEMEM_VMEMMAP */