087a2096f221f1203d4737c63123fb162952de38
2 * linux/arch/cris/mm/fault.c
4 * Low level bus fault handler
7 * Copyright (C) 2000-2007 Axis Communications AB
14 #include <asm/uaccess.h>
15 #include <asm/pgtable.h>
16 #include <arch/svinto.h>
17 #include <asm/mmu_context.h>
19 /* debug of low-level TLB reload */
28 extern const struct exception_table_entry
29 *search_exception_tables(unsigned long addr
);
31 asmlinkage
void do_page_fault(unsigned long address
, struct pt_regs
*regs
,
32 int protection
, int writeaccess
);
34 /* fast TLB-fill fault handler
35 * this is called from entry.S with interrupts disabled
39 handle_mmu_bus_fault(struct pt_regs
*regs
)
48 pgd_t
* pgd
= (pgd_t
*)per_cpu(current_pgd
, smp_processor_id());
51 int miss
, we
, writeac
;
52 unsigned long address
;
57 address
= cause
& PAGE_MASK
; /* get faulting address */
58 select
= *R_TLB_SELECT
;
61 page_id
= IO_EXTRACT(R_MMU_CAUSE
, page_id
, cause
);
62 acc
= IO_EXTRACT(R_MMU_CAUSE
, acc_excp
, cause
);
63 inv
= IO_EXTRACT(R_MMU_CAUSE
, inv_excp
, cause
);
64 index
= IO_EXTRACT(R_TLB_SELECT
, index
, select
);
66 miss
= IO_EXTRACT(R_MMU_CAUSE
, miss_excp
, cause
);
67 we
= IO_EXTRACT(R_MMU_CAUSE
, we_excp
, cause
);
68 writeac
= IO_EXTRACT(R_MMU_CAUSE
, wr_rd
, cause
);
70 D(printk("bus_fault from IRP 0x%lx: addr 0x%lx, miss %d, inv %d, we %d, acc %d, dx %d pid %d\n",
71 regs
->irp
, address
, miss
, inv
, we
, acc
, index
, page_id
));
73 /* leave it to the MM system fault handler */
75 do_page_fault(address
, regs
, 0, writeac
);
77 do_page_fault(address
, regs
, 1, we
);
79 /* Reload TLB with new entry to avoid an extra miss exception.
80 * do_page_fault may have flushed the TLB so we have to restore
83 local_save_flags(flags
);
85 pmd
= (pmd_t
*)(pgd
+ pgd_index(address
));
88 pte
= *pte_offset_kernel(pmd
, address
);
89 if (!pte_present(pte
))
91 *R_TLB_SELECT
= select
;
93 *R_TLB_LO
= pte_val(pte
);
95 local_irq_restore(flags
);
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