arch/ia64/hp/common/hwsw_iommu.c

   1 /*
   2  * Copyright (c) 2004 Hewlett-Packard Development Company, L.P.
   3  *   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
   4  *
   5  * This is a pseudo I/O MMU which dispatches to the hardware I/O MMU
   6  * whenever possible.  We assume that the hardware I/O MMU requires
   7  * full 32-bit addressability, as is the case, e.g., for HP zx1-based
   8  * systems (there, the I/O MMU window is mapped at 3-4GB).  If a
   9  * device doesn't provide full 32-bit addressability, we fall back on
  10  * the sw I/O TLB.  This is good enough to let us support broken
  11  * hardware such as soundcards which have a DMA engine that can
  12  * address only 28 bits.
  13  */
  14
  15 #include <linux/device.h>
  16
  17 #include <asm/machvec.h>
  18
  19 /* swiotlb declarations & definitions: */
  20 extern int swiotlb_late_init_with_default_size (size_t size);
  21 extern ia64_mv_dma_alloc_coherent       swiotlb_alloc_coherent;
  22 extern ia64_mv_dma_free_coherent        swiotlb_free_coherent;
  23 extern ia64_mv_dma_map_single_attrs     swiotlb_map_single_attrs;
  24 extern ia64_mv_dma_unmap_single_attrs   swiotlb_unmap_single_attrs;
  25 extern ia64_mv_dma_map_sg_attrs         swiotlb_map_sg_attrs;
  26 extern ia64_mv_dma_unmap_sg_attrs       swiotlb_unmap_sg_attrs;
  27 extern ia64_mv_dma_supported            swiotlb_dma_supported;
  28 extern ia64_mv_dma_mapping_error        swiotlb_dma_mapping_error;
  29
  30 /* hwiommu declarations & definitions: */
  31
  32 extern ia64_mv_dma_alloc_coherent       sba_alloc_coherent;
  33 extern ia64_mv_dma_free_coherent        sba_free_coherent;
  34 extern ia64_mv_dma_map_single_attrs     sba_map_single_attrs;
  35 extern ia64_mv_dma_unmap_single_attrs   sba_unmap_single_attrs;
  36 extern ia64_mv_dma_map_sg_attrs         sba_map_sg_attrs;
  37 extern ia64_mv_dma_unmap_sg_attrs       sba_unmap_sg_attrs;
  38 extern ia64_mv_dma_supported            sba_dma_supported;
  39 extern ia64_mv_dma_mapping_error        sba_dma_mapping_error;
  40
  41 #define hwiommu_alloc_coherent          sba_alloc_coherent
  42 #define hwiommu_free_coherent           sba_free_coherent
  43 #define hwiommu_map_single_attrs        sba_map_single_attrs
  44 #define hwiommu_unmap_single_attrs      sba_unmap_single_attrs
  45 #define hwiommu_map_sg_attrs            sba_map_sg_attrs
  46 #define hwiommu_unmap_sg_attrs          sba_unmap_sg_attrs
  47 #define hwiommu_dma_supported           sba_dma_supported
  48 #define hwiommu_dma_mapping_error       sba_dma_mapping_error
  49 #define hwiommu_sync_single_for_cpu     machvec_dma_sync_single
  50 #define hwiommu_sync_sg_for_cpu         machvec_dma_sync_sg
  51 #define hwiommu_sync_single_for_device  machvec_dma_sync_single
  52 #define hwiommu_sync_sg_for_device      machvec_dma_sync_sg
  53
  54
  55 /*
  56  * Note: we need to make the determination of whether or not to use
  57  * the sw I/O TLB based purely on the device structure.  Anything else
  58  * would be unreliable or would be too intrusive.
  59  */
  60 static inline int
  61 use_swiotlb (struct device *dev)
  62 {
  63         return dev && dev->dma_mask && !hwiommu_dma_supported(dev, *dev->dma_mask);
  64 }
  65
  66 void __init
  67 hwsw_init (void)
  68 {
  69         /* default to a smallish 2MB sw I/O TLB */
  70         if (swiotlb_late_init_with_default_size (2 * (1<<20)) != 0) {
  71 #ifdef CONFIG_IA64_GENERIC
  72                 /* Better to have normal DMA than panic */
  73                 printk(KERN_WARNING "%s: Failed to initialize software I/O TLB,"
  74                        " reverting to hpzx1 platform vector\n", __func__);
  75                 machvec_init("hpzx1");
  76 #else
  77                 panic("Unable to initialize software I/O TLB services");
  78 #endif
  79         }
  80 }
  81
  82 void *
  83 hwsw_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags)
  84 {
  85         if (use_swiotlb(dev))
  86                 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
  87         else
  88                 return hwiommu_alloc_coherent(dev, size, dma_handle, flags);
  89 }
  90
  91 void
  92 hwsw_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
  93 {
  94         if (use_swiotlb(dev))
  95                 swiotlb_free_coherent(dev, size, vaddr, dma_handle);
  96         else
  97                 hwiommu_free_coherent(dev, size, vaddr, dma_handle);
  98 }
  99
 100 dma_addr_t
 101 hwsw_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
 102                        struct dma_attrs *attrs)
 103 {
 104         if (use_swiotlb(dev))
 105                 return swiotlb_map_single_attrs(dev, addr, size, dir, attrs);
 106         else
 107                 return hwiommu_map_single_attrs(dev, addr, size, dir, attrs);
 108 }
 109 EXPORT_SYMBOL(hwsw_map_single_attrs);
 110
 111 void
 112 hwsw_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
 113                          int dir, struct dma_attrs *attrs)
 114 {
 115         if (use_swiotlb(dev))
 116                 return swiotlb_unmap_single_attrs(dev, iova, size, dir, attrs);
 117         else
 118                 return hwiommu_unmap_single_attrs(dev, iova, size, dir, attrs);
 119 }
 120 EXPORT_SYMBOL(hwsw_unmap_single_attrs);
 121
 122 int
 123 hwsw_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 124                    int dir, struct dma_attrs *attrs)
 125 {
 126         if (use_swiotlb(dev))
 127                 return swiotlb_map_sg_attrs(dev, sglist, nents, dir, attrs);
 128         else
 129                 return hwiommu_map_sg_attrs(dev, sglist, nents, dir, attrs);
 130 }
 131 EXPORT_SYMBOL(hwsw_map_sg_attrs);
 132
 133 void
 134 hwsw_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 135                      int dir, struct dma_attrs *attrs)
 136 {
 137         if (use_swiotlb(dev))
 138                 return swiotlb_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
 139         else
 140                 return hwiommu_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
 141 }
 142 EXPORT_SYMBOL(hwsw_unmap_sg_attrs);
 143
 144 void
 145 hwsw_sync_single_for_cpu (struct device *dev, dma_addr_t addr, size_t size, int dir)
 146 {
 147         if (use_swiotlb(dev))
 148                 swiotlb_sync_single_for_cpu(dev, addr, size, dir);
 149         else
 150                 hwiommu_sync_single_for_cpu(dev, addr, size, dir);
 151 }
 152
 153 void
 154 hwsw_sync_sg_for_cpu (struct device *dev, struct scatterlist *sg, int nelems, int dir)
 155 {
 156         if (use_swiotlb(dev))
 157                 swiotlb_sync_sg_for_cpu(dev, sg, nelems, dir);
 158         else
 159                 hwiommu_sync_sg_for_cpu(dev, sg, nelems, dir);
 160 }
 161
 162 void
 163 hwsw_sync_single_for_device (struct device *dev, dma_addr_t addr, size_t size, int dir)
 164 {
 165         if (use_swiotlb(dev))
 166                 swiotlb_sync_single_for_device(dev, addr, size, dir);
 167         else
 168                 hwiommu_sync_single_for_device(dev, addr, size, dir);
 169 }
 170
 171 void
 172 hwsw_sync_sg_for_device (struct device *dev, struct scatterlist *sg, int nelems, int dir)
 173 {
 174         if (use_swiotlb(dev))
 175                 swiotlb_sync_sg_for_device(dev, sg, nelems, dir);
 176         else
 177                 hwiommu_sync_sg_for_device(dev, sg, nelems, dir);
 178 }
 179
 180 int
 181 hwsw_dma_supported (struct device *dev, u64 mask)
 182 {
 183         if (hwiommu_dma_supported(dev, mask))
 184                 return 1;
 185         return swiotlb_dma_supported(dev, mask);
 186 }
 187
 188 int
 189 hwsw_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 190 {
 191         return hwiommu_dma_mapping_error(dev, dma_addr) ||
 192                 swiotlb_dma_mapping_error(dev, dma_addr);
 193 }
 194
 195 EXPORT_SYMBOL(hwsw_dma_mapping_error);
 196 EXPORT_SYMBOL(hwsw_dma_supported);
 197 EXPORT_SYMBOL(hwsw_alloc_coherent);
 198 EXPORT_SYMBOL(hwsw_free_coherent);
 199 EXPORT_SYMBOL(hwsw_sync_single_for_cpu);
 200 EXPORT_SYMBOL(hwsw_sync_single_for_device);
 201 EXPORT_SYMBOL(hwsw_sync_sg_for_cpu);
 202 EXPORT_SYMBOL(hwsw_sync_sg_for_device);