arch/m68k/Kconfig.cpu

   1 comment "Processor Type"
   2
   3 choice
   4         prompt "CPU family support"
   5         default M68KCLASSIC if MMU
   6         default COLDFIRE if !MMU
   7         help
   8           The Freescale (was Motorola) M68K family of processors implements
   9           the full 68000 processor instruction set.
  10           The Freescale ColdFire family of processors is a modern derivative
  11           of the 68000 processor family. They are mainly targeted at embedded
  12           applications, and are all System-On-Chip (SOC) devices, as opposed
  13           to stand alone CPUs. They implement a subset of the original 68000
  14           processor instruction set.
  15           If you anticipate running this kernel on a computer with a classic
  16           MC68xxx processor, select M68KCLASSIC.
  17           If you anticipate running this kernel on a computer with a ColdFire
  18           processor, select COLDFIRE.
  19
  20 config M68KCLASSIC
  21         bool "Classic M68K CPU family support"
  22
  23 config COLDFIRE
  24         bool "Coldfire CPU family support"
  25         select GENERIC_GPIO
  26         select ARCH_WANT_OPTIONAL_GPIOLIB
  27         select ARCH_HAVE_CUSTOM_GPIO_H
  28         select CPU_HAS_NO_BITFIELDS
  29         select CPU_HAS_NO_MULDIV64
  30         select GENERIC_CSUM
  31
  32 endchoice
  33
  34 if M68KCLASSIC
  35
  36 config M68000
  37         bool
  38         select CPU_HAS_NO_BITFIELDS
  39         select CPU_HAS_NO_MULDIV64
  40         select CPU_HAS_NO_UNALIGNED
  41         select GENERIC_CSUM
  42         help
  43           The Freescale (was Motorola) 68000 CPU is the first generation of
  44           the well known M68K family of processors. The CPU core as well as
  45           being available as a stand alone CPU was also used in many
  46           System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  47           a paging MMU.
  48
  49 config MCPU32
  50         bool
  51         select CPU_HAS_NO_BITFIELDS
  52         select CPU_HAS_NO_UNALIGNED
  53         help
  54           The Freescale (was then Motorola) CPU32 is a CPU core that is
  55           based on the 68020 processor. For the most part it is used in
  56           System-On-Chip parts, and does not contain a paging MMU.
  57
  58 config M68020
  59         bool "68020 support"
  60         depends on MMU
  61         select GENERIC_ATOMIC64
  62         select CPU_HAS_ADDRESS_SPACES
  63         help
  64           If you anticipate running this kernel on a computer with a MC68020
  65           processor, say Y. Otherwise, say N. Note that the 68020 requires a
  66           68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  67           Sun 3, which provides its own version.
  68
  69 config M68030
  70         bool "68030 support"
  71         depends on MMU && !MMU_SUN3
  72         select GENERIC_ATOMIC64
  73         select CPU_HAS_ADDRESS_SPACES
  74         help
  75           If you anticipate running this kernel on a computer with a MC68030
  76           processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  77           work, as it does not include an MMU (Memory Management Unit).
  78
  79 config M68040
  80         bool "68040 support"
  81         depends on MMU && !MMU_SUN3
  82         select GENERIC_ATOMIC64
  83         select CPU_HAS_ADDRESS_SPACES
  84         help
  85           If you anticipate running this kernel on a computer with a MC68LC040
  86           or MC68040 processor, say Y. Otherwise, say N. Note that an
  87           MC68EC040 will not work, as it does not include an MMU (Memory
  88           Management Unit).
  89
  90 config M68060
  91         bool "68060 support"
  92         depends on MMU && !MMU_SUN3
  93         select GENERIC_ATOMIC64
  94         select CPU_HAS_ADDRESS_SPACES
  95         help
  96           If you anticipate running this kernel on a computer with a MC68060
  97           processor, say Y. Otherwise, say N.
  98
  99 config M68328
 100         bool "MC68328"
 101         depends on !MMU
 102         select M68000
 103         help
 104           Motorola 68328 processor support.
 105
 106 config M68EZ328
 107         bool "MC68EZ328"
 108         depends on !MMU
 109         select M68000
 110         help
 111           Motorola 68EX328 processor support.
 112
 113 config M68VZ328
 114         bool "MC68VZ328"
 115         depends on !MMU
 116         select M68000
 117         help
 118           Motorola 68VZ328 processor support.
 119
 120 config M68360
 121         bool "MC68360"
 122         depends on !MMU
 123         select MCPU32
 124         help
 125           Motorola 68360 processor support.
 126
 127 endif # M68KCLASSIC
 128
 129 if COLDFIRE
 130
 131 config M5206
 132         bool "MCF5206"
 133         depends on !MMU
 134         select COLDFIRE_SW_A7
 135         select HAVE_MBAR
 136         help
 137           Motorola ColdFire 5206 processor support.
 138
 139 config M5206e
 140         bool "MCF5206e"
 141         depends on !MMU
 142         select COLDFIRE_SW_A7
 143         select HAVE_MBAR
 144         help
 145           Motorola ColdFire 5206e processor support.
 146
 147 config M520x
 148         bool "MCF520x"
 149         depends on !MMU
 150         select GENERIC_CLOCKEVENTS
 151         select HAVE_CACHE_SPLIT
 152         help
 153            Freescale Coldfire 5207/5208 processor support.
 154
 155 config M523x
 156         bool "MCF523x"
 157         depends on !MMU
 158         select GENERIC_CLOCKEVENTS
 159         select HAVE_CACHE_SPLIT
 160         select HAVE_IPSBAR
 161         help
 162           Freescale Coldfire 5230/1/2/4/5 processor support
 163
 164 config M5249
 165         bool "MCF5249"
 166         depends on !MMU
 167         select COLDFIRE_SW_A7
 168         select HAVE_MBAR
 169         help
 170           Motorola ColdFire 5249 processor support.
 171
 172 config M525x
 173         bool "MCF525x"
 174         depends on !MMU
 175         select COLDFIRE_SW_A7
 176         select HAVE_MBAR
 177         help
 178           Freescale (Motorola) Coldfire 5251/5253 processor support.
 179
 180 config M527x
 181         bool
 182
 183 config M5271
 184         bool "MCF5271"
 185         depends on !MMU
 186         select M527x
 187         select HAVE_CACHE_SPLIT
 188         select HAVE_IPSBAR
 189         select GENERIC_CLOCKEVENTS
 190         help
 191           Freescale (Motorola) ColdFire 5270/5271 processor support.
 192
 193 config M5272
 194         bool "MCF5272"
 195         depends on !MMU
 196         select COLDFIRE_SW_A7
 197         select HAVE_MBAR
 198         help
 199           Motorola ColdFire 5272 processor support.
 200
 201 config M5275
 202         bool "MCF5275"
 203         depends on !MMU
 204         select M527x
 205         select HAVE_CACHE_SPLIT
 206         select HAVE_IPSBAR
 207         select GENERIC_CLOCKEVENTS
 208         help
 209           Freescale (Motorola) ColdFire 5274/5275 processor support.
 210
 211 config M528x
 212         bool "MCF528x"
 213         depends on !MMU
 214         select GENERIC_CLOCKEVENTS
 215         select HAVE_CACHE_SPLIT
 216         select HAVE_IPSBAR
 217         help
 218           Motorola ColdFire 5280/5282 processor support.
 219
 220 config M5307
 221         bool "MCF5307"
 222         depends on !MMU
 223         select COLDFIRE_SW_A7
 224         select HAVE_CACHE_CB
 225         select HAVE_MBAR
 226         help
 227           Motorola ColdFire 5307 processor support.
 228
 229 config M532x
 230         bool "MCF532x"
 231         depends on !MMU
 232         select HAVE_CACHE_CB
 233         help
 234           Freescale (Motorola) ColdFire 532x processor support.
 235
 236 config M5407
 237         bool "MCF5407"
 238         depends on !MMU
 239         select COLDFIRE_SW_A7
 240         select HAVE_CACHE_CB
 241         select HAVE_MBAR
 242         help
 243           Motorola ColdFire 5407 processor support.
 244
 245 config M54xx
 246         bool
 247
 248 config M547x
 249         bool "MCF547x"
 250         select M54xx
 251         select MMU_COLDFIRE if MMU
 252         select HAVE_CACHE_CB
 253         select HAVE_MBAR
 254         help
 255           Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
 256
 257 config M548x
 258         bool "MCF548x"
 259         select MMU_COLDFIRE if MMU
 260         select M54xx
 261         select HAVE_CACHE_CB
 262         select HAVE_MBAR
 263         help
 264           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 265
 266 config M5441x
 267         bool "MCF5441x"
 268         depends on !MMU
 269         select GENERIC_CLOCKEVENTS
 270         select HAVE_CACHE_CB
 271         help
 272           Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
 273
 274 endif # COLDFIRE
 275
 276
 277 comment "Processor Specific Options"
 278
 279 config M68KFPU_EMU
 280         bool "Math emulation support (EXPERIMENTAL)"
 281         depends on MMU
 282         depends on EXPERIMENTAL
 283         help
 284           At some point in the future, this will cause floating-point math
 285           instructions to be emulated by the kernel on machines that lack a
 286           floating-point math coprocessor.  Thrill-seekers and chronically
 287           sleep-deprived psychotic hacker types can say Y now, everyone else
 288           should probably wait a while.
 289
 290 config M68KFPU_EMU_EXTRAPREC
 291         bool "Math emulation extra precision"
 292         depends on M68KFPU_EMU
 293         help
 294           The fpu uses normally a few bit more during calculations for
 295           correct rounding, the emulator can (often) do the same but this
 296           extra calculation can cost quite some time, so you can disable
 297           it here. The emulator will then "only" calculate with a 64 bit
 298           mantissa and round slightly incorrect, what is more than enough
 299           for normal usage.
 300
 301 config M68KFPU_EMU_ONLY
 302         bool "Math emulation only kernel"
 303         depends on M68KFPU_EMU
 304         help
 305           This option prevents any floating-point instructions from being
 306           compiled into the kernel, thereby the kernel doesn't save any
 307           floating point context anymore during task switches, so this
 308           kernel will only be usable on machines without a floating-point
 309           math coprocessor. This makes the kernel a bit faster as no tests
 310           needs to be executed whether a floating-point instruction in the
 311           kernel should be executed or not.
 312
 313 config ADVANCED
 314         bool "Advanced configuration options"
 315         depends on MMU
 316         ---help---
 317           This gives you access to some advanced options for the CPU. The
 318           defaults should be fine for most users, but these options may make
 319           it possible for you to improve performance somewhat if you know what
 320           you are doing.
 321
 322           Note that the answer to this question won't directly affect the
 323           kernel: saying N will just cause the configurator to skip all
 324           the questions about these options.
 325
 326           Most users should say N to this question.
 327
 328 config RMW_INSNS
 329         bool "Use read-modify-write instructions"
 330         depends on ADVANCED
 331         ---help---
 332           This allows to use certain instructions that work with indivisible
 333           read-modify-write bus cycles. While this is faster than the
 334           workaround of disabling interrupts, it can conflict with DMA
 335           ( = direct memory access) on many Amiga systems, and it is also said
 336           to destabilize other machines. It is very likely that this will
 337           cause serious problems on any Amiga or Atari Medusa if set. The only
 338           configuration where it should work are 68030-based Ataris, where it
 339           apparently improves performance. But you've been warned! Unless you
 340           really know what you are doing, say N. Try Y only if you're quite
 341           adventurous.
 342
 343 config SINGLE_MEMORY_CHUNK
 344         bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
 345         depends on MMU
 346         default y if SUN3
 347         select NEED_MULTIPLE_NODES
 348         help
 349           Ignore all but the first contiguous chunk of physical memory for VM
 350           purposes.  This will save a few bytes kernel size and may speed up
 351           some operations.  Say N if not sure.
 352
 353 config ARCH_DISCONTIGMEM_ENABLE
 354         def_bool MMU && !SINGLE_MEMORY_CHUNK
 355
 356 config 060_WRITETHROUGH
 357         bool "Use write-through caching for 68060 supervisor accesses"
 358         depends on ADVANCED && M68060
 359         ---help---
 360           The 68060 generally uses copyback caching of recently accessed data.
 361           Copyback caching means that memory writes will be held in an on-chip
 362           cache and only written back to memory some time later.  Saying Y
 363           here will force supervisor (kernel) accesses to use writethrough
 364           caching.  Writethrough caching means that data is written to memory
 365           straight away, so that cache and memory data always agree.
 366           Writethrough caching is less efficient, but is needed for some
 367           drivers on 68060 based systems where the 68060 bus snooping signal
 368           is hardwired on.  The 53c710 SCSI driver is known to suffer from
 369           this problem.
 370
 371 config M68K_L2_CACHE
 372         bool
 373         depends on MAC
 374         default y
 375
 376 config NODES_SHIFT
 377         int
 378         default "3"
 379         depends on !SINGLE_MEMORY_CHUNK
 380
 381 config CPU_HAS_NO_BITFIELDS
 382         bool
 383
 384 config CPU_HAS_NO_MULDIV64
 385         bool
 386
 387 config CPU_HAS_NO_UNALIGNED
 388         bool
 389
 390 config CPU_HAS_ADDRESS_SPACES
 391         bool
 392
 393 config FPU
 394         bool
 395
 396 config COLDFIRE_SW_A7
 397         bool
 398
 399 config HAVE_CACHE_SPLIT
 400         bool
 401
 402 config HAVE_CACHE_CB
 403         bool
 404
 405 config HAVE_MBAR
 406         bool
 407
 408 config HAVE_IPSBAR
 409         bool
 410
 411 config CLOCK_SET
 412         bool "Enable setting the CPU clock frequency"
 413         depends on COLDFIRE
 414         default n
 415         help
 416           On some CPU's you do not need to know what the core CPU clock
 417           frequency is. On these you can disable clock setting. On some
 418           traditional 68K parts, and on all ColdFire parts you need to set
 419           the appropriate CPU clock frequency. On these devices many of the
 420           onboard peripherals derive their timing from the master CPU clock
 421           frequency.
 422
 423 config CLOCK_FREQ
 424         int "Set the core clock frequency"
 425         default "66666666"
 426         depends on CLOCK_SET
 427         help
 428           Define the CPU clock frequency in use. This is the core clock
 429           frequency, it may or may not be the same as the external clock
 430           crystal fitted to your board. Some processors have an internal
 431           PLL and can have their frequency programmed at run time, others
 432           use internal dividers. In general the kernel won't setup a PLL
 433           if it is fitted (there are some exceptions). This value will be
 434           specific to the exact CPU that you are using.
 435
 436 config OLDMASK
 437         bool "Old mask 5307 (1H55J) silicon"
 438         depends on M5307
 439         help
 440           Build support for the older revision ColdFire 5307 silicon.
 441           Specifically this is the 1H55J mask revision.
 442
 443 if HAVE_CACHE_SPLIT
 444 choice
 445         prompt "Split Cache Configuration"
 446         default CACHE_I
 447
 448 config CACHE_I
 449         bool "Instruction"
 450         help
 451           Use all of the ColdFire CPU cache memory as an instruction cache.
 452
 453 config CACHE_D
 454         bool "Data"
 455         help
 456           Use all of the ColdFire CPU cache memory as a data cache.
 457
 458 config CACHE_BOTH
 459         bool "Both"
 460         help
 461           Split the ColdFire CPU cache, and use half as an instruction cache
 462           and half as a data cache.
 463 endchoice
 464 endif
 465
 466 if HAVE_CACHE_CB
 467 choice
 468         prompt "Data cache mode"
 469         default CACHE_WRITETHRU
 470
 471 config CACHE_WRITETHRU
 472         bool "Write-through"
 473         help
 474           The ColdFire CPU cache is set into Write-through mode.
 475
 476 config CACHE_COPYBACK
 477         bool "Copy-back"
 478         help
 479           The ColdFire CPU cache is set into Copy-back mode.
 480 endchoice
 481 endif
 482