arch/mips/au1000/pb1200/board_setup.c

   1 /*
   2  *
   3  * BRIEF MODULE DESCRIPTION
   4  *      Alchemy Pb1200/Db1200 board setup.
   5  *
   6  *  This program is free software; you can redistribute  it and/or modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  *
  11  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  12  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  14  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  17  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  19  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21  *
  22  *  You should have received a copy of the  GNU General Public License along
  23  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  24  *  675 Mass Ave, Cambridge, MA 02139, USA.
  25  */
  26 #include <linux/init.h>
  27 #include <linux/sched.h>
  28 #include <linux/ioport.h>
  29 #include <linux/mm.h>
  30 #include <linux/console.h>
  31 #include <linux/mc146818rtc.h>
  32 #include <linux/delay.h>
  33
  34 #if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
  35 #include <linux/ide.h>
  36 #endif
  37
  38 #include <asm/cpu.h>
  39 #include <asm/bootinfo.h>
  40 #include <asm/irq.h>
  41 #include <asm/mipsregs.h>
  42 #include <asm/reboot.h>
  43 #include <asm/pgtable.h>
  44 #include <asm/mach-au1x00/au1000.h>
  45 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  46
  47 #ifdef CONFIG_MIPS_PB1200
  48 #include <asm/mach-pb1x00/pb1200.h>
  49 #endif
  50
  51 #ifdef CONFIG_MIPS_DB1200
  52 #include <asm/mach-db1x00/db1200.h>
  53 #define PB1200_ETH_INT DB1200_ETH_INT
  54 #define PB1200_IDE_INT DB1200_IDE_INT
  55 #endif
  56
  57 extern void _board_init_irq(void);
  58 extern void (*board_init_irq)(void);
  59
  60 void board_reset(void)
  61 {
  62         bcsr->resets = 0;
  63         bcsr->system = 0;
  64 }
  65
  66 void __init board_setup(void)
  67 {
  68         char *argptr = NULL;
  69         u32 pin_func;
  70
  71 #if 0
  72         /* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
  73          * but it is board specific code, so put it here.
  74          */
  75         pin_func = au_readl(SYS_PINFUNC);
  76         au_sync();
  77         pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
  78         au_writel(pin_func, SYS_PINFUNC);
  79
  80         au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
  81         au_sync();
  82 #endif
  83
  84 #if defined(CONFIG_I2C_AU1550)
  85         {
  86         u32 freq0, clksrc;
  87
  88         /* Select SMBUS in CPLD */
  89         bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
  90
  91         pin_func = au_readl(SYS_PINFUNC);
  92         au_sync();
  93         pin_func &= ~(3<<17 | 1<<4);
  94         /* Set GPIOs correctly */
  95         pin_func |= 2<<17;
  96         au_writel(pin_func, SYS_PINFUNC);
  97         au_sync();
  98
  99         /* The i2c driver depends on 50Mhz clock */
 100         freq0 = au_readl(SYS_FREQCTRL0);
 101         au_sync();
 102         freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
 103         freq0 |= (3<<SYS_FC_FRDIV1_BIT);
 104         /* 396Mhz / (3+1)*2 == 49.5Mhz */
 105         au_writel(freq0, SYS_FREQCTRL0);
 106         au_sync();
 107         freq0 |= SYS_FC_FE1;
 108         au_writel(freq0, SYS_FREQCTRL0);
 109         au_sync();
 110
 111         clksrc = au_readl(SYS_CLKSRC);
 112         au_sync();
 113         clksrc &= ~0x01f00000;
 114         /* bit 22 is EXTCLK0 for PSC0 */
 115         clksrc |= (0x3 << 22);
 116         au_writel(clksrc, SYS_CLKSRC);
 117         au_sync();
 118         }
 119 #endif
 120
 121 #ifdef CONFIG_FB_AU1200
 122         argptr = prom_getcmdline();
 123 #ifdef CONFIG_MIPS_PB1200
 124         strcat(argptr, " video=au1200fb:panel:bs");
 125 #endif
 126 #ifdef CONFIG_MIPS_DB1200
 127         strcat(argptr, " video=au1200fb:panel:bs");
 128 #endif
 129 #endif
 130
 131         /* The Pb1200 development board uses external MUX for PSC0 to
 132         support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
 133         */
 134 #ifdef CONFIG_I2C_AU1550
 135         bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
 136 #endif
 137         au_sync();
 138
 139 #ifdef CONFIG_MIPS_PB1200
 140         printk("AMD Alchemy Pb1200 Board\n");
 141 #endif
 142 #ifdef CONFIG_MIPS_DB1200
 143         printk("AMD Alchemy Db1200 Board\n");
 144 #endif
 145
 146         /* Setup Pb1200 External Interrupt Controller */
 147         board_init_irq = _board_init_irq;
 148 }
 149
 150 int
 151 board_au1200fb_panel(void)
 152 {
 153         BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 154         int p;
 155
 156         p = bcsr->switches;
 157         p >>= 8;
 158         p &= 0x0F;
 159         return p;
 160 }
 161
 162 int
 163 board_au1200fb_panel_init(void)
 164 {
 165         /* Apply power */
 166     BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 167         bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
 168         /*printk("board_au1200fb_panel_init()\n"); */
 169         return 0;
 170 }
 171
 172 int
 173 board_au1200fb_panel_shutdown(void)
 174 {
 175         /* Remove power */
 176     BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 177         bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
 178         /*printk("board_au1200fb_panel_shutdown()\n"); */
 179         return 0;
 180 }
 181