2 * DECstation 5000/200 (KN02) Control and Status Register
5 * Copyright (c) 2002, 2003, 2005 Maciej W. Rozycki
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/init.h>
14 #include <linux/irq.h>
15 #include <linux/types.h>
17 #include <asm/dec/kn02.h>
21 * Bits 7:0 of the Control Register are write-only -- the
22 * corresponding bits of the Status Register have a different
23 * meaning. Hence we use a cache. It speeds up things a bit
26 * There is no default value -- it has to be initialized.
30 static int kn02_irq_base
;
32 static void unmask_kn02_irq(struct irq_data
*d
)
34 volatile u32
*csr
= (volatile u32
*)CKSEG1ADDR(KN02_SLOT_BASE
+
37 cached_kn02_csr
|= (1 << (d
->irq
- kn02_irq_base
+ 16));
38 *csr
= cached_kn02_csr
;
41 static void mask_kn02_irq(struct irq_data
*d
)
43 volatile u32
*csr
= (volatile u32
*)CKSEG1ADDR(KN02_SLOT_BASE
+
46 cached_kn02_csr
&= ~(1 << (d
->irq
- kn02_irq_base
+ 16));
47 *csr
= cached_kn02_csr
;
50 static void ack_kn02_irq(struct irq_data
*d
)
56 static struct irq_chip kn02_irq_type
= {
58 .irq_ack
= ack_kn02_irq
,
59 .irq_mask
= mask_kn02_irq
,
60 .irq_mask_ack
= ack_kn02_irq
,
61 .irq_unmask
= unmask_kn02_irq
,
64 void __init
init_kn02_irqs(int base
)
66 volatile u32
*csr
= (volatile u32
*)CKSEG1ADDR(KN02_SLOT_BASE
+
70 /* Mask interrupts. */
71 cached_kn02_csr
&= ~KN02_CSR_IOINTEN
;
72 *csr
= cached_kn02_csr
;
75 for (i
= base
; i
< base
+ KN02_IRQ_LINES
; i
++)
76 irq_set_chip_and_handler(i
, &kn02_irq_type
, handle_level_irq
);
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