Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / mips / fw / lib / call_o32.S
1 /*
2 * O32 interface for the 64 (or N32) ABI.
3 *
4 * Copyright (C) 2002 Maciej W. Rozycki
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12 #include <asm/asm.h>
13 #include <asm/regdef.h>
14
15 /* Maximum number of arguments supported. Must be even! */
16 #define O32_ARGC 32
17 /* Number of static registers we save. */
18 #define O32_STATC 11
19 /* Frame size for static register */
20 #define O32_FRAMESZ (SZREG * O32_STATC)
21 /* Frame size on new stack */
22 #define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC)
23
24 .text
25
26 /*
27 * O32 function call dispatcher, for interfacing 32-bit ROM routines.
28 *
29 * The standard 64 (N32) calling sequence is supported, with a0
30 * holding a function pointer, a1 a new stack pointer, a2-a7 -- its
31 * first six arguments and the stack -- remaining ones (up to O32_ARGC,
32 * including a2-a7). Static registers, gp and fp are preserved, v0 holds
33 * a result. This code relies on the called o32 function for sp and ra
34 * restoration and this dispatcher has to be placed in a KSEGx (or KUSEG)
35 * address space. Any pointers passed have to point to addresses within
36 * one of these spaces as well.
37 */
38 NESTED(call_o32, O32_FRAMESZ, ra)
39 REG_SUBU sp,O32_FRAMESZ
40
41 REG_S ra,O32_FRAMESZ-1*SZREG(sp)
42 REG_S fp,O32_FRAMESZ-2*SZREG(sp)
43 REG_S gp,O32_FRAMESZ-3*SZREG(sp)
44 REG_S s7,O32_FRAMESZ-4*SZREG(sp)
45 REG_S s6,O32_FRAMESZ-5*SZREG(sp)
46 REG_S s5,O32_FRAMESZ-6*SZREG(sp)
47 REG_S s4,O32_FRAMESZ-7*SZREG(sp)
48 REG_S s3,O32_FRAMESZ-8*SZREG(sp)
49 REG_S s2,O32_FRAMESZ-9*SZREG(sp)
50 REG_S s1,O32_FRAMESZ-10*SZREG(sp)
51 REG_S s0,O32_FRAMESZ-11*SZREG(sp)
52
53 move jp,a0
54 REG_SUBU s0,a1,O32_FRAMESZ_NEW
55 REG_S sp,O32_FRAMESZ_NEW-1*SZREG(s0)
56
57 sll a0,a2,zero
58 sll a1,a3,zero
59 sll a2,a4,zero
60 sll a3,a5,zero
61 sw a6,0x10(s0)
62 sw a7,0x14(s0)
63
64 PTR_LA t0,O32_FRAMESZ(sp)
65 PTR_LA t1,0x18(s0)
66 li t2,O32_ARGC-6
67 1:
68 lw t3,(t0)
69 REG_ADDU t0,SZREG
70 sw t3,(t1)
71 REG_SUBU t2,1
72 REG_ADDU t1,4
73 bnez t2,1b
74
75 move sp,s0
76
77 jalr jp
78
79 REG_L sp,O32_FRAMESZ_NEW-1*SZREG(sp)
80
81 REG_L s0,O32_FRAMESZ-11*SZREG(sp)
82 REG_L s1,O32_FRAMESZ-10*SZREG(sp)
83 REG_L s2,O32_FRAMESZ-9*SZREG(sp)
84 REG_L s3,O32_FRAMESZ-8*SZREG(sp)
85 REG_L s4,O32_FRAMESZ-7*SZREG(sp)
86 REG_L s5,O32_FRAMESZ-6*SZREG(sp)
87 REG_L s6,O32_FRAMESZ-5*SZREG(sp)
88 REG_L s7,O32_FRAMESZ-4*SZREG(sp)
89 REG_L gp,O32_FRAMESZ-3*SZREG(sp)
90 REG_L fp,O32_FRAMESZ-2*SZREG(sp)
91 REG_L ra,O32_FRAMESZ-1*SZREG(sp)
92
93 REG_ADDU sp,O32_FRAMESZ
94 jr ra
95 END(call_o32)
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