MIPS: KVM: Make various Cause variables 32-bit
[deliverable/linux.git] / arch / mips / include / asm / octeon / cvmx-l2d-defs.h
1 /***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2012 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28 #ifndef __CVMX_L2D_DEFS_H__
29 #define __CVMX_L2D_DEFS_H__
30
31 #define CVMX_L2D_BST0 (CVMX_ADD_IO_SEG(0x0001180080000780ull))
32 #define CVMX_L2D_BST1 (CVMX_ADD_IO_SEG(0x0001180080000788ull))
33 #define CVMX_L2D_BST2 (CVMX_ADD_IO_SEG(0x0001180080000790ull))
34 #define CVMX_L2D_BST3 (CVMX_ADD_IO_SEG(0x0001180080000798ull))
35 #define CVMX_L2D_ERR (CVMX_ADD_IO_SEG(0x0001180080000010ull))
36 #define CVMX_L2D_FADR (CVMX_ADD_IO_SEG(0x0001180080000018ull))
37 #define CVMX_L2D_FSYN0 (CVMX_ADD_IO_SEG(0x0001180080000020ull))
38 #define CVMX_L2D_FSYN1 (CVMX_ADD_IO_SEG(0x0001180080000028ull))
39 #define CVMX_L2D_FUS0 (CVMX_ADD_IO_SEG(0x00011800800007A0ull))
40 #define CVMX_L2D_FUS1 (CVMX_ADD_IO_SEG(0x00011800800007A8ull))
41 #define CVMX_L2D_FUS2 (CVMX_ADD_IO_SEG(0x00011800800007B0ull))
42 #define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
43
44 union cvmx_l2d_bst0 {
45 uint64_t u64;
46 struct cvmx_l2d_bst0_s {
47 #ifdef __BIG_ENDIAN_BITFIELD
48 uint64_t reserved_35_63:29;
49 uint64_t ftl:1;
50 uint64_t q0stat:34;
51 #else
52 uint64_t q0stat:34;
53 uint64_t ftl:1;
54 uint64_t reserved_35_63:29;
55 #endif
56 } s;
57 struct cvmx_l2d_bst0_s cn30xx;
58 struct cvmx_l2d_bst0_s cn31xx;
59 struct cvmx_l2d_bst0_s cn38xx;
60 struct cvmx_l2d_bst0_s cn38xxp2;
61 struct cvmx_l2d_bst0_s cn50xx;
62 struct cvmx_l2d_bst0_s cn52xx;
63 struct cvmx_l2d_bst0_s cn52xxp1;
64 struct cvmx_l2d_bst0_s cn56xx;
65 struct cvmx_l2d_bst0_s cn56xxp1;
66 struct cvmx_l2d_bst0_s cn58xx;
67 struct cvmx_l2d_bst0_s cn58xxp1;
68 };
69
70 union cvmx_l2d_bst1 {
71 uint64_t u64;
72 struct cvmx_l2d_bst1_s {
73 #ifdef __BIG_ENDIAN_BITFIELD
74 uint64_t reserved_34_63:30;
75 uint64_t q1stat:34;
76 #else
77 uint64_t q1stat:34;
78 uint64_t reserved_34_63:30;
79 #endif
80 } s;
81 struct cvmx_l2d_bst1_s cn30xx;
82 struct cvmx_l2d_bst1_s cn31xx;
83 struct cvmx_l2d_bst1_s cn38xx;
84 struct cvmx_l2d_bst1_s cn38xxp2;
85 struct cvmx_l2d_bst1_s cn50xx;
86 struct cvmx_l2d_bst1_s cn52xx;
87 struct cvmx_l2d_bst1_s cn52xxp1;
88 struct cvmx_l2d_bst1_s cn56xx;
89 struct cvmx_l2d_bst1_s cn56xxp1;
90 struct cvmx_l2d_bst1_s cn58xx;
91 struct cvmx_l2d_bst1_s cn58xxp1;
92 };
93
94 union cvmx_l2d_bst2 {
95 uint64_t u64;
96 struct cvmx_l2d_bst2_s {
97 #ifdef __BIG_ENDIAN_BITFIELD
98 uint64_t reserved_34_63:30;
99 uint64_t q2stat:34;
100 #else
101 uint64_t q2stat:34;
102 uint64_t reserved_34_63:30;
103 #endif
104 } s;
105 struct cvmx_l2d_bst2_s cn30xx;
106 struct cvmx_l2d_bst2_s cn31xx;
107 struct cvmx_l2d_bst2_s cn38xx;
108 struct cvmx_l2d_bst2_s cn38xxp2;
109 struct cvmx_l2d_bst2_s cn50xx;
110 struct cvmx_l2d_bst2_s cn52xx;
111 struct cvmx_l2d_bst2_s cn52xxp1;
112 struct cvmx_l2d_bst2_s cn56xx;
113 struct cvmx_l2d_bst2_s cn56xxp1;
114 struct cvmx_l2d_bst2_s cn58xx;
115 struct cvmx_l2d_bst2_s cn58xxp1;
116 };
117
118 union cvmx_l2d_bst3 {
119 uint64_t u64;
120 struct cvmx_l2d_bst3_s {
121 #ifdef __BIG_ENDIAN_BITFIELD
122 uint64_t reserved_34_63:30;
123 uint64_t q3stat:34;
124 #else
125 uint64_t q3stat:34;
126 uint64_t reserved_34_63:30;
127 #endif
128 } s;
129 struct cvmx_l2d_bst3_s cn30xx;
130 struct cvmx_l2d_bst3_s cn31xx;
131 struct cvmx_l2d_bst3_s cn38xx;
132 struct cvmx_l2d_bst3_s cn38xxp2;
133 struct cvmx_l2d_bst3_s cn50xx;
134 struct cvmx_l2d_bst3_s cn52xx;
135 struct cvmx_l2d_bst3_s cn52xxp1;
136 struct cvmx_l2d_bst3_s cn56xx;
137 struct cvmx_l2d_bst3_s cn56xxp1;
138 struct cvmx_l2d_bst3_s cn58xx;
139 struct cvmx_l2d_bst3_s cn58xxp1;
140 };
141
142 union cvmx_l2d_err {
143 uint64_t u64;
144 struct cvmx_l2d_err_s {
145 #ifdef __BIG_ENDIAN_BITFIELD
146 uint64_t reserved_6_63:58;
147 uint64_t bmhclsel:1;
148 uint64_t ded_err:1;
149 uint64_t sec_err:1;
150 uint64_t ded_intena:1;
151 uint64_t sec_intena:1;
152 uint64_t ecc_ena:1;
153 #else
154 uint64_t ecc_ena:1;
155 uint64_t sec_intena:1;
156 uint64_t ded_intena:1;
157 uint64_t sec_err:1;
158 uint64_t ded_err:1;
159 uint64_t bmhclsel:1;
160 uint64_t reserved_6_63:58;
161 #endif
162 } s;
163 struct cvmx_l2d_err_s cn30xx;
164 struct cvmx_l2d_err_s cn31xx;
165 struct cvmx_l2d_err_s cn38xx;
166 struct cvmx_l2d_err_s cn38xxp2;
167 struct cvmx_l2d_err_s cn50xx;
168 struct cvmx_l2d_err_s cn52xx;
169 struct cvmx_l2d_err_s cn52xxp1;
170 struct cvmx_l2d_err_s cn56xx;
171 struct cvmx_l2d_err_s cn56xxp1;
172 struct cvmx_l2d_err_s cn58xx;
173 struct cvmx_l2d_err_s cn58xxp1;
174 };
175
176 union cvmx_l2d_fadr {
177 uint64_t u64;
178 struct cvmx_l2d_fadr_s {
179 #ifdef __BIG_ENDIAN_BITFIELD
180 uint64_t reserved_19_63:45;
181 uint64_t fadru:1;
182 uint64_t fowmsk:4;
183 uint64_t fset:3;
184 uint64_t fadr:11;
185 #else
186 uint64_t fadr:11;
187 uint64_t fset:3;
188 uint64_t fowmsk:4;
189 uint64_t fadru:1;
190 uint64_t reserved_19_63:45;
191 #endif
192 } s;
193 struct cvmx_l2d_fadr_cn30xx {
194 #ifdef __BIG_ENDIAN_BITFIELD
195 uint64_t reserved_18_63:46;
196 uint64_t fowmsk:4;
197 uint64_t reserved_13_13:1;
198 uint64_t fset:2;
199 uint64_t reserved_9_10:2;
200 uint64_t fadr:9;
201 #else
202 uint64_t fadr:9;
203 uint64_t reserved_9_10:2;
204 uint64_t fset:2;
205 uint64_t reserved_13_13:1;
206 uint64_t fowmsk:4;
207 uint64_t reserved_18_63:46;
208 #endif
209 } cn30xx;
210 struct cvmx_l2d_fadr_cn31xx {
211 #ifdef __BIG_ENDIAN_BITFIELD
212 uint64_t reserved_18_63:46;
213 uint64_t fowmsk:4;
214 uint64_t reserved_13_13:1;
215 uint64_t fset:2;
216 uint64_t reserved_10_10:1;
217 uint64_t fadr:10;
218 #else
219 uint64_t fadr:10;
220 uint64_t reserved_10_10:1;
221 uint64_t fset:2;
222 uint64_t reserved_13_13:1;
223 uint64_t fowmsk:4;
224 uint64_t reserved_18_63:46;
225 #endif
226 } cn31xx;
227 struct cvmx_l2d_fadr_cn38xx {
228 #ifdef __BIG_ENDIAN_BITFIELD
229 uint64_t reserved_18_63:46;
230 uint64_t fowmsk:4;
231 uint64_t fset:3;
232 uint64_t fadr:11;
233 #else
234 uint64_t fadr:11;
235 uint64_t fset:3;
236 uint64_t fowmsk:4;
237 uint64_t reserved_18_63:46;
238 #endif
239 } cn38xx;
240 struct cvmx_l2d_fadr_cn38xx cn38xxp2;
241 struct cvmx_l2d_fadr_cn50xx {
242 #ifdef __BIG_ENDIAN_BITFIELD
243 uint64_t reserved_18_63:46;
244 uint64_t fowmsk:4;
245 uint64_t fset:3;
246 uint64_t reserved_8_10:3;
247 uint64_t fadr:8;
248 #else
249 uint64_t fadr:8;
250 uint64_t reserved_8_10:3;
251 uint64_t fset:3;
252 uint64_t fowmsk:4;
253 uint64_t reserved_18_63:46;
254 #endif
255 } cn50xx;
256 struct cvmx_l2d_fadr_cn52xx {
257 #ifdef __BIG_ENDIAN_BITFIELD
258 uint64_t reserved_18_63:46;
259 uint64_t fowmsk:4;
260 uint64_t fset:3;
261 uint64_t reserved_10_10:1;
262 uint64_t fadr:10;
263 #else
264 uint64_t fadr:10;
265 uint64_t reserved_10_10:1;
266 uint64_t fset:3;
267 uint64_t fowmsk:4;
268 uint64_t reserved_18_63:46;
269 #endif
270 } cn52xx;
271 struct cvmx_l2d_fadr_cn52xx cn52xxp1;
272 struct cvmx_l2d_fadr_s cn56xx;
273 struct cvmx_l2d_fadr_s cn56xxp1;
274 struct cvmx_l2d_fadr_s cn58xx;
275 struct cvmx_l2d_fadr_s cn58xxp1;
276 };
277
278 union cvmx_l2d_fsyn0 {
279 uint64_t u64;
280 struct cvmx_l2d_fsyn0_s {
281 #ifdef __BIG_ENDIAN_BITFIELD
282 uint64_t reserved_20_63:44;
283 uint64_t fsyn_ow1:10;
284 uint64_t fsyn_ow0:10;
285 #else
286 uint64_t fsyn_ow0:10;
287 uint64_t fsyn_ow1:10;
288 uint64_t reserved_20_63:44;
289 #endif
290 } s;
291 struct cvmx_l2d_fsyn0_s cn30xx;
292 struct cvmx_l2d_fsyn0_s cn31xx;
293 struct cvmx_l2d_fsyn0_s cn38xx;
294 struct cvmx_l2d_fsyn0_s cn38xxp2;
295 struct cvmx_l2d_fsyn0_s cn50xx;
296 struct cvmx_l2d_fsyn0_s cn52xx;
297 struct cvmx_l2d_fsyn0_s cn52xxp1;
298 struct cvmx_l2d_fsyn0_s cn56xx;
299 struct cvmx_l2d_fsyn0_s cn56xxp1;
300 struct cvmx_l2d_fsyn0_s cn58xx;
301 struct cvmx_l2d_fsyn0_s cn58xxp1;
302 };
303
304 union cvmx_l2d_fsyn1 {
305 uint64_t u64;
306 struct cvmx_l2d_fsyn1_s {
307 #ifdef __BIG_ENDIAN_BITFIELD
308 uint64_t reserved_20_63:44;
309 uint64_t fsyn_ow3:10;
310 uint64_t fsyn_ow2:10;
311 #else
312 uint64_t fsyn_ow2:10;
313 uint64_t fsyn_ow3:10;
314 uint64_t reserved_20_63:44;
315 #endif
316 } s;
317 struct cvmx_l2d_fsyn1_s cn30xx;
318 struct cvmx_l2d_fsyn1_s cn31xx;
319 struct cvmx_l2d_fsyn1_s cn38xx;
320 struct cvmx_l2d_fsyn1_s cn38xxp2;
321 struct cvmx_l2d_fsyn1_s cn50xx;
322 struct cvmx_l2d_fsyn1_s cn52xx;
323 struct cvmx_l2d_fsyn1_s cn52xxp1;
324 struct cvmx_l2d_fsyn1_s cn56xx;
325 struct cvmx_l2d_fsyn1_s cn56xxp1;
326 struct cvmx_l2d_fsyn1_s cn58xx;
327 struct cvmx_l2d_fsyn1_s cn58xxp1;
328 };
329
330 union cvmx_l2d_fus0 {
331 uint64_t u64;
332 struct cvmx_l2d_fus0_s {
333 #ifdef __BIG_ENDIAN_BITFIELD
334 uint64_t reserved_34_63:30;
335 uint64_t q0fus:34;
336 #else
337 uint64_t q0fus:34;
338 uint64_t reserved_34_63:30;
339 #endif
340 } s;
341 struct cvmx_l2d_fus0_s cn30xx;
342 struct cvmx_l2d_fus0_s cn31xx;
343 struct cvmx_l2d_fus0_s cn38xx;
344 struct cvmx_l2d_fus0_s cn38xxp2;
345 struct cvmx_l2d_fus0_s cn50xx;
346 struct cvmx_l2d_fus0_s cn52xx;
347 struct cvmx_l2d_fus0_s cn52xxp1;
348 struct cvmx_l2d_fus0_s cn56xx;
349 struct cvmx_l2d_fus0_s cn56xxp1;
350 struct cvmx_l2d_fus0_s cn58xx;
351 struct cvmx_l2d_fus0_s cn58xxp1;
352 };
353
354 union cvmx_l2d_fus1 {
355 uint64_t u64;
356 struct cvmx_l2d_fus1_s {
357 #ifdef __BIG_ENDIAN_BITFIELD
358 uint64_t reserved_34_63:30;
359 uint64_t q1fus:34;
360 #else
361 uint64_t q1fus:34;
362 uint64_t reserved_34_63:30;
363 #endif
364 } s;
365 struct cvmx_l2d_fus1_s cn30xx;
366 struct cvmx_l2d_fus1_s cn31xx;
367 struct cvmx_l2d_fus1_s cn38xx;
368 struct cvmx_l2d_fus1_s cn38xxp2;
369 struct cvmx_l2d_fus1_s cn50xx;
370 struct cvmx_l2d_fus1_s cn52xx;
371 struct cvmx_l2d_fus1_s cn52xxp1;
372 struct cvmx_l2d_fus1_s cn56xx;
373 struct cvmx_l2d_fus1_s cn56xxp1;
374 struct cvmx_l2d_fus1_s cn58xx;
375 struct cvmx_l2d_fus1_s cn58xxp1;
376 };
377
378 union cvmx_l2d_fus2 {
379 uint64_t u64;
380 struct cvmx_l2d_fus2_s {
381 #ifdef __BIG_ENDIAN_BITFIELD
382 uint64_t reserved_34_63:30;
383 uint64_t q2fus:34;
384 #else
385 uint64_t q2fus:34;
386 uint64_t reserved_34_63:30;
387 #endif
388 } s;
389 struct cvmx_l2d_fus2_s cn30xx;
390 struct cvmx_l2d_fus2_s cn31xx;
391 struct cvmx_l2d_fus2_s cn38xx;
392 struct cvmx_l2d_fus2_s cn38xxp2;
393 struct cvmx_l2d_fus2_s cn50xx;
394 struct cvmx_l2d_fus2_s cn52xx;
395 struct cvmx_l2d_fus2_s cn52xxp1;
396 struct cvmx_l2d_fus2_s cn56xx;
397 struct cvmx_l2d_fus2_s cn56xxp1;
398 struct cvmx_l2d_fus2_s cn58xx;
399 struct cvmx_l2d_fus2_s cn58xxp1;
400 };
401
402 union cvmx_l2d_fus3 {
403 uint64_t u64;
404 struct cvmx_l2d_fus3_s {
405 #ifdef __BIG_ENDIAN_BITFIELD
406 uint64_t reserved_40_63:24;
407 uint64_t ema_ctl:3;
408 uint64_t reserved_34_36:3;
409 uint64_t q3fus:34;
410 #else
411 uint64_t q3fus:34;
412 uint64_t reserved_34_36:3;
413 uint64_t ema_ctl:3;
414 uint64_t reserved_40_63:24;
415 #endif
416 } s;
417 struct cvmx_l2d_fus3_cn30xx {
418 #ifdef __BIG_ENDIAN_BITFIELD
419 uint64_t reserved_35_63:29;
420 uint64_t crip_64k:1;
421 uint64_t q3fus:34;
422 #else
423 uint64_t q3fus:34;
424 uint64_t crip_64k:1;
425 uint64_t reserved_35_63:29;
426 #endif
427 } cn30xx;
428 struct cvmx_l2d_fus3_cn31xx {
429 #ifdef __BIG_ENDIAN_BITFIELD
430 uint64_t reserved_35_63:29;
431 uint64_t crip_128k:1;
432 uint64_t q3fus:34;
433 #else
434 uint64_t q3fus:34;
435 uint64_t crip_128k:1;
436 uint64_t reserved_35_63:29;
437 #endif
438 } cn31xx;
439 struct cvmx_l2d_fus3_cn38xx {
440 #ifdef __BIG_ENDIAN_BITFIELD
441 uint64_t reserved_36_63:28;
442 uint64_t crip_256k:1;
443 uint64_t crip_512k:1;
444 uint64_t q3fus:34;
445 #else
446 uint64_t q3fus:34;
447 uint64_t crip_512k:1;
448 uint64_t crip_256k:1;
449 uint64_t reserved_36_63:28;
450 #endif
451 } cn38xx;
452 struct cvmx_l2d_fus3_cn38xx cn38xxp2;
453 struct cvmx_l2d_fus3_cn50xx {
454 #ifdef __BIG_ENDIAN_BITFIELD
455 uint64_t reserved_40_63:24;
456 uint64_t ema_ctl:3;
457 uint64_t reserved_36_36:1;
458 uint64_t crip_32k:1;
459 uint64_t crip_64k:1;
460 uint64_t q3fus:34;
461 #else
462 uint64_t q3fus:34;
463 uint64_t crip_64k:1;
464 uint64_t crip_32k:1;
465 uint64_t reserved_36_36:1;
466 uint64_t ema_ctl:3;
467 uint64_t reserved_40_63:24;
468 #endif
469 } cn50xx;
470 struct cvmx_l2d_fus3_cn52xx {
471 #ifdef __BIG_ENDIAN_BITFIELD
472 uint64_t reserved_40_63:24;
473 uint64_t ema_ctl:3;
474 uint64_t reserved_36_36:1;
475 uint64_t crip_128k:1;
476 uint64_t crip_256k:1;
477 uint64_t q3fus:34;
478 #else
479 uint64_t q3fus:34;
480 uint64_t crip_256k:1;
481 uint64_t crip_128k:1;
482 uint64_t reserved_36_36:1;
483 uint64_t ema_ctl:3;
484 uint64_t reserved_40_63:24;
485 #endif
486 } cn52xx;
487 struct cvmx_l2d_fus3_cn52xx cn52xxp1;
488 struct cvmx_l2d_fus3_cn56xx {
489 #ifdef __BIG_ENDIAN_BITFIELD
490 uint64_t reserved_40_63:24;
491 uint64_t ema_ctl:3;
492 uint64_t reserved_36_36:1;
493 uint64_t crip_512k:1;
494 uint64_t crip_1024k:1;
495 uint64_t q3fus:34;
496 #else
497 uint64_t q3fus:34;
498 uint64_t crip_1024k:1;
499 uint64_t crip_512k:1;
500 uint64_t reserved_36_36:1;
501 uint64_t ema_ctl:3;
502 uint64_t reserved_40_63:24;
503 #endif
504 } cn56xx;
505 struct cvmx_l2d_fus3_cn56xx cn56xxp1;
506 struct cvmx_l2d_fus3_cn58xx {
507 #ifdef __BIG_ENDIAN_BITFIELD
508 uint64_t reserved_39_63:25;
509 uint64_t ema_ctl:2;
510 uint64_t reserved_36_36:1;
511 uint64_t crip_512k:1;
512 uint64_t crip_1024k:1;
513 uint64_t q3fus:34;
514 #else
515 uint64_t q3fus:34;
516 uint64_t crip_1024k:1;
517 uint64_t crip_512k:1;
518 uint64_t reserved_36_36:1;
519 uint64_t ema_ctl:2;
520 uint64_t reserved_39_63:25;
521 #endif
522 } cn58xx;
523 struct cvmx_l2d_fus3_cn58xx cn58xxp1;
524 };
525
526 #endif
This page took 0.042433 seconds and 5 git commands to generate.