Merge tag 'yama-4.0' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux...
[deliverable/linux.git] / arch / mips / kernel / head.S
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994, 1995 Waldorf Electronics
7 * Written by Ralf Baechle and Andreas Busse
8 * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle
9 * Copyright (C) 1996 Paul M. Antoine
10 * Modified for DECStation and hence R3000 support by Paul M. Antoine
11 * Further modifications by David S. Miller and Harald Koerfgen
12 * Copyright (C) 1999 Silicon Graphics, Inc.
13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
15 */
16 #include <linux/init.h>
17 #include <linux/threads.h>
18
19 #include <asm/addrspace.h>
20 #include <asm/asm.h>
21 #include <asm/asmmacro.h>
22 #include <asm/irqflags.h>
23 #include <asm/regdef.h>
24 #include <asm/pgtable-bits.h>
25 #include <asm/mipsregs.h>
26 #include <asm/stackframe.h>
27
28 #include <kernel-entry-init.h>
29
30 /*
31 * For the moment disable interrupts, mark the kernel mode and
32 * set ST0_KX so that the CPU does not spit fire when using
33 * 64-bit addresses. A full initialization of the CPU's status
34 * register is done later in per_cpu_trap_init().
35 */
36 .macro setup_c0_status set clr
37 .set push
38 mfc0 t0, CP0_STATUS
39 or t0, ST0_CU0|\set|0x1f|\clr
40 xor t0, 0x1f|\clr
41 mtc0 t0, CP0_STATUS
42 .set noreorder
43 sll zero,3 # ehb
44 .set pop
45 .endm
46
47 .macro setup_c0_status_pri
48 #ifdef CONFIG_64BIT
49 setup_c0_status ST0_KX 0
50 #else
51 setup_c0_status 0 0
52 #endif
53 .endm
54
55 .macro setup_c0_status_sec
56 #ifdef CONFIG_64BIT
57 setup_c0_status ST0_KX ST0_BEV
58 #else
59 setup_c0_status 0 ST0_BEV
60 #endif
61 .endm
62
63 #ifndef CONFIG_NO_EXCEPT_FILL
64 /*
65 * Reserved space for exception handlers.
66 * Necessary for machines which link their kernels at KSEG0.
67 */
68 .fill 0x400
69 #endif
70
71 EXPORT(_stext)
72
73 #ifdef CONFIG_BOOT_RAW
74 /*
75 * Give us a fighting chance of running if execution beings at the
76 * kernel load address. This is needed because this platform does
77 * not have a ELF loader yet.
78 */
79 FEXPORT(__kernel_entry)
80 j kernel_entry
81 #endif
82
83 __REF
84
85 NESTED(kernel_entry, 16, sp) # kernel entry point
86
87 kernel_entry_setup # cpu specific setup
88
89 setup_c0_status_pri
90
91 /* We might not get launched at the address the kernel is linked to,
92 so we jump there. */
93 PTR_LA t0, 0f
94 jr t0
95 0:
96
97 PTR_LA t0, __bss_start # clear .bss
98 LONG_S zero, (t0)
99 PTR_LA t1, __bss_stop - LONGSIZE
100 1:
101 PTR_ADDIU t0, LONGSIZE
102 LONG_S zero, (t0)
103 bne t0, t1, 1b
104
105 LONG_S a0, fw_arg0 # firmware arguments
106 LONG_S a1, fw_arg1
107 LONG_S a2, fw_arg2
108 LONG_S a3, fw_arg3
109
110 MTC0 zero, CP0_CONTEXT # clear context register
111 PTR_LA $28, init_thread_union
112 /* Set the SP after an empty pt_regs. */
113 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
114 PTR_ADDU sp, $28
115 back_to_back_c0_hazard
116 set_saved_sp sp, t0, t1
117 PTR_SUBU sp, 4 * SZREG # init stack pointer
118
119 j start_kernel
120 END(kernel_entry)
121
122 #ifdef CONFIG_SMP
123 /*
124 * SMP slave cpus entry point. Board specific code for bootstrap calls this
125 * function after setting up the stack and gp registers.
126 */
127 NESTED(smp_bootstrap, 16, sp)
128 smp_slave_setup
129 setup_c0_status_sec
130 j start_secondary
131 END(smp_bootstrap)
132 #endif /* CONFIG_SMP */
This page took 0.035717 seconds and 5 git commands to generate.