cfa3ccf493bb1d36a645d582c74d12d93ca5761d
[deliverable/linux.git] / arch / mips / txx9 / generic / setup.c
1 /*
2 * linux/arch/mips/txx9/generic/setup.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
6 *
7 * 2003-2005 (c) MontaVista Software, Inc.
8 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/string.h>
19 #include <linux/module.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_core.h>
25 #include <linux/mtd/physmap.h>
26 #include <asm/bootinfo.h>
27 #include <asm/time.h>
28 #include <asm/reboot.h>
29 #include <asm/r4kcache.h>
30 #include <asm/txx9/generic.h>
31 #include <asm/txx9/pci.h>
32 #ifdef CONFIG_CPU_TX49XX
33 #include <asm/txx9/tx4938.h>
34 #endif
35
36 /* EBUSC settings of TX4927, etc. */
37 struct resource txx9_ce_res[8];
38 static char txx9_ce_res_name[8][4]; /* "CEn" */
39
40 /* pcode, internal register */
41 unsigned int txx9_pcode;
42 char txx9_pcode_str[8];
43 static struct resource txx9_reg_res = {
44 .name = txx9_pcode_str,
45 .flags = IORESOURCE_MEM,
46 };
47 void __init
48 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
49 {
50 int i;
51
52 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
53 sprintf(txx9_ce_res_name[i], "CE%d", i);
54 txx9_ce_res[i].flags = IORESOURCE_MEM;
55 txx9_ce_res[i].name = txx9_ce_res_name[i];
56 }
57
58 txx9_pcode = pcode;
59 sprintf(txx9_pcode_str, "TX%x", pcode);
60 if (base) {
61 txx9_reg_res.start = base & 0xfffffffffULL;
62 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
63 request_resource(&iomem_resource, &txx9_reg_res);
64 }
65 }
66
67 /* clocks */
68 unsigned int txx9_master_clock;
69 unsigned int txx9_cpu_clock;
70 unsigned int txx9_gbus_clock;
71
72 #ifdef CONFIG_CPU_TX39XX
73 /* don't enable by default - see errata */
74 int txx9_ccfg_toeon __initdata;
75 #else
76 int txx9_ccfg_toeon __initdata = 1;
77 #endif
78
79 /* Minimum CLK support */
80
81 struct clk *clk_get(struct device *dev, const char *id)
82 {
83 if (!strcmp(id, "spi-baseclk"))
84 return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
85 if (!strcmp(id, "imbus_clk"))
86 return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
87 return ERR_PTR(-ENOENT);
88 }
89 EXPORT_SYMBOL(clk_get);
90
91 int clk_enable(struct clk *clk)
92 {
93 return 0;
94 }
95 EXPORT_SYMBOL(clk_enable);
96
97 void clk_disable(struct clk *clk)
98 {
99 }
100 EXPORT_SYMBOL(clk_disable);
101
102 unsigned long clk_get_rate(struct clk *clk)
103 {
104 return (unsigned long)clk;
105 }
106 EXPORT_SYMBOL(clk_get_rate);
107
108 void clk_put(struct clk *clk)
109 {
110 }
111 EXPORT_SYMBOL(clk_put);
112
113 /* GPIO support */
114
115 #ifdef CONFIG_GENERIC_GPIO
116 int gpio_to_irq(unsigned gpio)
117 {
118 return -EINVAL;
119 }
120 EXPORT_SYMBOL(gpio_to_irq);
121
122 int irq_to_gpio(unsigned irq)
123 {
124 return -EINVAL;
125 }
126 EXPORT_SYMBOL(irq_to_gpio);
127 #endif
128
129 #define BOARD_VEC(board) extern struct txx9_board_vec board;
130 #include <asm/txx9/boards.h>
131 #undef BOARD_VEC
132
133 struct txx9_board_vec *txx9_board_vec __initdata;
134 static char txx9_system_type[32];
135
136 static struct txx9_board_vec *board_vecs[] __initdata = {
137 #define BOARD_VEC(board) &board,
138 #include <asm/txx9/boards.h>
139 #undef BOARD_VEC
140 };
141
142 static struct txx9_board_vec *__init find_board_byname(const char *name)
143 {
144 int i;
145
146 /* search board_vecs table */
147 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
148 if (strstr(board_vecs[i]->system, name))
149 return board_vecs[i];
150 }
151 return NULL;
152 }
153
154 static void __init prom_init_cmdline(void)
155 {
156 int argc = (int)fw_arg0;
157 int *argv32 = (int *)fw_arg1;
158 int i; /* Always ignore the "-c" at argv[0] */
159 char builtin[CL_SIZE];
160
161 /* ignore all built-in args if any f/w args given */
162 /*
163 * But if built-in strings was started with '+', append them
164 * to command line args. If built-in was started with '-',
165 * ignore all f/w args.
166 */
167 builtin[0] = '\0';
168 if (arcs_cmdline[0] == '+')
169 strcpy(builtin, arcs_cmdline + 1);
170 else if (arcs_cmdline[0] == '-') {
171 strcpy(builtin, arcs_cmdline + 1);
172 argc = 0;
173 } else if (argc <= 1)
174 strcpy(builtin, arcs_cmdline);
175 arcs_cmdline[0] = '\0';
176
177 for (i = 1; i < argc; i++) {
178 char *str = (char *)(long)argv32[i];
179 if (i != 1)
180 strcat(arcs_cmdline, " ");
181 if (strchr(str, ' ')) {
182 strcat(arcs_cmdline, "\"");
183 strcat(arcs_cmdline, str);
184 strcat(arcs_cmdline, "\"");
185 } else
186 strcat(arcs_cmdline, str);
187 }
188 /* append saved builtin args */
189 if (builtin[0]) {
190 if (arcs_cmdline[0])
191 strcat(arcs_cmdline, " ");
192 strcat(arcs_cmdline, builtin);
193 }
194 }
195
196 static int txx9_ic_disable __initdata;
197 static int txx9_dc_disable __initdata;
198
199 #if defined(CONFIG_CPU_TX49XX)
200 /* flush all cache on very early stage (before 4k_cache_init) */
201 static void __init early_flush_dcache(void)
202 {
203 unsigned int conf = read_c0_config();
204 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
205 unsigned int linesz = 32;
206 unsigned long addr, end;
207
208 end = INDEX_BASE + dc_size / 4;
209 /* 4way, waybit=0 */
210 for (addr = INDEX_BASE; addr < end; addr += linesz) {
211 cache_op(Index_Writeback_Inv_D, addr | 0);
212 cache_op(Index_Writeback_Inv_D, addr | 1);
213 cache_op(Index_Writeback_Inv_D, addr | 2);
214 cache_op(Index_Writeback_Inv_D, addr | 3);
215 }
216 }
217
218 static void __init txx9_cache_fixup(void)
219 {
220 unsigned int conf;
221
222 conf = read_c0_config();
223 /* flush and disable */
224 if (txx9_ic_disable) {
225 conf |= TX49_CONF_IC;
226 write_c0_config(conf);
227 }
228 if (txx9_dc_disable) {
229 early_flush_dcache();
230 conf |= TX49_CONF_DC;
231 write_c0_config(conf);
232 }
233
234 /* enable cache */
235 conf = read_c0_config();
236 if (!txx9_ic_disable)
237 conf &= ~TX49_CONF_IC;
238 if (!txx9_dc_disable)
239 conf &= ~TX49_CONF_DC;
240 write_c0_config(conf);
241
242 if (conf & TX49_CONF_IC)
243 pr_info("TX49XX I-Cache disabled.\n");
244 if (conf & TX49_CONF_DC)
245 pr_info("TX49XX D-Cache disabled.\n");
246 }
247 #elif defined(CONFIG_CPU_TX39XX)
248 /* flush all cache on very early stage (before tx39_cache_init) */
249 static void __init early_flush_dcache(void)
250 {
251 unsigned int conf = read_c0_config();
252 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
253 TX39_CONF_DCS_SHIFT));
254 unsigned int linesz = 16;
255 unsigned long addr, end;
256
257 end = INDEX_BASE + dc_size / 2;
258 /* 2way, waybit=0 */
259 for (addr = INDEX_BASE; addr < end; addr += linesz) {
260 cache_op(Index_Writeback_Inv_D, addr | 0);
261 cache_op(Index_Writeback_Inv_D, addr | 1);
262 }
263 }
264
265 static void __init txx9_cache_fixup(void)
266 {
267 unsigned int conf;
268
269 conf = read_c0_config();
270 /* flush and disable */
271 if (txx9_ic_disable) {
272 conf &= ~TX39_CONF_ICE;
273 write_c0_config(conf);
274 }
275 if (txx9_dc_disable) {
276 early_flush_dcache();
277 conf &= ~TX39_CONF_DCE;
278 write_c0_config(conf);
279 }
280
281 /* enable cache */
282 conf = read_c0_config();
283 if (!txx9_ic_disable)
284 conf |= TX39_CONF_ICE;
285 if (!txx9_dc_disable)
286 conf |= TX39_CONF_DCE;
287 write_c0_config(conf);
288
289 if (!(conf & TX39_CONF_ICE))
290 pr_info("TX39XX I-Cache disabled.\n");
291 if (!(conf & TX39_CONF_DCE))
292 pr_info("TX39XX D-Cache disabled.\n");
293 }
294 #else
295 static inline void txx9_cache_fixup(void)
296 {
297 }
298 #endif
299
300 static void __init preprocess_cmdline(void)
301 {
302 char cmdline[CL_SIZE];
303 char *s;
304
305 strcpy(cmdline, arcs_cmdline);
306 s = cmdline;
307 arcs_cmdline[0] = '\0';
308 while (s && *s) {
309 char *str = strsep(&s, " ");
310 if (strncmp(str, "board=", 6) == 0) {
311 txx9_board_vec = find_board_byname(str + 6);
312 continue;
313 } else if (strncmp(str, "masterclk=", 10) == 0) {
314 unsigned long val;
315 if (strict_strtoul(str + 10, 10, &val) == 0)
316 txx9_master_clock = val;
317 continue;
318 } else if (strcmp(str, "icdisable") == 0) {
319 txx9_ic_disable = 1;
320 continue;
321 } else if (strcmp(str, "dcdisable") == 0) {
322 txx9_dc_disable = 1;
323 continue;
324 } else if (strcmp(str, "toeoff") == 0) {
325 txx9_ccfg_toeon = 0;
326 continue;
327 } else if (strcmp(str, "toeon") == 0) {
328 txx9_ccfg_toeon = 1;
329 continue;
330 }
331 if (arcs_cmdline[0])
332 strcat(arcs_cmdline, " ");
333 strcat(arcs_cmdline, str);
334 }
335
336 txx9_cache_fixup();
337 }
338
339 static void __init select_board(void)
340 {
341 const char *envstr;
342
343 /* first, determine by "board=" argument in preprocess_cmdline() */
344 if (txx9_board_vec)
345 return;
346 /* next, determine by "board" envvar */
347 envstr = prom_getenv("board");
348 if (envstr) {
349 txx9_board_vec = find_board_byname(envstr);
350 if (txx9_board_vec)
351 return;
352 }
353
354 /* select "default" board */
355 #ifdef CONFIG_CPU_TX39XX
356 txx9_board_vec = &jmr3927_vec;
357 #endif
358 #ifdef CONFIG_CPU_TX49XX
359 switch (TX4938_REV_PCODE()) {
360 #ifdef CONFIG_TOSHIBA_RBTX4927
361 case 0x4927:
362 txx9_board_vec = &rbtx4927_vec;
363 break;
364 case 0x4937:
365 txx9_board_vec = &rbtx4937_vec;
366 break;
367 #endif
368 #ifdef CONFIG_TOSHIBA_RBTX4938
369 case 0x4938:
370 txx9_board_vec = &rbtx4938_vec;
371 break;
372 #endif
373 }
374 #endif
375 }
376
377 void __init prom_init(void)
378 {
379 prom_init_cmdline();
380 preprocess_cmdline();
381 select_board();
382
383 strcpy(txx9_system_type, txx9_board_vec->system);
384
385 txx9_board_vec->prom_init();
386 }
387
388 void __init prom_free_prom_memory(void)
389 {
390 }
391
392 const char *get_system_type(void)
393 {
394 return txx9_system_type;
395 }
396
397 char * __init prom_getcmdline(void)
398 {
399 return &(arcs_cmdline[0]);
400 }
401
402 const char *__init prom_getenv(const char *name)
403 {
404 const s32 *str = (const s32 *)fw_arg2;
405
406 if (!str)
407 return NULL;
408 /* YAMON style ("name", "value" pairs) */
409 while (str[0] && str[1]) {
410 if (!strcmp((const char *)(unsigned long)str[0], name))
411 return (const char *)(unsigned long)str[1];
412 str += 2;
413 }
414 return NULL;
415 }
416
417 static void __noreturn txx9_machine_halt(void)
418 {
419 local_irq_disable();
420 clear_c0_status(ST0_IM);
421 while (1) {
422 if (cpu_wait) {
423 (*cpu_wait)();
424 if (cpu_has_counter) {
425 /*
426 * Clear counter interrupt while it
427 * breaks WAIT instruction even if
428 * masked.
429 */
430 write_c0_compare(0);
431 }
432 }
433 }
434 }
435
436 /* Watchdog support */
437 void __init txx9_wdt_init(unsigned long base)
438 {
439 struct resource res = {
440 .start = base,
441 .end = base + 0x100 - 1,
442 .flags = IORESOURCE_MEM,
443 };
444 platform_device_register_simple("txx9wdt", -1, &res, 1);
445 }
446
447 /* SPI support */
448 void __init txx9_spi_init(int busid, unsigned long base, int irq)
449 {
450 struct resource res[] = {
451 {
452 .start = base,
453 .end = base + 0x20 - 1,
454 .flags = IORESOURCE_MEM,
455 }, {
456 .start = irq,
457 .flags = IORESOURCE_IRQ,
458 },
459 };
460 platform_device_register_simple("spi_txx9", busid,
461 res, ARRAY_SIZE(res));
462 }
463
464 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
465 {
466 struct platform_device *pdev =
467 platform_device_alloc("tc35815-mac", id);
468 if (!pdev ||
469 platform_device_add_data(pdev, ethaddr, 6) ||
470 platform_device_add(pdev))
471 platform_device_put(pdev);
472 }
473
474 void __init txx9_sio_init(unsigned long baseaddr, int irq,
475 unsigned int line, unsigned int sclk, int nocts)
476 {
477 #ifdef CONFIG_SERIAL_TXX9
478 struct uart_port req;
479
480 memset(&req, 0, sizeof(req));
481 req.line = line;
482 req.iotype = UPIO_MEM;
483 req.membase = ioremap(baseaddr, 0x24);
484 req.mapbase = baseaddr;
485 req.irq = irq;
486 if (!nocts)
487 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
488 if (sclk) {
489 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
490 req.uartclk = sclk;
491 } else
492 req.uartclk = TXX9_IMCLK;
493 early_serial_txx9_setup(&req);
494 #endif /* CONFIG_SERIAL_TXX9 */
495 }
496
497 #ifdef CONFIG_EARLY_PRINTK
498 static void __init null_prom_putchar(char c)
499 {
500 }
501 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
502
503 void __init prom_putchar(char c)
504 {
505 txx9_prom_putchar(c);
506 }
507
508 static void __iomem *early_txx9_sio_port;
509
510 static void __init early_txx9_sio_putchar(char c)
511 {
512 #define TXX9_SICISR 0x0c
513 #define TXX9_SITFIFO 0x1c
514 #define TXX9_SICISR_TXALS 0x00000002
515 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
516 TXX9_SICISR_TXALS))
517 ;
518 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
519 }
520
521 void __init txx9_sio_putchar_init(unsigned long baseaddr)
522 {
523 early_txx9_sio_port = ioremap(baseaddr, 0x24);
524 txx9_prom_putchar = early_txx9_sio_putchar;
525 }
526 #endif /* CONFIG_EARLY_PRINTK */
527
528 /* wrappers */
529 void __init plat_mem_setup(void)
530 {
531 ioport_resource.start = 0;
532 ioport_resource.end = ~0UL; /* no limit */
533 iomem_resource.start = 0;
534 iomem_resource.end = ~0UL; /* no limit */
535
536 /* fallback restart/halt routines */
537 _machine_restart = (void (*)(char *))txx9_machine_halt;
538 _machine_halt = txx9_machine_halt;
539 pm_power_off = txx9_machine_halt;
540
541 #ifdef CONFIG_PCI
542 pcibios_plat_setup = txx9_pcibios_setup;
543 #endif
544 txx9_board_vec->mem_setup();
545 }
546
547 void __init arch_init_irq(void)
548 {
549 txx9_board_vec->irq_setup();
550 }
551
552 void __init plat_time_init(void)
553 {
554 #ifdef CONFIG_CPU_TX49XX
555 mips_hpt_frequency = txx9_cpu_clock / 2;
556 #endif
557 txx9_board_vec->time_init();
558 }
559
560 static int __init _txx9_arch_init(void)
561 {
562 if (txx9_board_vec->arch_init)
563 txx9_board_vec->arch_init();
564 return 0;
565 }
566 arch_initcall(_txx9_arch_init);
567
568 static int __init _txx9_device_init(void)
569 {
570 if (txx9_board_vec->device_init)
571 txx9_board_vec->device_init();
572 return 0;
573 }
574 device_initcall(_txx9_device_init);
575
576 int (*txx9_irq_dispatch)(int pending);
577 asmlinkage void plat_irq_dispatch(void)
578 {
579 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
580 int irq = txx9_irq_dispatch(pending);
581
582 if (likely(irq >= 0))
583 do_IRQ(irq);
584 else
585 spurious_interrupt();
586 }
587
588 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
589 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
590 static unsigned long __swizzle_addr_none(unsigned long port)
591 {
592 return port;
593 }
594 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
595 EXPORT_SYMBOL(__swizzle_addr_b);
596 #endif
597
598 void __init txx9_physmap_flash_init(int no, unsigned long addr,
599 unsigned long size,
600 const struct physmap_flash_data *pdata)
601 {
602 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
603 struct resource res = {
604 .start = addr,
605 .end = addr + size - 1,
606 .flags = IORESOURCE_MEM,
607 };
608 struct platform_device *pdev;
609 #ifdef CONFIG_MTD_PARTITIONS
610 static struct mtd_partition parts[2];
611 struct physmap_flash_data pdata_part;
612
613 /* If this area contained boot area, make separate partition */
614 if (pdata->nr_parts == 0 && !pdata->parts &&
615 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
616 !parts[0].name) {
617 parts[0].name = "boot";
618 parts[0].offset = 0x1fc00000 - addr;
619 parts[0].size = addr + size - 0x1fc00000;
620 parts[1].name = "user";
621 parts[1].offset = 0;
622 parts[1].size = 0x1fc00000 - addr;
623 pdata_part = *pdata;
624 pdata_part.nr_parts = ARRAY_SIZE(parts);
625 pdata_part.parts = parts;
626 pdata = &pdata_part;
627 }
628 #endif
629 pdev = platform_device_alloc("physmap-flash", no);
630 if (!pdev ||
631 platform_device_add_resources(pdev, &res, 1) ||
632 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
633 platform_device_add(pdev))
634 platform_device_put(pdev);
635 #endif
636 }
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