arch/nios2/include/asm/registers.h

   1 /*
   2  * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  *
  17  */
  18
  19 #ifndef _ASM_NIOS2_REGISTERS_H
  20 #define _ASM_NIOS2_REGISTERS_H
  21
  22 #ifndef __ASSEMBLY__
  23 #include <asm/cpuinfo.h>
  24 #endif
  25
  26 /* control register numbers */
  27 #define CTL_STATUS      0
  28 #define CTL_ESTATUS     1
  29 #define CTL_BSTATUS     2
  30 #define CTL_IENABLE     3
  31 #define CTL_IPENDING    4
  32 #define CTL_CPUID       5
  33 #define CTL_RSV1        6
  34 #define CTL_EXCEPTION   7
  35 #define CTL_PTEADDR     8
  36 #define CTL_TLBACC      9
  37 #define CTL_TLBMISC     10
  38 #define CTL_RSV2        11
  39 #define CTL_BADADDR     12
  40 #define CTL_CONFIG      13
  41 #define CTL_MPUBASE     14
  42 #define CTL_MPUACC      15
  43
  44 /* access control registers using GCC builtins */
  45 #define RDCTL(r)        __builtin_rdctl(r)
  46 #define WRCTL(r, v)     __builtin_wrctl(r, v)
  47
  48 /* status register bits */
  49 #define STATUS_PIE      (1 << 0)        /* processor interrupt enable */
  50 #define STATUS_U        (1 << 1)        /* user mode */
  51 #define STATUS_EH       (1 << 2)        /* Exception mode */
  52
  53 /* estatus register bits */
  54 #define ESTATUS_EPIE    (1 << 0)        /* processor interrupt enable */
  55 #define ESTATUS_EU      (1 << 1)        /* user mode */
  56 #define ESTATUS_EH      (1 << 2)        /* Exception mode */
  57
  58 /* tlbmisc register bits */
  59 #define TLBMISC_PID_SHIFT       4
  60 #ifndef __ASSEMBLY__
  61 #define TLBMISC_PID_MASK        ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
  62 #endif
  63 #define TLBMISC_WAY_MASK        0xf
  64 #define TLBMISC_WAY_SHIFT       20
  65
  66 #define TLBMISC_PID     (TLBMISC_PID_MASK << TLBMISC_PID_SHIFT) /* TLB PID */
  67 #define TLBMISC_WE      (1 << 18)       /* TLB write enable */
  68 #define TLBMISC_RD      (1 << 19)       /* TLB read */
  69 #define TLBMISC_WAY     (TLBMISC_WAY_MASK << TLBMISC_WAY_SHIFT) /* TLB way */
  70
  71 #endif /* _ASM_NIOS2_REGISTERS_H */