2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Floating-point emulation code
5 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * linux/arch/math-emu/driver.c.c
24 * decodes and dispatches unimplemented FPU instructions
26 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
27 * Copyright (C) 2001 Hewlett-Packard <bame@debian.org>
30 #include <linux/sched.h>
37 #define extru(r,pos,len) (((r) >> (31-(pos))) & (( 1 << (len)) - 1))
41 /* Format of the floating-point exception registers. */
43 unsigned int exception
: 6;
47 /* Macros for grabbing bits of the instruction format from the 'ei'
49 /* Major opcode 0c and 0e */
50 #define FP0CE_UID(i) (((i) >> 6) & 3)
51 #define FP0CE_CLASS(i) (((i) >> 9) & 3)
52 #define FP0CE_SUBOP(i) (((i) >> 13) & 7)
53 #define FP0CE_SUBOP1(i) (((i) >> 15) & 7) /* Class 1 subopcode */
54 #define FP0C_FORMAT(i) (((i) >> 11) & 3)
55 #define FP0E_FORMAT(i) (((i) >> 11) & 1)
57 /* Major opcode 0c, uid 2 (performance monitoring) */
58 #define FPPM_SUBOP(i) (((i) >> 9) & 0x1f)
60 /* Major opcode 2e (fused operations). */
61 #define FP2E_SUBOP(i) (((i) >> 5) & 1)
62 #define FP2E_FORMAT(i) (((i) >> 11) & 1)
64 /* Major opcode 26 (FMPYSUB) */
65 /* Major opcode 06 (FMPYADD) */
66 #define FPx6_FORMAT(i) ((i) & 0x1f)
68 /* Flags and enable bits of the status word. */
69 #define FPSW_FLAGS(w) ((w) >> 27)
70 #define FPSW_ENABLE(w) ((w) & 0x1f)
77 /* Handle a floating point exception. Return zero if the faulting
78 instruction can be completed successfully. */
80 handle_fpe(struct pt_regs
*regs
)
82 extern void printbinary(unsigned long x
, int nbits
);
84 unsigned int orig_sw
, sw
;
86 /* need an intermediate copy of float regs because FPU emulation
87 * code expects an artificial last entry which contains zero
89 * also, the passed in fr registers contain one word that defines
90 * the fpu type. the fpu type information is constructed
91 * inside the emulation code
95 memcpy(frcopy
, regs
->fr
, sizeof regs
->fr
);
98 memcpy(&orig_sw
, frcopy
, sizeof(orig_sw
));
101 printk(KERN_DEBUG
"FP VZOUICxxxxCQCQCQCQCQCRMxxTDVZOUI ->\n ");
102 printbinary(orig_sw
, 32);
103 printk(KERN_DEBUG
"\n");
106 signalcode
= decode_fpu(frcopy
, 0x666);
108 /* Status word = FR0L. */
109 memcpy(&sw
, frcopy
, sizeof(sw
));
111 printk(KERN_DEBUG
"VZOUICxxxxCQCQCQCQCQCRMxxTDVZOUI decode_fpu returns %d|0x%x\n",
112 signalcode
>> 24, signalcode
& 0xffffff);
114 printk(KERN_DEBUG
"\n");
117 memcpy(regs
->fr
, frcopy
, sizeof regs
->fr
);
118 if (signalcode
!= 0) {
119 si
.si_signo
= signalcode
>> 24;
121 si
.si_code
= signalcode
& 0xffffff;
122 si
.si_addr
= (void __user
*) regs
->iaoq
[0];
123 force_sig_info(si
.si_signo
, &si
, current
);
127 return signalcode
? -1 : 0;
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