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[deliverable/linux.git] / arch / powerpc / boot / dts / katmai.dts
1 /*
2 * Device Tree Source for AMCC Katmai eval board
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
6 *
7 * Copyright (c) 2006, 2007 IBM Corp.
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15 /dts-v1/;
16
17 / {
18 #address-cells = <2>;
19 #size-cells = <2>;
20 model = "amcc,katmai";
21 compatible = "amcc,katmai";
22 dcr-parent = <&{/cpus/cpu@0}>;
23
24 aliases {
25 ethernet0 = &EMAC0;
26 serial0 = &UART0;
27 serial1 = &UART1;
28 serial2 = &UART2;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,440SPe";
38 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <32>;
42 d-cache-line-size = <32>;
43 i-cache-size = <32768>;
44 d-cache-size = <32768>;
45 dcr-controller;
46 dcr-access-method = "native";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
53 };
54
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440spe","ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
59 dcr-reg = <0x0c0 0x009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440spe","ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
69 dcr-reg = <0x0d0 0x009>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 interrupt-parent = <&UIC0>;
75 };
76
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-440spe","ibm,uic";
79 interrupt-controller;
80 cell-index = <2>;
81 dcr-reg = <0x0e0 0x009>;
82 #address-cells = <0>;
83 #size-cells = <0>;
84 #interrupt-cells = <2>;
85 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
86 interrupt-parent = <&UIC0>;
87 };
88
89 UIC3: interrupt-controller3 {
90 compatible = "ibm,uic-440spe","ibm,uic";
91 interrupt-controller;
92 cell-index = <3>;
93 dcr-reg = <0x0f0 0x009>;
94 #address-cells = <0>;
95 #size-cells = <0>;
96 #interrupt-cells = <2>;
97 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
98 interrupt-parent = <&UIC0>;
99 };
100
101 SDR0: sdr {
102 compatible = "ibm,sdr-440spe";
103 dcr-reg = <0x00e 0x002>;
104 };
105
106 CPR0: cpr {
107 compatible = "ibm,cpr-440spe";
108 dcr-reg = <0x00c 0x002>;
109 };
110
111 MQ0: mq {
112 compatible = "ibm,mq-440spe";
113 dcr-reg = <0x040 0x020>;
114 };
115
116 plb {
117 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
118 #address-cells = <2>;
119 #size-cells = <1>;
120 /* addr-child addr-parent size */
121 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
122 0x4 0x00200000 0x4 0x00200000 0x00000400
123 0x4 0xe0000000 0x4 0xe0000000 0x20000000
124 0xc 0x00000000 0xc 0x00000000 0x20000000
125 0xd 0x00000000 0xd 0x00000000 0x80000000
126 0xd 0x80000000 0xd 0x80000000 0x80000000
127 0xe 0x00000000 0xe 0x00000000 0x80000000
128 0xe 0x80000000 0xe 0x80000000 0x80000000
129 0xf 0x00000000 0xf 0x00000000 0x80000000
130 0xf 0x80000000 0xf 0x80000000 0x80000000>;
131 clock-frequency = <0>; /* Filled in by zImage */
132
133 SDRAM0: sdram {
134 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
135 dcr-reg = <0x010 0x002>;
136 };
137
138 MAL0: mcmal {
139 compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
140 dcr-reg = <0x180 0x062>;
141 num-tx-chans = <2>;
142 num-rx-chans = <1>;
143 interrupt-parent = <&MAL0>;
144 interrupts = <0x0 0x1 0x2 0x3 0x4>;
145 #interrupt-cells = <1>;
146 #address-cells = <0>;
147 #size-cells = <0>;
148 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
149 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
150 /*SERR*/ 0x2 &UIC1 0x1 0x4
151 /*TXDE*/ 0x3 &UIC1 0x2 0x4
152 /*RXDE*/ 0x4 &UIC1 0x3 0x4>;
153 };
154
155 POB0: opb {
156 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
157 #address-cells = <1>;
158 #size-cells = <1>;
159 ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>;
160 clock-frequency = <0>; /* Filled in by zImage */
161
162 EBC0: ebc {
163 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
164 dcr-reg = <0x012 0x002>;
165 #address-cells = <2>;
166 #size-cells = <1>;
167 clock-frequency = <0>; /* Filled in by zImage */
168 /* ranges property is supplied by U-Boot */
169 interrupts = <0x5 0x1>;
170 interrupt-parent = <&UIC1>;
171
172 nor_flash@0,0 {
173 compatible = "cfi-flash";
174 bank-width = <2>;
175 reg = <0x00000000 0x00000000 0x01000000>;
176 #address-cells = <1>;
177 #size-cells = <1>;
178 partition@0 {
179 label = "kernel";
180 reg = <0x00000000 0x001e0000>;
181 };
182 partition@1e0000 {
183 label = "dtb";
184 reg = <0x001e0000 0x00020000>;
185 };
186 partition@200000 {
187 label = "root";
188 reg = <0x00200000 0x00200000>;
189 };
190 partition@400000 {
191 label = "user";
192 reg = <0x00400000 0x00b60000>;
193 };
194 partition@f60000 {
195 label = "env";
196 reg = <0x00f60000 0x00040000>;
197 };
198 partition@fa0000 {
199 label = "u-boot";
200 reg = <0x00fa0000 0x00060000>;
201 };
202 };
203 };
204
205 UART0: serial@f0000200 {
206 device_type = "serial";
207 compatible = "ns16550";
208 reg = <0xf0000200 0x00000008>;
209 virtual-reg = <0xa0000200>;
210 clock-frequency = <0>; /* Filled in by zImage */
211 current-speed = <115200>;
212 interrupt-parent = <&UIC0>;
213 interrupts = <0x0 0x4>;
214 };
215
216 UART1: serial@f0000300 {
217 device_type = "serial";
218 compatible = "ns16550";
219 reg = <0xf0000300 0x00000008>;
220 virtual-reg = <0xa0000300>;
221 clock-frequency = <0>;
222 current-speed = <0>;
223 interrupt-parent = <&UIC0>;
224 interrupts = <0x1 0x4>;
225 };
226
227
228 UART2: serial@f0000600 {
229 device_type = "serial";
230 compatible = "ns16550";
231 reg = <0xf0000600 0x00000008>;
232 virtual-reg = <0xa0000600>;
233 clock-frequency = <0>;
234 current-speed = <0>;
235 interrupt-parent = <&UIC1>;
236 interrupts = <0x5 0x4>;
237 };
238
239 IIC0: i2c@f0000400 {
240 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
241 reg = <0xf0000400 0x00000014>;
242 interrupt-parent = <&UIC0>;
243 interrupts = <0x2 0x4>;
244 };
245
246 IIC1: i2c@f0000500 {
247 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
248 reg = <0xf0000500 0x00000014>;
249 interrupt-parent = <&UIC0>;
250 interrupts = <0x3 0x4>;
251 };
252
253 EMAC0: ethernet@f0000800 {
254 linux,network-index = <0x0>;
255 device_type = "network";
256 compatible = "ibm,emac-440spe", "ibm,emac4";
257 interrupt-parent = <&UIC1>;
258 interrupts = <0x1c 0x4 0x1d 0x4>;
259 reg = <0xf0000800 0x00000074>;
260 local-mac-address = [000000000000];
261 mal-device = <&MAL0>;
262 mal-tx-channel = <0>;
263 mal-rx-channel = <0>;
264 cell-index = <0>;
265 max-frame-size = <9000>;
266 rx-fifo-size = <4096>;
267 tx-fifo-size = <2048>;
268 phy-mode = "gmii";
269 phy-map = <0x00000000>;
270 has-inverted-stacr-oc;
271 has-new-stacr-staopc;
272 };
273 };
274
275 PCIX0: pci@c0ec00000 {
276 device_type = "pci";
277 #interrupt-cells = <1>;
278 #size-cells = <2>;
279 #address-cells = <3>;
280 compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
281 primary;
282 large-inbound-windows;
283 enable-msi-hole;
284 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
285 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
286 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
287 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
288 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
289
290 /* Outbound ranges, one memory and one IO,
291 * later cannot be changed
292 */
293 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
294 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
295
296 /* Inbound 4GB range starting at 0 */
297 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
298
299 /* This drives busses 0 to 0xf */
300 bus-range = <0x0 0xf>;
301
302 /*
303 * On Katmai, the following PCI-X interrupts signals
304 * have to be enabled via jumpers (only INTA is
305 * enabled per default):
306 *
307 * INTB: J3: 1-2
308 * INTC: J2: 1-2
309 * INTD: J1: 1-2
310 */
311 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
312 interrupt-map = <
313 /* IDSEL 1 */
314 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
315 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
316 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
317 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
318 >;
319 };
320
321 PCIE0: pciex@d00000000 {
322 device_type = "pci";
323 #interrupt-cells = <1>;
324 #size-cells = <2>;
325 #address-cells = <3>;
326 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
327 primary;
328 port = <0x0>; /* port number */
329 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
330 0x0000000c 0x10000000 0x00001000>; /* Registers */
331 dcr-reg = <0x100 0x020>;
332 sdr-base = <0x300>;
333
334 /* Outbound ranges, one memory and one IO,
335 * later cannot be changed
336 */
337 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
338 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
339
340 /* Inbound 4GB range starting at 0 */
341 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
342
343 /* This drives busses 0x10 to 0x1f */
344 bus-range = <0x10 0x1f>;
345
346 /* Legacy interrupts (note the weird polarity, the bridge seems
347 * to invert PCIe legacy interrupts).
348 * We are de-swizzling here because the numbers are actually for
349 * port of the root complex virtual P2P bridge. But I want
350 * to avoid putting a node for it in the tree, so the numbers
351 * below are basically de-swizzled numbers.
352 * The real slot is on idsel 0, so the swizzling is 1:1
353 */
354 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
355 interrupt-map = <
356 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
357 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
358 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
359 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
360 };
361
362 PCIE1: pciex@d20000000 {
363 device_type = "pci";
364 #interrupt-cells = <1>;
365 #size-cells = <2>;
366 #address-cells = <3>;
367 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
368 primary;
369 port = <0x1>; /* port number */
370 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
371 0x0000000c 0x10001000 0x00001000>; /* Registers */
372 dcr-reg = <0x120 0x020>;
373 sdr-base = <0x340>;
374
375 /* Outbound ranges, one memory and one IO,
376 * later cannot be changed
377 */
378 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
379 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
380
381 /* Inbound 4GB range starting at 0 */
382 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
383
384 /* This drives busses 0x20 to 0x2f */
385 bus-range = <0x20 0x2f>;
386
387 /* Legacy interrupts (note the weird polarity, the bridge seems
388 * to invert PCIe legacy interrupts).
389 * We are de-swizzling here because the numbers are actually for
390 * port of the root complex virtual P2P bridge. But I want
391 * to avoid putting a node for it in the tree, so the numbers
392 * below are basically de-swizzled numbers.
393 * The real slot is on idsel 0, so the swizzling is 1:1
394 */
395 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
396 interrupt-map = <
397 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
398 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
399 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
400 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
401 };
402
403 PCIE2: pciex@d40000000 {
404 device_type = "pci";
405 #interrupt-cells = <1>;
406 #size-cells = <2>;
407 #address-cells = <3>;
408 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
409 primary;
410 port = <0x2>; /* port number */
411 reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
412 0x0000000c 0x10002000 0x00001000>; /* Registers */
413 dcr-reg = <0x140 0x020>;
414 sdr-base = <0x370>;
415
416 /* Outbound ranges, one memory and one IO,
417 * later cannot be changed
418 */
419 ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
420 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
421
422 /* Inbound 4GB range starting at 0 */
423 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
424
425 /* This drives busses 0x30 to 0x3f */
426 bus-range = <0x30 0x3f>;
427
428 /* Legacy interrupts (note the weird polarity, the bridge seems
429 * to invert PCIe legacy interrupts).
430 * We are de-swizzling here because the numbers are actually for
431 * port of the root complex virtual P2P bridge. But I want
432 * to avoid putting a node for it in the tree, so the numbers
433 * below are basically de-swizzled numbers.
434 * The real slot is on idsel 0, so the swizzling is 1:1
435 */
436 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
437 interrupt-map = <
438 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
439 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
440 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
441 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
442 };
443
444 I2O: i2o@400100000 {
445 compatible = "ibm,i2o-440spe";
446 reg = <0x00000004 0x00100000 0x100>;
447 dcr-reg = <0x060 0x020>;
448 };
449
450 DMA0: dma0@400100100 {
451 compatible = "ibm,dma-440spe";
452 cell-index = <0>;
453 reg = <0x00000004 0x00100100 0x100>;
454 dcr-reg = <0x060 0x020>;
455 interrupt-parent = <&DMA0>;
456 interrupts = <0 1>;
457 #interrupt-cells = <1>;
458 #address-cells = <0>;
459 #size-cells = <0>;
460 interrupt-map = <
461 0 &UIC0 0x14 4
462 1 &UIC1 0x16 4>;
463 };
464
465 DMA1: dma1@400100200 {
466 compatible = "ibm,dma-440spe";
467 cell-index = <1>;
468 reg = <0x00000004 0x00100200 0x100>;
469 dcr-reg = <0x060 0x020>;
470 interrupt-parent = <&DMA1>;
471 interrupts = <0 1>;
472 #interrupt-cells = <1>;
473 #address-cells = <0>;
474 #size-cells = <0>;
475 interrupt-map = <
476 0 &UIC0 0x16 4
477 1 &UIC1 0x16 4>;
478 };
479
480 xor-accel@400200000 {
481 compatible = "amcc,xor-accelerator";
482 reg = <0x00000004 0x00200000 0x400>;
483 interrupt-parent = <&UIC1>;
484 interrupts = <0x1f 4>;
485 };
486 };
487
488 chosen {
489 linux,stdout-path = "/plb/opb/serial@f0000200";
490 };
491 };
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