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powerpc: Add AT_HWCAP2 to indicate V.CRYPTO category support
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23 #include <asm/setup.h>
24
25 struct cpu_spec* cur_cpu_spec = NULL;
26 EXPORT_SYMBOL(cur_cpu_spec);
27
28 /* The platform string corresponding to the real PVR */
29 const char *powerpc_base_platform;
30
31 /* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38 #ifdef CONFIG_PPC32
39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61 #endif /* CONFIG_PPC32 */
62 #ifdef CONFIG_PPC64
63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __restore_cpu_a2(void);
74 extern void __flush_tlb_power7(unsigned long inval_selector);
75 extern void __flush_tlb_power8(unsigned long inval_selector);
76 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
77 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
78 #endif /* CONFIG_PPC64 */
79 #if defined(CONFIG_E500)
80 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
81 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
82 extern void __restore_cpu_e5500(void);
83 extern void __restore_cpu_e6500(void);
84 #endif /* CONFIG_E500 */
85
86 /* This table only contains "desktop" CPUs, it need to be filled with embedded
87 * ones as well...
88 */
89 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
90 PPC_FEATURE_HAS_MMU)
91 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
92 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
93 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
95 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
103 PPC_FEATURE_TRUE_LE | \
104 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
105 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
106 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
108 PPC_FEATURE_TRUE_LE | \
109 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
110 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
111 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
113 PPC_FEATURE2_VEC_CRYPTO)
114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
115 PPC_FEATURE_TRUE_LE | \
116 PPC_FEATURE_HAS_ALTIVEC_COMP)
117 #ifdef CONFIG_PPC_BOOK3E_64
118 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
119 #else
120 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
121 PPC_FEATURE_BOOKE)
122 #endif
123
124 static struct cpu_spec __initdata cpu_specs[] = {
125 #ifdef CONFIG_PPC_BOOK3S_64
126 { /* Power3 */
127 .pvr_mask = 0xffff0000,
128 .pvr_value = 0x00400000,
129 .cpu_name = "POWER3 (630)",
130 .cpu_features = CPU_FTRS_POWER3,
131 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
132 .mmu_features = MMU_FTR_HPTE_TABLE,
133 .icache_bsize = 128,
134 .dcache_bsize = 128,
135 .num_pmcs = 8,
136 .pmc_type = PPC_PMC_IBM,
137 .oprofile_cpu_type = "ppc64/power3",
138 .oprofile_type = PPC_OPROFILE_RS64,
139 .platform = "power3",
140 },
141 { /* Power3+ */
142 .pvr_mask = 0xffff0000,
143 .pvr_value = 0x00410000,
144 .cpu_name = "POWER3 (630+)",
145 .cpu_features = CPU_FTRS_POWER3,
146 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
147 .mmu_features = MMU_FTR_HPTE_TABLE,
148 .icache_bsize = 128,
149 .dcache_bsize = 128,
150 .num_pmcs = 8,
151 .pmc_type = PPC_PMC_IBM,
152 .oprofile_cpu_type = "ppc64/power3",
153 .oprofile_type = PPC_OPROFILE_RS64,
154 .platform = "power3",
155 },
156 { /* Northstar */
157 .pvr_mask = 0xffff0000,
158 .pvr_value = 0x00330000,
159 .cpu_name = "RS64-II (northstar)",
160 .cpu_features = CPU_FTRS_RS64,
161 .cpu_user_features = COMMON_USER_PPC64,
162 .mmu_features = MMU_FTR_HPTE_TABLE,
163 .icache_bsize = 128,
164 .dcache_bsize = 128,
165 .num_pmcs = 8,
166 .pmc_type = PPC_PMC_IBM,
167 .oprofile_cpu_type = "ppc64/rs64",
168 .oprofile_type = PPC_OPROFILE_RS64,
169 .platform = "rs64",
170 },
171 { /* Pulsar */
172 .pvr_mask = 0xffff0000,
173 .pvr_value = 0x00340000,
174 .cpu_name = "RS64-III (pulsar)",
175 .cpu_features = CPU_FTRS_RS64,
176 .cpu_user_features = COMMON_USER_PPC64,
177 .mmu_features = MMU_FTR_HPTE_TABLE,
178 .icache_bsize = 128,
179 .dcache_bsize = 128,
180 .num_pmcs = 8,
181 .pmc_type = PPC_PMC_IBM,
182 .oprofile_cpu_type = "ppc64/rs64",
183 .oprofile_type = PPC_OPROFILE_RS64,
184 .platform = "rs64",
185 },
186 { /* I-star */
187 .pvr_mask = 0xffff0000,
188 .pvr_value = 0x00360000,
189 .cpu_name = "RS64-III (icestar)",
190 .cpu_features = CPU_FTRS_RS64,
191 .cpu_user_features = COMMON_USER_PPC64,
192 .mmu_features = MMU_FTR_HPTE_TABLE,
193 .icache_bsize = 128,
194 .dcache_bsize = 128,
195 .num_pmcs = 8,
196 .pmc_type = PPC_PMC_IBM,
197 .oprofile_cpu_type = "ppc64/rs64",
198 .oprofile_type = PPC_OPROFILE_RS64,
199 .platform = "rs64",
200 },
201 { /* S-star */
202 .pvr_mask = 0xffff0000,
203 .pvr_value = 0x00370000,
204 .cpu_name = "RS64-IV (sstar)",
205 .cpu_features = CPU_FTRS_RS64,
206 .cpu_user_features = COMMON_USER_PPC64,
207 .mmu_features = MMU_FTR_HPTE_TABLE,
208 .icache_bsize = 128,
209 .dcache_bsize = 128,
210 .num_pmcs = 8,
211 .pmc_type = PPC_PMC_IBM,
212 .oprofile_cpu_type = "ppc64/rs64",
213 .oprofile_type = PPC_OPROFILE_RS64,
214 .platform = "rs64",
215 },
216 { /* Power4 */
217 .pvr_mask = 0xffff0000,
218 .pvr_value = 0x00350000,
219 .cpu_name = "POWER4 (gp)",
220 .cpu_features = CPU_FTRS_POWER4,
221 .cpu_user_features = COMMON_USER_POWER4,
222 .mmu_features = MMU_FTRS_POWER4,
223 .icache_bsize = 128,
224 .dcache_bsize = 128,
225 .num_pmcs = 8,
226 .pmc_type = PPC_PMC_IBM,
227 .oprofile_cpu_type = "ppc64/power4",
228 .oprofile_type = PPC_OPROFILE_POWER4,
229 .platform = "power4",
230 },
231 { /* Power4+ */
232 .pvr_mask = 0xffff0000,
233 .pvr_value = 0x00380000,
234 .cpu_name = "POWER4+ (gq)",
235 .cpu_features = CPU_FTRS_POWER4,
236 .cpu_user_features = COMMON_USER_POWER4,
237 .mmu_features = MMU_FTRS_POWER4,
238 .icache_bsize = 128,
239 .dcache_bsize = 128,
240 .num_pmcs = 8,
241 .pmc_type = PPC_PMC_IBM,
242 .oprofile_cpu_type = "ppc64/power4",
243 .oprofile_type = PPC_OPROFILE_POWER4,
244 .platform = "power4",
245 },
246 { /* PPC970 */
247 .pvr_mask = 0xffff0000,
248 .pvr_value = 0x00390000,
249 .cpu_name = "PPC970",
250 .cpu_features = CPU_FTRS_PPC970,
251 .cpu_user_features = COMMON_USER_POWER4 |
252 PPC_FEATURE_HAS_ALTIVEC_COMP,
253 .mmu_features = MMU_FTRS_PPC970,
254 .icache_bsize = 128,
255 .dcache_bsize = 128,
256 .num_pmcs = 8,
257 .pmc_type = PPC_PMC_IBM,
258 .cpu_setup = __setup_cpu_ppc970,
259 .cpu_restore = __restore_cpu_ppc970,
260 .oprofile_cpu_type = "ppc64/970",
261 .oprofile_type = PPC_OPROFILE_POWER4,
262 .platform = "ppc970",
263 },
264 { /* PPC970FX */
265 .pvr_mask = 0xffff0000,
266 .pvr_value = 0x003c0000,
267 .cpu_name = "PPC970FX",
268 .cpu_features = CPU_FTRS_PPC970,
269 .cpu_user_features = COMMON_USER_POWER4 |
270 PPC_FEATURE_HAS_ALTIVEC_COMP,
271 .mmu_features = MMU_FTRS_PPC970,
272 .icache_bsize = 128,
273 .dcache_bsize = 128,
274 .num_pmcs = 8,
275 .pmc_type = PPC_PMC_IBM,
276 .cpu_setup = __setup_cpu_ppc970,
277 .cpu_restore = __restore_cpu_ppc970,
278 .oprofile_cpu_type = "ppc64/970",
279 .oprofile_type = PPC_OPROFILE_POWER4,
280 .platform = "ppc970",
281 },
282 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
283 .pvr_mask = 0xffffffff,
284 .pvr_value = 0x00440100,
285 .cpu_name = "PPC970MP",
286 .cpu_features = CPU_FTRS_PPC970,
287 .cpu_user_features = COMMON_USER_POWER4 |
288 PPC_FEATURE_HAS_ALTIVEC_COMP,
289 .mmu_features = MMU_FTRS_PPC970,
290 .icache_bsize = 128,
291 .dcache_bsize = 128,
292 .num_pmcs = 8,
293 .pmc_type = PPC_PMC_IBM,
294 .cpu_setup = __setup_cpu_ppc970,
295 .cpu_restore = __restore_cpu_ppc970,
296 .oprofile_cpu_type = "ppc64/970MP",
297 .oprofile_type = PPC_OPROFILE_POWER4,
298 .platform = "ppc970",
299 },
300 { /* PPC970MP */
301 .pvr_mask = 0xffff0000,
302 .pvr_value = 0x00440000,
303 .cpu_name = "PPC970MP",
304 .cpu_features = CPU_FTRS_PPC970,
305 .cpu_user_features = COMMON_USER_POWER4 |
306 PPC_FEATURE_HAS_ALTIVEC_COMP,
307 .mmu_features = MMU_FTRS_PPC970,
308 .icache_bsize = 128,
309 .dcache_bsize = 128,
310 .num_pmcs = 8,
311 .pmc_type = PPC_PMC_IBM,
312 .cpu_setup = __setup_cpu_ppc970MP,
313 .cpu_restore = __restore_cpu_ppc970,
314 .oprofile_cpu_type = "ppc64/970MP",
315 .oprofile_type = PPC_OPROFILE_POWER4,
316 .platform = "ppc970",
317 },
318 { /* PPC970GX */
319 .pvr_mask = 0xffff0000,
320 .pvr_value = 0x00450000,
321 .cpu_name = "PPC970GX",
322 .cpu_features = CPU_FTRS_PPC970,
323 .cpu_user_features = COMMON_USER_POWER4 |
324 PPC_FEATURE_HAS_ALTIVEC_COMP,
325 .mmu_features = MMU_FTRS_PPC970,
326 .icache_bsize = 128,
327 .dcache_bsize = 128,
328 .num_pmcs = 8,
329 .pmc_type = PPC_PMC_IBM,
330 .cpu_setup = __setup_cpu_ppc970,
331 .oprofile_cpu_type = "ppc64/970",
332 .oprofile_type = PPC_OPROFILE_POWER4,
333 .platform = "ppc970",
334 },
335 { /* Power5 GR */
336 .pvr_mask = 0xffff0000,
337 .pvr_value = 0x003a0000,
338 .cpu_name = "POWER5 (gr)",
339 .cpu_features = CPU_FTRS_POWER5,
340 .cpu_user_features = COMMON_USER_POWER5,
341 .mmu_features = MMU_FTRS_POWER5,
342 .icache_bsize = 128,
343 .dcache_bsize = 128,
344 .num_pmcs = 6,
345 .pmc_type = PPC_PMC_IBM,
346 .oprofile_cpu_type = "ppc64/power5",
347 .oprofile_type = PPC_OPROFILE_POWER4,
348 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
349 * and above but only works on POWER5 and above
350 */
351 .oprofile_mmcra_sihv = MMCRA_SIHV,
352 .oprofile_mmcra_sipr = MMCRA_SIPR,
353 .platform = "power5",
354 },
355 { /* Power5++ */
356 .pvr_mask = 0xffffff00,
357 .pvr_value = 0x003b0300,
358 .cpu_name = "POWER5+ (gs)",
359 .cpu_features = CPU_FTRS_POWER5,
360 .cpu_user_features = COMMON_USER_POWER5_PLUS,
361 .mmu_features = MMU_FTRS_POWER5,
362 .icache_bsize = 128,
363 .dcache_bsize = 128,
364 .num_pmcs = 6,
365 .oprofile_cpu_type = "ppc64/power5++",
366 .oprofile_type = PPC_OPROFILE_POWER4,
367 .oprofile_mmcra_sihv = MMCRA_SIHV,
368 .oprofile_mmcra_sipr = MMCRA_SIPR,
369 .platform = "power5+",
370 },
371 { /* Power5 GS */
372 .pvr_mask = 0xffff0000,
373 .pvr_value = 0x003b0000,
374 .cpu_name = "POWER5+ (gs)",
375 .cpu_features = CPU_FTRS_POWER5,
376 .cpu_user_features = COMMON_USER_POWER5_PLUS,
377 .mmu_features = MMU_FTRS_POWER5,
378 .icache_bsize = 128,
379 .dcache_bsize = 128,
380 .num_pmcs = 6,
381 .pmc_type = PPC_PMC_IBM,
382 .oprofile_cpu_type = "ppc64/power5+",
383 .oprofile_type = PPC_OPROFILE_POWER4,
384 .oprofile_mmcra_sihv = MMCRA_SIHV,
385 .oprofile_mmcra_sipr = MMCRA_SIPR,
386 .platform = "power5+",
387 },
388 { /* POWER6 in P5+ mode; 2.04-compliant processor */
389 .pvr_mask = 0xffffffff,
390 .pvr_value = 0x0f000001,
391 .cpu_name = "POWER5+",
392 .cpu_features = CPU_FTRS_POWER5,
393 .cpu_user_features = COMMON_USER_POWER5_PLUS,
394 .mmu_features = MMU_FTRS_POWER5,
395 .icache_bsize = 128,
396 .dcache_bsize = 128,
397 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
398 .oprofile_type = PPC_OPROFILE_POWER4,
399 .platform = "power5+",
400 },
401 { /* Power6 */
402 .pvr_mask = 0xffff0000,
403 .pvr_value = 0x003e0000,
404 .cpu_name = "POWER6 (raw)",
405 .cpu_features = CPU_FTRS_POWER6,
406 .cpu_user_features = COMMON_USER_POWER6 |
407 PPC_FEATURE_POWER6_EXT,
408 .mmu_features = MMU_FTRS_POWER6,
409 .icache_bsize = 128,
410 .dcache_bsize = 128,
411 .num_pmcs = 6,
412 .pmc_type = PPC_PMC_IBM,
413 .oprofile_cpu_type = "ppc64/power6",
414 .oprofile_type = PPC_OPROFILE_POWER4,
415 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
416 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
417 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
418 POWER6_MMCRA_OTHER,
419 .platform = "power6x",
420 },
421 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
422 .pvr_mask = 0xffffffff,
423 .pvr_value = 0x0f000002,
424 .cpu_name = "POWER6 (architected)",
425 .cpu_features = CPU_FTRS_POWER6,
426 .cpu_user_features = COMMON_USER_POWER6,
427 .mmu_features = MMU_FTRS_POWER6,
428 .icache_bsize = 128,
429 .dcache_bsize = 128,
430 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
431 .oprofile_type = PPC_OPROFILE_POWER4,
432 .platform = "power6",
433 },
434 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
435 .pvr_mask = 0xffffffff,
436 .pvr_value = 0x0f000003,
437 .cpu_name = "POWER7 (architected)",
438 .cpu_features = CPU_FTRS_POWER7,
439 .cpu_user_features = COMMON_USER_POWER7,
440 .cpu_user_features2 = COMMON_USER2_POWER7,
441 .mmu_features = MMU_FTRS_POWER7,
442 .icache_bsize = 128,
443 .dcache_bsize = 128,
444 .oprofile_type = PPC_OPROFILE_POWER4,
445 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
446 .cpu_setup = __setup_cpu_power7,
447 .cpu_restore = __restore_cpu_power7,
448 .flush_tlb = __flush_tlb_power7,
449 .machine_check_early = __machine_check_early_realmode_p7,
450 .platform = "power7",
451 },
452 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
453 .pvr_mask = 0xffffffff,
454 .pvr_value = 0x0f000004,
455 .cpu_name = "POWER8 (architected)",
456 .cpu_features = CPU_FTRS_POWER8,
457 .cpu_user_features = COMMON_USER_POWER8,
458 .cpu_user_features2 = COMMON_USER2_POWER8,
459 .mmu_features = MMU_FTRS_POWER8,
460 .icache_bsize = 128,
461 .dcache_bsize = 128,
462 .oprofile_type = PPC_OPROFILE_INVALID,
463 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
464 .cpu_setup = __setup_cpu_power8,
465 .cpu_restore = __restore_cpu_power8,
466 .flush_tlb = __flush_tlb_power8,
467 .machine_check_early = __machine_check_early_realmode_p8,
468 .platform = "power8",
469 },
470 { /* Power7 */
471 .pvr_mask = 0xffff0000,
472 .pvr_value = 0x003f0000,
473 .cpu_name = "POWER7 (raw)",
474 .cpu_features = CPU_FTRS_POWER7,
475 .cpu_user_features = COMMON_USER_POWER7,
476 .cpu_user_features2 = COMMON_USER2_POWER7,
477 .mmu_features = MMU_FTRS_POWER7,
478 .icache_bsize = 128,
479 .dcache_bsize = 128,
480 .num_pmcs = 6,
481 .pmc_type = PPC_PMC_IBM,
482 .oprofile_cpu_type = "ppc64/power7",
483 .oprofile_type = PPC_OPROFILE_POWER4,
484 .cpu_setup = __setup_cpu_power7,
485 .cpu_restore = __restore_cpu_power7,
486 .flush_tlb = __flush_tlb_power7,
487 .machine_check_early = __machine_check_early_realmode_p7,
488 .platform = "power7",
489 },
490 { /* Power7+ */
491 .pvr_mask = 0xffff0000,
492 .pvr_value = 0x004A0000,
493 .cpu_name = "POWER7+ (raw)",
494 .cpu_features = CPU_FTRS_POWER7,
495 .cpu_user_features = COMMON_USER_POWER7,
496 .cpu_user_features2 = COMMON_USER2_POWER7,
497 .mmu_features = MMU_FTRS_POWER7,
498 .icache_bsize = 128,
499 .dcache_bsize = 128,
500 .num_pmcs = 6,
501 .pmc_type = PPC_PMC_IBM,
502 .oprofile_cpu_type = "ppc64/power7",
503 .oprofile_type = PPC_OPROFILE_POWER4,
504 .cpu_setup = __setup_cpu_power7,
505 .cpu_restore = __restore_cpu_power7,
506 .flush_tlb = __flush_tlb_power7,
507 .machine_check_early = __machine_check_early_realmode_p7,
508 .platform = "power7+",
509 },
510 { /* Power8E */
511 .pvr_mask = 0xffff0000,
512 .pvr_value = 0x004b0000,
513 .cpu_name = "POWER8E (raw)",
514 .cpu_features = CPU_FTRS_POWER8E,
515 .cpu_user_features = COMMON_USER_POWER8,
516 .cpu_user_features2 = COMMON_USER2_POWER8,
517 .mmu_features = MMU_FTRS_POWER8,
518 .icache_bsize = 128,
519 .dcache_bsize = 128,
520 .num_pmcs = 6,
521 .pmc_type = PPC_PMC_IBM,
522 .oprofile_cpu_type = "ppc64/power8",
523 .oprofile_type = PPC_OPROFILE_INVALID,
524 .cpu_setup = __setup_cpu_power8,
525 .cpu_restore = __restore_cpu_power8,
526 .flush_tlb = __flush_tlb_power8,
527 .machine_check_early = __machine_check_early_realmode_p8,
528 .platform = "power8",
529 },
530 { /* Power8 */
531 .pvr_mask = 0xffff0000,
532 .pvr_value = 0x004d0000,
533 .cpu_name = "POWER8 (raw)",
534 .cpu_features = CPU_FTRS_POWER8,
535 .cpu_user_features = COMMON_USER_POWER8,
536 .cpu_user_features2 = COMMON_USER2_POWER8,
537 .mmu_features = MMU_FTRS_POWER8,
538 .icache_bsize = 128,
539 .dcache_bsize = 128,
540 .num_pmcs = 6,
541 .pmc_type = PPC_PMC_IBM,
542 .oprofile_cpu_type = "ppc64/power8",
543 .oprofile_type = PPC_OPROFILE_INVALID,
544 .cpu_setup = __setup_cpu_power8,
545 .cpu_restore = __restore_cpu_power8,
546 .flush_tlb = __flush_tlb_power8,
547 .machine_check_early = __machine_check_early_realmode_p8,
548 .platform = "power8",
549 },
550 { /* Cell Broadband Engine */
551 .pvr_mask = 0xffff0000,
552 .pvr_value = 0x00700000,
553 .cpu_name = "Cell Broadband Engine",
554 .cpu_features = CPU_FTRS_CELL,
555 .cpu_user_features = COMMON_USER_PPC64 |
556 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
557 PPC_FEATURE_SMT,
558 .mmu_features = MMU_FTRS_CELL,
559 .icache_bsize = 128,
560 .dcache_bsize = 128,
561 .num_pmcs = 4,
562 .pmc_type = PPC_PMC_IBM,
563 .oprofile_cpu_type = "ppc64/cell-be",
564 .oprofile_type = PPC_OPROFILE_CELL,
565 .platform = "ppc-cell-be",
566 },
567 { /* PA Semi PA6T */
568 .pvr_mask = 0x7fff0000,
569 .pvr_value = 0x00900000,
570 .cpu_name = "PA6T",
571 .cpu_features = CPU_FTRS_PA6T,
572 .cpu_user_features = COMMON_USER_PA6T,
573 .mmu_features = MMU_FTRS_PA6T,
574 .icache_bsize = 64,
575 .dcache_bsize = 64,
576 .num_pmcs = 6,
577 .pmc_type = PPC_PMC_PA6T,
578 .cpu_setup = __setup_cpu_pa6t,
579 .cpu_restore = __restore_cpu_pa6t,
580 .oprofile_cpu_type = "ppc64/pa6t",
581 .oprofile_type = PPC_OPROFILE_PA6T,
582 .platform = "pa6t",
583 },
584 { /* default match */
585 .pvr_mask = 0x00000000,
586 .pvr_value = 0x00000000,
587 .cpu_name = "POWER4 (compatible)",
588 .cpu_features = CPU_FTRS_COMPATIBLE,
589 .cpu_user_features = COMMON_USER_PPC64,
590 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
591 .icache_bsize = 128,
592 .dcache_bsize = 128,
593 .num_pmcs = 6,
594 .pmc_type = PPC_PMC_IBM,
595 .platform = "power4",
596 }
597 #endif /* CONFIG_PPC_BOOK3S_64 */
598
599 #ifdef CONFIG_PPC32
600 #if CLASSIC_PPC
601 { /* 601 */
602 .pvr_mask = 0xffff0000,
603 .pvr_value = 0x00010000,
604 .cpu_name = "601",
605 .cpu_features = CPU_FTRS_PPC601,
606 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
607 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
608 .mmu_features = MMU_FTR_HPTE_TABLE,
609 .icache_bsize = 32,
610 .dcache_bsize = 32,
611 .machine_check = machine_check_generic,
612 .platform = "ppc601",
613 },
614 { /* 603 */
615 .pvr_mask = 0xffff0000,
616 .pvr_value = 0x00030000,
617 .cpu_name = "603",
618 .cpu_features = CPU_FTRS_603,
619 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
620 .mmu_features = 0,
621 .icache_bsize = 32,
622 .dcache_bsize = 32,
623 .cpu_setup = __setup_cpu_603,
624 .machine_check = machine_check_generic,
625 .platform = "ppc603",
626 },
627 { /* 603e */
628 .pvr_mask = 0xffff0000,
629 .pvr_value = 0x00060000,
630 .cpu_name = "603e",
631 .cpu_features = CPU_FTRS_603,
632 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
633 .mmu_features = 0,
634 .icache_bsize = 32,
635 .dcache_bsize = 32,
636 .cpu_setup = __setup_cpu_603,
637 .machine_check = machine_check_generic,
638 .platform = "ppc603",
639 },
640 { /* 603ev */
641 .pvr_mask = 0xffff0000,
642 .pvr_value = 0x00070000,
643 .cpu_name = "603ev",
644 .cpu_features = CPU_FTRS_603,
645 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
646 .mmu_features = 0,
647 .icache_bsize = 32,
648 .dcache_bsize = 32,
649 .cpu_setup = __setup_cpu_603,
650 .machine_check = machine_check_generic,
651 .platform = "ppc603",
652 },
653 { /* 604 */
654 .pvr_mask = 0xffff0000,
655 .pvr_value = 0x00040000,
656 .cpu_name = "604",
657 .cpu_features = CPU_FTRS_604,
658 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
659 .mmu_features = MMU_FTR_HPTE_TABLE,
660 .icache_bsize = 32,
661 .dcache_bsize = 32,
662 .num_pmcs = 2,
663 .cpu_setup = __setup_cpu_604,
664 .machine_check = machine_check_generic,
665 .platform = "ppc604",
666 },
667 { /* 604e */
668 .pvr_mask = 0xfffff000,
669 .pvr_value = 0x00090000,
670 .cpu_name = "604e",
671 .cpu_features = CPU_FTRS_604,
672 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
673 .mmu_features = MMU_FTR_HPTE_TABLE,
674 .icache_bsize = 32,
675 .dcache_bsize = 32,
676 .num_pmcs = 4,
677 .cpu_setup = __setup_cpu_604,
678 .machine_check = machine_check_generic,
679 .platform = "ppc604",
680 },
681 { /* 604r */
682 .pvr_mask = 0xffff0000,
683 .pvr_value = 0x00090000,
684 .cpu_name = "604r",
685 .cpu_features = CPU_FTRS_604,
686 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
687 .mmu_features = MMU_FTR_HPTE_TABLE,
688 .icache_bsize = 32,
689 .dcache_bsize = 32,
690 .num_pmcs = 4,
691 .cpu_setup = __setup_cpu_604,
692 .machine_check = machine_check_generic,
693 .platform = "ppc604",
694 },
695 { /* 604ev */
696 .pvr_mask = 0xffff0000,
697 .pvr_value = 0x000a0000,
698 .cpu_name = "604ev",
699 .cpu_features = CPU_FTRS_604,
700 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
701 .mmu_features = MMU_FTR_HPTE_TABLE,
702 .icache_bsize = 32,
703 .dcache_bsize = 32,
704 .num_pmcs = 4,
705 .cpu_setup = __setup_cpu_604,
706 .machine_check = machine_check_generic,
707 .platform = "ppc604",
708 },
709 { /* 740/750 (0x4202, don't support TAU ?) */
710 .pvr_mask = 0xffffffff,
711 .pvr_value = 0x00084202,
712 .cpu_name = "740/750",
713 .cpu_features = CPU_FTRS_740_NOTAU,
714 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
715 .mmu_features = MMU_FTR_HPTE_TABLE,
716 .icache_bsize = 32,
717 .dcache_bsize = 32,
718 .num_pmcs = 4,
719 .cpu_setup = __setup_cpu_750,
720 .machine_check = machine_check_generic,
721 .platform = "ppc750",
722 },
723 { /* 750CX (80100 and 8010x?) */
724 .pvr_mask = 0xfffffff0,
725 .pvr_value = 0x00080100,
726 .cpu_name = "750CX",
727 .cpu_features = CPU_FTRS_750,
728 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
729 .mmu_features = MMU_FTR_HPTE_TABLE,
730 .icache_bsize = 32,
731 .dcache_bsize = 32,
732 .num_pmcs = 4,
733 .cpu_setup = __setup_cpu_750cx,
734 .machine_check = machine_check_generic,
735 .platform = "ppc750",
736 },
737 { /* 750CX (82201 and 82202) */
738 .pvr_mask = 0xfffffff0,
739 .pvr_value = 0x00082200,
740 .cpu_name = "750CX",
741 .cpu_features = CPU_FTRS_750,
742 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
743 .mmu_features = MMU_FTR_HPTE_TABLE,
744 .icache_bsize = 32,
745 .dcache_bsize = 32,
746 .num_pmcs = 4,
747 .pmc_type = PPC_PMC_IBM,
748 .cpu_setup = __setup_cpu_750cx,
749 .machine_check = machine_check_generic,
750 .platform = "ppc750",
751 },
752 { /* 750CXe (82214) */
753 .pvr_mask = 0xfffffff0,
754 .pvr_value = 0x00082210,
755 .cpu_name = "750CXe",
756 .cpu_features = CPU_FTRS_750,
757 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
758 .mmu_features = MMU_FTR_HPTE_TABLE,
759 .icache_bsize = 32,
760 .dcache_bsize = 32,
761 .num_pmcs = 4,
762 .pmc_type = PPC_PMC_IBM,
763 .cpu_setup = __setup_cpu_750cx,
764 .machine_check = machine_check_generic,
765 .platform = "ppc750",
766 },
767 { /* 750CXe "Gekko" (83214) */
768 .pvr_mask = 0xffffffff,
769 .pvr_value = 0x00083214,
770 .cpu_name = "750CXe",
771 .cpu_features = CPU_FTRS_750,
772 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
773 .mmu_features = MMU_FTR_HPTE_TABLE,
774 .icache_bsize = 32,
775 .dcache_bsize = 32,
776 .num_pmcs = 4,
777 .pmc_type = PPC_PMC_IBM,
778 .cpu_setup = __setup_cpu_750cx,
779 .machine_check = machine_check_generic,
780 .platform = "ppc750",
781 },
782 { /* 750CL (and "Broadway") */
783 .pvr_mask = 0xfffff0e0,
784 .pvr_value = 0x00087000,
785 .cpu_name = "750CL",
786 .cpu_features = CPU_FTRS_750CL,
787 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
788 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
789 .icache_bsize = 32,
790 .dcache_bsize = 32,
791 .num_pmcs = 4,
792 .pmc_type = PPC_PMC_IBM,
793 .cpu_setup = __setup_cpu_750,
794 .machine_check = machine_check_generic,
795 .platform = "ppc750",
796 .oprofile_cpu_type = "ppc/750",
797 .oprofile_type = PPC_OPROFILE_G4,
798 },
799 { /* 745/755 */
800 .pvr_mask = 0xfffff000,
801 .pvr_value = 0x00083000,
802 .cpu_name = "745/755",
803 .cpu_features = CPU_FTRS_750,
804 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
805 .mmu_features = MMU_FTR_HPTE_TABLE,
806 .icache_bsize = 32,
807 .dcache_bsize = 32,
808 .num_pmcs = 4,
809 .pmc_type = PPC_PMC_IBM,
810 .cpu_setup = __setup_cpu_750,
811 .machine_check = machine_check_generic,
812 .platform = "ppc750",
813 },
814 { /* 750FX rev 1.x */
815 .pvr_mask = 0xffffff00,
816 .pvr_value = 0x70000100,
817 .cpu_name = "750FX",
818 .cpu_features = CPU_FTRS_750FX1,
819 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
820 .mmu_features = MMU_FTR_HPTE_TABLE,
821 .icache_bsize = 32,
822 .dcache_bsize = 32,
823 .num_pmcs = 4,
824 .pmc_type = PPC_PMC_IBM,
825 .cpu_setup = __setup_cpu_750,
826 .machine_check = machine_check_generic,
827 .platform = "ppc750",
828 .oprofile_cpu_type = "ppc/750",
829 .oprofile_type = PPC_OPROFILE_G4,
830 },
831 { /* 750FX rev 2.0 must disable HID0[DPM] */
832 .pvr_mask = 0xffffffff,
833 .pvr_value = 0x70000200,
834 .cpu_name = "750FX",
835 .cpu_features = CPU_FTRS_750FX2,
836 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
837 .mmu_features = MMU_FTR_HPTE_TABLE,
838 .icache_bsize = 32,
839 .dcache_bsize = 32,
840 .num_pmcs = 4,
841 .pmc_type = PPC_PMC_IBM,
842 .cpu_setup = __setup_cpu_750,
843 .machine_check = machine_check_generic,
844 .platform = "ppc750",
845 .oprofile_cpu_type = "ppc/750",
846 .oprofile_type = PPC_OPROFILE_G4,
847 },
848 { /* 750FX (All revs except 2.0) */
849 .pvr_mask = 0xffff0000,
850 .pvr_value = 0x70000000,
851 .cpu_name = "750FX",
852 .cpu_features = CPU_FTRS_750FX,
853 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
854 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
855 .icache_bsize = 32,
856 .dcache_bsize = 32,
857 .num_pmcs = 4,
858 .pmc_type = PPC_PMC_IBM,
859 .cpu_setup = __setup_cpu_750fx,
860 .machine_check = machine_check_generic,
861 .platform = "ppc750",
862 .oprofile_cpu_type = "ppc/750",
863 .oprofile_type = PPC_OPROFILE_G4,
864 },
865 { /* 750GX */
866 .pvr_mask = 0xffff0000,
867 .pvr_value = 0x70020000,
868 .cpu_name = "750GX",
869 .cpu_features = CPU_FTRS_750GX,
870 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
871 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
872 .icache_bsize = 32,
873 .dcache_bsize = 32,
874 .num_pmcs = 4,
875 .pmc_type = PPC_PMC_IBM,
876 .cpu_setup = __setup_cpu_750fx,
877 .machine_check = machine_check_generic,
878 .platform = "ppc750",
879 .oprofile_cpu_type = "ppc/750",
880 .oprofile_type = PPC_OPROFILE_G4,
881 },
882 { /* 740/750 (L2CR bit need fixup for 740) */
883 .pvr_mask = 0xffff0000,
884 .pvr_value = 0x00080000,
885 .cpu_name = "740/750",
886 .cpu_features = CPU_FTRS_740,
887 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
888 .mmu_features = MMU_FTR_HPTE_TABLE,
889 .icache_bsize = 32,
890 .dcache_bsize = 32,
891 .num_pmcs = 4,
892 .pmc_type = PPC_PMC_IBM,
893 .cpu_setup = __setup_cpu_750,
894 .machine_check = machine_check_generic,
895 .platform = "ppc750",
896 },
897 { /* 7400 rev 1.1 ? (no TAU) */
898 .pvr_mask = 0xffffffff,
899 .pvr_value = 0x000c1101,
900 .cpu_name = "7400 (1.1)",
901 .cpu_features = CPU_FTRS_7400_NOTAU,
902 .cpu_user_features = COMMON_USER |
903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
904 .mmu_features = MMU_FTR_HPTE_TABLE,
905 .icache_bsize = 32,
906 .dcache_bsize = 32,
907 .num_pmcs = 4,
908 .pmc_type = PPC_PMC_G4,
909 .cpu_setup = __setup_cpu_7400,
910 .machine_check = machine_check_generic,
911 .platform = "ppc7400",
912 },
913 { /* 7400 */
914 .pvr_mask = 0xffff0000,
915 .pvr_value = 0x000c0000,
916 .cpu_name = "7400",
917 .cpu_features = CPU_FTRS_7400,
918 .cpu_user_features = COMMON_USER |
919 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
920 .mmu_features = MMU_FTR_HPTE_TABLE,
921 .icache_bsize = 32,
922 .dcache_bsize = 32,
923 .num_pmcs = 4,
924 .pmc_type = PPC_PMC_G4,
925 .cpu_setup = __setup_cpu_7400,
926 .machine_check = machine_check_generic,
927 .platform = "ppc7400",
928 },
929 { /* 7410 */
930 .pvr_mask = 0xffff0000,
931 .pvr_value = 0x800c0000,
932 .cpu_name = "7410",
933 .cpu_features = CPU_FTRS_7400,
934 .cpu_user_features = COMMON_USER |
935 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
936 .mmu_features = MMU_FTR_HPTE_TABLE,
937 .icache_bsize = 32,
938 .dcache_bsize = 32,
939 .num_pmcs = 4,
940 .pmc_type = PPC_PMC_G4,
941 .cpu_setup = __setup_cpu_7410,
942 .machine_check = machine_check_generic,
943 .platform = "ppc7400",
944 },
945 { /* 7450 2.0 - no doze/nap */
946 .pvr_mask = 0xffffffff,
947 .pvr_value = 0x80000200,
948 .cpu_name = "7450",
949 .cpu_features = CPU_FTRS_7450_20,
950 .cpu_user_features = COMMON_USER |
951 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
952 .mmu_features = MMU_FTR_HPTE_TABLE,
953 .icache_bsize = 32,
954 .dcache_bsize = 32,
955 .num_pmcs = 6,
956 .pmc_type = PPC_PMC_G4,
957 .cpu_setup = __setup_cpu_745x,
958 .oprofile_cpu_type = "ppc/7450",
959 .oprofile_type = PPC_OPROFILE_G4,
960 .machine_check = machine_check_generic,
961 .platform = "ppc7450",
962 },
963 { /* 7450 2.1 */
964 .pvr_mask = 0xffffffff,
965 .pvr_value = 0x80000201,
966 .cpu_name = "7450",
967 .cpu_features = CPU_FTRS_7450_21,
968 .cpu_user_features = COMMON_USER |
969 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
970 .mmu_features = MMU_FTR_HPTE_TABLE,
971 .icache_bsize = 32,
972 .dcache_bsize = 32,
973 .num_pmcs = 6,
974 .pmc_type = PPC_PMC_G4,
975 .cpu_setup = __setup_cpu_745x,
976 .oprofile_cpu_type = "ppc/7450",
977 .oprofile_type = PPC_OPROFILE_G4,
978 .machine_check = machine_check_generic,
979 .platform = "ppc7450",
980 },
981 { /* 7450 2.3 and newer */
982 .pvr_mask = 0xffff0000,
983 .pvr_value = 0x80000000,
984 .cpu_name = "7450",
985 .cpu_features = CPU_FTRS_7450_23,
986 .cpu_user_features = COMMON_USER |
987 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
988 .mmu_features = MMU_FTR_HPTE_TABLE,
989 .icache_bsize = 32,
990 .dcache_bsize = 32,
991 .num_pmcs = 6,
992 .pmc_type = PPC_PMC_G4,
993 .cpu_setup = __setup_cpu_745x,
994 .oprofile_cpu_type = "ppc/7450",
995 .oprofile_type = PPC_OPROFILE_G4,
996 .machine_check = machine_check_generic,
997 .platform = "ppc7450",
998 },
999 { /* 7455 rev 1.x */
1000 .pvr_mask = 0xffffff00,
1001 .pvr_value = 0x80010100,
1002 .cpu_name = "7455",
1003 .cpu_features = CPU_FTRS_7455_1,
1004 .cpu_user_features = COMMON_USER |
1005 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1006 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1007 .icache_bsize = 32,
1008 .dcache_bsize = 32,
1009 .num_pmcs = 6,
1010 .pmc_type = PPC_PMC_G4,
1011 .cpu_setup = __setup_cpu_745x,
1012 .oprofile_cpu_type = "ppc/7450",
1013 .oprofile_type = PPC_OPROFILE_G4,
1014 .machine_check = machine_check_generic,
1015 .platform = "ppc7450",
1016 },
1017 { /* 7455 rev 2.0 */
1018 .pvr_mask = 0xffffffff,
1019 .pvr_value = 0x80010200,
1020 .cpu_name = "7455",
1021 .cpu_features = CPU_FTRS_7455_20,
1022 .cpu_user_features = COMMON_USER |
1023 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1024 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1025 .icache_bsize = 32,
1026 .dcache_bsize = 32,
1027 .num_pmcs = 6,
1028 .pmc_type = PPC_PMC_G4,
1029 .cpu_setup = __setup_cpu_745x,
1030 .oprofile_cpu_type = "ppc/7450",
1031 .oprofile_type = PPC_OPROFILE_G4,
1032 .machine_check = machine_check_generic,
1033 .platform = "ppc7450",
1034 },
1035 { /* 7455 others */
1036 .pvr_mask = 0xffff0000,
1037 .pvr_value = 0x80010000,
1038 .cpu_name = "7455",
1039 .cpu_features = CPU_FTRS_7455,
1040 .cpu_user_features = COMMON_USER |
1041 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1042 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1043 .icache_bsize = 32,
1044 .dcache_bsize = 32,
1045 .num_pmcs = 6,
1046 .pmc_type = PPC_PMC_G4,
1047 .cpu_setup = __setup_cpu_745x,
1048 .oprofile_cpu_type = "ppc/7450",
1049 .oprofile_type = PPC_OPROFILE_G4,
1050 .machine_check = machine_check_generic,
1051 .platform = "ppc7450",
1052 },
1053 { /* 7447/7457 Rev 1.0 */
1054 .pvr_mask = 0xffffffff,
1055 .pvr_value = 0x80020100,
1056 .cpu_name = "7447/7457",
1057 .cpu_features = CPU_FTRS_7447_10,
1058 .cpu_user_features = COMMON_USER |
1059 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1060 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1061 .icache_bsize = 32,
1062 .dcache_bsize = 32,
1063 .num_pmcs = 6,
1064 .pmc_type = PPC_PMC_G4,
1065 .cpu_setup = __setup_cpu_745x,
1066 .oprofile_cpu_type = "ppc/7450",
1067 .oprofile_type = PPC_OPROFILE_G4,
1068 .machine_check = machine_check_generic,
1069 .platform = "ppc7450",
1070 },
1071 { /* 7447/7457 Rev 1.1 */
1072 .pvr_mask = 0xffffffff,
1073 .pvr_value = 0x80020101,
1074 .cpu_name = "7447/7457",
1075 .cpu_features = CPU_FTRS_7447_10,
1076 .cpu_user_features = COMMON_USER |
1077 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1078 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1079 .icache_bsize = 32,
1080 .dcache_bsize = 32,
1081 .num_pmcs = 6,
1082 .pmc_type = PPC_PMC_G4,
1083 .cpu_setup = __setup_cpu_745x,
1084 .oprofile_cpu_type = "ppc/7450",
1085 .oprofile_type = PPC_OPROFILE_G4,
1086 .machine_check = machine_check_generic,
1087 .platform = "ppc7450",
1088 },
1089 { /* 7447/7457 Rev 1.2 and later */
1090 .pvr_mask = 0xffff0000,
1091 .pvr_value = 0x80020000,
1092 .cpu_name = "7447/7457",
1093 .cpu_features = CPU_FTRS_7447,
1094 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1095 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1096 .icache_bsize = 32,
1097 .dcache_bsize = 32,
1098 .num_pmcs = 6,
1099 .pmc_type = PPC_PMC_G4,
1100 .cpu_setup = __setup_cpu_745x,
1101 .oprofile_cpu_type = "ppc/7450",
1102 .oprofile_type = PPC_OPROFILE_G4,
1103 .machine_check = machine_check_generic,
1104 .platform = "ppc7450",
1105 },
1106 { /* 7447A */
1107 .pvr_mask = 0xffff0000,
1108 .pvr_value = 0x80030000,
1109 .cpu_name = "7447A",
1110 .cpu_features = CPU_FTRS_7447A,
1111 .cpu_user_features = COMMON_USER |
1112 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1113 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1114 .icache_bsize = 32,
1115 .dcache_bsize = 32,
1116 .num_pmcs = 6,
1117 .pmc_type = PPC_PMC_G4,
1118 .cpu_setup = __setup_cpu_745x,
1119 .oprofile_cpu_type = "ppc/7450",
1120 .oprofile_type = PPC_OPROFILE_G4,
1121 .machine_check = machine_check_generic,
1122 .platform = "ppc7450",
1123 },
1124 { /* 7448 */
1125 .pvr_mask = 0xffff0000,
1126 .pvr_value = 0x80040000,
1127 .cpu_name = "7448",
1128 .cpu_features = CPU_FTRS_7448,
1129 .cpu_user_features = COMMON_USER |
1130 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1131 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1132 .icache_bsize = 32,
1133 .dcache_bsize = 32,
1134 .num_pmcs = 6,
1135 .pmc_type = PPC_PMC_G4,
1136 .cpu_setup = __setup_cpu_745x,
1137 .oprofile_cpu_type = "ppc/7450",
1138 .oprofile_type = PPC_OPROFILE_G4,
1139 .machine_check = machine_check_generic,
1140 .platform = "ppc7450",
1141 },
1142 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1143 .pvr_mask = 0x7fff0000,
1144 .pvr_value = 0x00810000,
1145 .cpu_name = "82xx",
1146 .cpu_features = CPU_FTRS_82XX,
1147 .cpu_user_features = COMMON_USER,
1148 .mmu_features = 0,
1149 .icache_bsize = 32,
1150 .dcache_bsize = 32,
1151 .cpu_setup = __setup_cpu_603,
1152 .machine_check = machine_check_generic,
1153 .platform = "ppc603",
1154 },
1155 { /* All G2_LE (603e core, plus some) have the same pvr */
1156 .pvr_mask = 0x7fff0000,
1157 .pvr_value = 0x00820000,
1158 .cpu_name = "G2_LE",
1159 .cpu_features = CPU_FTRS_G2_LE,
1160 .cpu_user_features = COMMON_USER,
1161 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1162 .icache_bsize = 32,
1163 .dcache_bsize = 32,
1164 .cpu_setup = __setup_cpu_603,
1165 .machine_check = machine_check_generic,
1166 .platform = "ppc603",
1167 },
1168 { /* e300c1 (a 603e core, plus some) on 83xx */
1169 .pvr_mask = 0x7fff0000,
1170 .pvr_value = 0x00830000,
1171 .cpu_name = "e300c1",
1172 .cpu_features = CPU_FTRS_E300,
1173 .cpu_user_features = COMMON_USER,
1174 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1175 .icache_bsize = 32,
1176 .dcache_bsize = 32,
1177 .cpu_setup = __setup_cpu_603,
1178 .machine_check = machine_check_generic,
1179 .platform = "ppc603",
1180 },
1181 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1182 .pvr_mask = 0x7fff0000,
1183 .pvr_value = 0x00840000,
1184 .cpu_name = "e300c2",
1185 .cpu_features = CPU_FTRS_E300C2,
1186 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1187 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1188 MMU_FTR_NEED_DTLB_SW_LRU,
1189 .icache_bsize = 32,
1190 .dcache_bsize = 32,
1191 .cpu_setup = __setup_cpu_603,
1192 .machine_check = machine_check_generic,
1193 .platform = "ppc603",
1194 },
1195 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1196 .pvr_mask = 0x7fff0000,
1197 .pvr_value = 0x00850000,
1198 .cpu_name = "e300c3",
1199 .cpu_features = CPU_FTRS_E300,
1200 .cpu_user_features = COMMON_USER,
1201 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1202 MMU_FTR_NEED_DTLB_SW_LRU,
1203 .icache_bsize = 32,
1204 .dcache_bsize = 32,
1205 .cpu_setup = __setup_cpu_603,
1206 .num_pmcs = 4,
1207 .oprofile_cpu_type = "ppc/e300",
1208 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1209 .platform = "ppc603",
1210 },
1211 { /* e300c4 (e300c1, plus one IU) */
1212 .pvr_mask = 0x7fff0000,
1213 .pvr_value = 0x00860000,
1214 .cpu_name = "e300c4",
1215 .cpu_features = CPU_FTRS_E300,
1216 .cpu_user_features = COMMON_USER,
1217 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1218 MMU_FTR_NEED_DTLB_SW_LRU,
1219 .icache_bsize = 32,
1220 .dcache_bsize = 32,
1221 .cpu_setup = __setup_cpu_603,
1222 .machine_check = machine_check_generic,
1223 .num_pmcs = 4,
1224 .oprofile_cpu_type = "ppc/e300",
1225 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1226 .platform = "ppc603",
1227 },
1228 { /* default match, we assume split I/D cache & TB (non-601)... */
1229 .pvr_mask = 0x00000000,
1230 .pvr_value = 0x00000000,
1231 .cpu_name = "(generic PPC)",
1232 .cpu_features = CPU_FTRS_CLASSIC32,
1233 .cpu_user_features = COMMON_USER,
1234 .mmu_features = MMU_FTR_HPTE_TABLE,
1235 .icache_bsize = 32,
1236 .dcache_bsize = 32,
1237 .machine_check = machine_check_generic,
1238 .platform = "ppc603",
1239 },
1240 #endif /* CLASSIC_PPC */
1241 #ifdef CONFIG_8xx
1242 { /* 8xx */
1243 .pvr_mask = 0xffff0000,
1244 .pvr_value = 0x00500000,
1245 .cpu_name = "8xx",
1246 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1247 * if the 8xx code is there.... */
1248 .cpu_features = CPU_FTRS_8XX,
1249 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1250 .mmu_features = MMU_FTR_TYPE_8xx,
1251 .icache_bsize = 16,
1252 .dcache_bsize = 16,
1253 .platform = "ppc823",
1254 },
1255 #endif /* CONFIG_8xx */
1256 #ifdef CONFIG_40x
1257 { /* 403GC */
1258 .pvr_mask = 0xffffff00,
1259 .pvr_value = 0x00200200,
1260 .cpu_name = "403GC",
1261 .cpu_features = CPU_FTRS_40X,
1262 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1263 .mmu_features = MMU_FTR_TYPE_40x,
1264 .icache_bsize = 16,
1265 .dcache_bsize = 16,
1266 .machine_check = machine_check_4xx,
1267 .platform = "ppc403",
1268 },
1269 { /* 403GCX */
1270 .pvr_mask = 0xffffff00,
1271 .pvr_value = 0x00201400,
1272 .cpu_name = "403GCX",
1273 .cpu_features = CPU_FTRS_40X,
1274 .cpu_user_features = PPC_FEATURE_32 |
1275 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1276 .mmu_features = MMU_FTR_TYPE_40x,
1277 .icache_bsize = 16,
1278 .dcache_bsize = 16,
1279 .machine_check = machine_check_4xx,
1280 .platform = "ppc403",
1281 },
1282 { /* 403G ?? */
1283 .pvr_mask = 0xffff0000,
1284 .pvr_value = 0x00200000,
1285 .cpu_name = "403G ??",
1286 .cpu_features = CPU_FTRS_40X,
1287 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1288 .mmu_features = MMU_FTR_TYPE_40x,
1289 .icache_bsize = 16,
1290 .dcache_bsize = 16,
1291 .machine_check = machine_check_4xx,
1292 .platform = "ppc403",
1293 },
1294 { /* 405GP */
1295 .pvr_mask = 0xffff0000,
1296 .pvr_value = 0x40110000,
1297 .cpu_name = "405GP",
1298 .cpu_features = CPU_FTRS_40X,
1299 .cpu_user_features = PPC_FEATURE_32 |
1300 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1301 .mmu_features = MMU_FTR_TYPE_40x,
1302 .icache_bsize = 32,
1303 .dcache_bsize = 32,
1304 .machine_check = machine_check_4xx,
1305 .platform = "ppc405",
1306 },
1307 { /* STB 03xxx */
1308 .pvr_mask = 0xffff0000,
1309 .pvr_value = 0x40130000,
1310 .cpu_name = "STB03xxx",
1311 .cpu_features = CPU_FTRS_40X,
1312 .cpu_user_features = PPC_FEATURE_32 |
1313 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1314 .mmu_features = MMU_FTR_TYPE_40x,
1315 .icache_bsize = 32,
1316 .dcache_bsize = 32,
1317 .machine_check = machine_check_4xx,
1318 .platform = "ppc405",
1319 },
1320 { /* STB 04xxx */
1321 .pvr_mask = 0xffff0000,
1322 .pvr_value = 0x41810000,
1323 .cpu_name = "STB04xxx",
1324 .cpu_features = CPU_FTRS_40X,
1325 .cpu_user_features = PPC_FEATURE_32 |
1326 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1327 .mmu_features = MMU_FTR_TYPE_40x,
1328 .icache_bsize = 32,
1329 .dcache_bsize = 32,
1330 .machine_check = machine_check_4xx,
1331 .platform = "ppc405",
1332 },
1333 { /* NP405L */
1334 .pvr_mask = 0xffff0000,
1335 .pvr_value = 0x41610000,
1336 .cpu_name = "NP405L",
1337 .cpu_features = CPU_FTRS_40X,
1338 .cpu_user_features = PPC_FEATURE_32 |
1339 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1340 .mmu_features = MMU_FTR_TYPE_40x,
1341 .icache_bsize = 32,
1342 .dcache_bsize = 32,
1343 .machine_check = machine_check_4xx,
1344 .platform = "ppc405",
1345 },
1346 { /* NP4GS3 */
1347 .pvr_mask = 0xffff0000,
1348 .pvr_value = 0x40B10000,
1349 .cpu_name = "NP4GS3",
1350 .cpu_features = CPU_FTRS_40X,
1351 .cpu_user_features = PPC_FEATURE_32 |
1352 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1353 .mmu_features = MMU_FTR_TYPE_40x,
1354 .icache_bsize = 32,
1355 .dcache_bsize = 32,
1356 .machine_check = machine_check_4xx,
1357 .platform = "ppc405",
1358 },
1359 { /* NP405H */
1360 .pvr_mask = 0xffff0000,
1361 .pvr_value = 0x41410000,
1362 .cpu_name = "NP405H",
1363 .cpu_features = CPU_FTRS_40X,
1364 .cpu_user_features = PPC_FEATURE_32 |
1365 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1366 .mmu_features = MMU_FTR_TYPE_40x,
1367 .icache_bsize = 32,
1368 .dcache_bsize = 32,
1369 .machine_check = machine_check_4xx,
1370 .platform = "ppc405",
1371 },
1372 { /* 405GPr */
1373 .pvr_mask = 0xffff0000,
1374 .pvr_value = 0x50910000,
1375 .cpu_name = "405GPr",
1376 .cpu_features = CPU_FTRS_40X,
1377 .cpu_user_features = PPC_FEATURE_32 |
1378 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1379 .mmu_features = MMU_FTR_TYPE_40x,
1380 .icache_bsize = 32,
1381 .dcache_bsize = 32,
1382 .machine_check = machine_check_4xx,
1383 .platform = "ppc405",
1384 },
1385 { /* STBx25xx */
1386 .pvr_mask = 0xffff0000,
1387 .pvr_value = 0x51510000,
1388 .cpu_name = "STBx25xx",
1389 .cpu_features = CPU_FTRS_40X,
1390 .cpu_user_features = PPC_FEATURE_32 |
1391 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1392 .mmu_features = MMU_FTR_TYPE_40x,
1393 .icache_bsize = 32,
1394 .dcache_bsize = 32,
1395 .machine_check = machine_check_4xx,
1396 .platform = "ppc405",
1397 },
1398 { /* 405LP */
1399 .pvr_mask = 0xffff0000,
1400 .pvr_value = 0x41F10000,
1401 .cpu_name = "405LP",
1402 .cpu_features = CPU_FTRS_40X,
1403 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1404 .mmu_features = MMU_FTR_TYPE_40x,
1405 .icache_bsize = 32,
1406 .dcache_bsize = 32,
1407 .machine_check = machine_check_4xx,
1408 .platform = "ppc405",
1409 },
1410 { /* Xilinx Virtex-II Pro */
1411 .pvr_mask = 0xfffff000,
1412 .pvr_value = 0x20010000,
1413 .cpu_name = "Virtex-II Pro",
1414 .cpu_features = CPU_FTRS_40X,
1415 .cpu_user_features = PPC_FEATURE_32 |
1416 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1417 .mmu_features = MMU_FTR_TYPE_40x,
1418 .icache_bsize = 32,
1419 .dcache_bsize = 32,
1420 .machine_check = machine_check_4xx,
1421 .platform = "ppc405",
1422 },
1423 { /* Xilinx Virtex-4 FX */
1424 .pvr_mask = 0xfffff000,
1425 .pvr_value = 0x20011000,
1426 .cpu_name = "Virtex-4 FX",
1427 .cpu_features = CPU_FTRS_40X,
1428 .cpu_user_features = PPC_FEATURE_32 |
1429 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1430 .mmu_features = MMU_FTR_TYPE_40x,
1431 .icache_bsize = 32,
1432 .dcache_bsize = 32,
1433 .machine_check = machine_check_4xx,
1434 .platform = "ppc405",
1435 },
1436 { /* 405EP */
1437 .pvr_mask = 0xffff0000,
1438 .pvr_value = 0x51210000,
1439 .cpu_name = "405EP",
1440 .cpu_features = CPU_FTRS_40X,
1441 .cpu_user_features = PPC_FEATURE_32 |
1442 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1443 .mmu_features = MMU_FTR_TYPE_40x,
1444 .icache_bsize = 32,
1445 .dcache_bsize = 32,
1446 .machine_check = machine_check_4xx,
1447 .platform = "ppc405",
1448 },
1449 { /* 405EX Rev. A/B with Security */
1450 .pvr_mask = 0xffff000f,
1451 .pvr_value = 0x12910007,
1452 .cpu_name = "405EX Rev. A/B",
1453 .cpu_features = CPU_FTRS_40X,
1454 .cpu_user_features = PPC_FEATURE_32 |
1455 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1456 .mmu_features = MMU_FTR_TYPE_40x,
1457 .icache_bsize = 32,
1458 .dcache_bsize = 32,
1459 .machine_check = machine_check_4xx,
1460 .platform = "ppc405",
1461 },
1462 { /* 405EX Rev. C without Security */
1463 .pvr_mask = 0xffff000f,
1464 .pvr_value = 0x1291000d,
1465 .cpu_name = "405EX Rev. C",
1466 .cpu_features = CPU_FTRS_40X,
1467 .cpu_user_features = PPC_FEATURE_32 |
1468 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1469 .mmu_features = MMU_FTR_TYPE_40x,
1470 .icache_bsize = 32,
1471 .dcache_bsize = 32,
1472 .machine_check = machine_check_4xx,
1473 .platform = "ppc405",
1474 },
1475 { /* 405EX Rev. C with Security */
1476 .pvr_mask = 0xffff000f,
1477 .pvr_value = 0x1291000f,
1478 .cpu_name = "405EX Rev. C",
1479 .cpu_features = CPU_FTRS_40X,
1480 .cpu_user_features = PPC_FEATURE_32 |
1481 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1482 .mmu_features = MMU_FTR_TYPE_40x,
1483 .icache_bsize = 32,
1484 .dcache_bsize = 32,
1485 .machine_check = machine_check_4xx,
1486 .platform = "ppc405",
1487 },
1488 { /* 405EX Rev. D without Security */
1489 .pvr_mask = 0xffff000f,
1490 .pvr_value = 0x12910003,
1491 .cpu_name = "405EX Rev. D",
1492 .cpu_features = CPU_FTRS_40X,
1493 .cpu_user_features = PPC_FEATURE_32 |
1494 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1495 .mmu_features = MMU_FTR_TYPE_40x,
1496 .icache_bsize = 32,
1497 .dcache_bsize = 32,
1498 .machine_check = machine_check_4xx,
1499 .platform = "ppc405",
1500 },
1501 { /* 405EX Rev. D with Security */
1502 .pvr_mask = 0xffff000f,
1503 .pvr_value = 0x12910005,
1504 .cpu_name = "405EX Rev. D",
1505 .cpu_features = CPU_FTRS_40X,
1506 .cpu_user_features = PPC_FEATURE_32 |
1507 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1508 .mmu_features = MMU_FTR_TYPE_40x,
1509 .icache_bsize = 32,
1510 .dcache_bsize = 32,
1511 .machine_check = machine_check_4xx,
1512 .platform = "ppc405",
1513 },
1514 { /* 405EXr Rev. A/B without Security */
1515 .pvr_mask = 0xffff000f,
1516 .pvr_value = 0x12910001,
1517 .cpu_name = "405EXr Rev. A/B",
1518 .cpu_features = CPU_FTRS_40X,
1519 .cpu_user_features = PPC_FEATURE_32 |
1520 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1521 .mmu_features = MMU_FTR_TYPE_40x,
1522 .icache_bsize = 32,
1523 .dcache_bsize = 32,
1524 .machine_check = machine_check_4xx,
1525 .platform = "ppc405",
1526 },
1527 { /* 405EXr Rev. C without Security */
1528 .pvr_mask = 0xffff000f,
1529 .pvr_value = 0x12910009,
1530 .cpu_name = "405EXr Rev. C",
1531 .cpu_features = CPU_FTRS_40X,
1532 .cpu_user_features = PPC_FEATURE_32 |
1533 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1534 .mmu_features = MMU_FTR_TYPE_40x,
1535 .icache_bsize = 32,
1536 .dcache_bsize = 32,
1537 .machine_check = machine_check_4xx,
1538 .platform = "ppc405",
1539 },
1540 { /* 405EXr Rev. C with Security */
1541 .pvr_mask = 0xffff000f,
1542 .pvr_value = 0x1291000b,
1543 .cpu_name = "405EXr Rev. C",
1544 .cpu_features = CPU_FTRS_40X,
1545 .cpu_user_features = PPC_FEATURE_32 |
1546 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1547 .mmu_features = MMU_FTR_TYPE_40x,
1548 .icache_bsize = 32,
1549 .dcache_bsize = 32,
1550 .machine_check = machine_check_4xx,
1551 .platform = "ppc405",
1552 },
1553 { /* 405EXr Rev. D without Security */
1554 .pvr_mask = 0xffff000f,
1555 .pvr_value = 0x12910000,
1556 .cpu_name = "405EXr Rev. D",
1557 .cpu_features = CPU_FTRS_40X,
1558 .cpu_user_features = PPC_FEATURE_32 |
1559 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1560 .mmu_features = MMU_FTR_TYPE_40x,
1561 .icache_bsize = 32,
1562 .dcache_bsize = 32,
1563 .machine_check = machine_check_4xx,
1564 .platform = "ppc405",
1565 },
1566 { /* 405EXr Rev. D with Security */
1567 .pvr_mask = 0xffff000f,
1568 .pvr_value = 0x12910002,
1569 .cpu_name = "405EXr Rev. D",
1570 .cpu_features = CPU_FTRS_40X,
1571 .cpu_user_features = PPC_FEATURE_32 |
1572 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1573 .mmu_features = MMU_FTR_TYPE_40x,
1574 .icache_bsize = 32,
1575 .dcache_bsize = 32,
1576 .machine_check = machine_check_4xx,
1577 .platform = "ppc405",
1578 },
1579 {
1580 /* 405EZ */
1581 .pvr_mask = 0xffff0000,
1582 .pvr_value = 0x41510000,
1583 .cpu_name = "405EZ",
1584 .cpu_features = CPU_FTRS_40X,
1585 .cpu_user_features = PPC_FEATURE_32 |
1586 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1587 .mmu_features = MMU_FTR_TYPE_40x,
1588 .icache_bsize = 32,
1589 .dcache_bsize = 32,
1590 .machine_check = machine_check_4xx,
1591 .platform = "ppc405",
1592 },
1593 { /* APM8018X */
1594 .pvr_mask = 0xffff0000,
1595 .pvr_value = 0x7ff11432,
1596 .cpu_name = "APM8018X",
1597 .cpu_features = CPU_FTRS_40X,
1598 .cpu_user_features = PPC_FEATURE_32 |
1599 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1600 .mmu_features = MMU_FTR_TYPE_40x,
1601 .icache_bsize = 32,
1602 .dcache_bsize = 32,
1603 .machine_check = machine_check_4xx,
1604 .platform = "ppc405",
1605 },
1606 { /* default match */
1607 .pvr_mask = 0x00000000,
1608 .pvr_value = 0x00000000,
1609 .cpu_name = "(generic 40x PPC)",
1610 .cpu_features = CPU_FTRS_40X,
1611 .cpu_user_features = PPC_FEATURE_32 |
1612 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1613 .mmu_features = MMU_FTR_TYPE_40x,
1614 .icache_bsize = 32,
1615 .dcache_bsize = 32,
1616 .machine_check = machine_check_4xx,
1617 .platform = "ppc405",
1618 }
1619
1620 #endif /* CONFIG_40x */
1621 #ifdef CONFIG_44x
1622 {
1623 .pvr_mask = 0xf0000fff,
1624 .pvr_value = 0x40000850,
1625 .cpu_name = "440GR Rev. A",
1626 .cpu_features = CPU_FTRS_44X,
1627 .cpu_user_features = COMMON_USER_BOOKE,
1628 .mmu_features = MMU_FTR_TYPE_44x,
1629 .icache_bsize = 32,
1630 .dcache_bsize = 32,
1631 .machine_check = machine_check_4xx,
1632 .platform = "ppc440",
1633 },
1634 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1635 .pvr_mask = 0xf0000fff,
1636 .pvr_value = 0x40000858,
1637 .cpu_name = "440EP Rev. A",
1638 .cpu_features = CPU_FTRS_44X,
1639 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1640 .mmu_features = MMU_FTR_TYPE_44x,
1641 .icache_bsize = 32,
1642 .dcache_bsize = 32,
1643 .cpu_setup = __setup_cpu_440ep,
1644 .machine_check = machine_check_4xx,
1645 .platform = "ppc440",
1646 },
1647 {
1648 .pvr_mask = 0xf0000fff,
1649 .pvr_value = 0x400008d3,
1650 .cpu_name = "440GR Rev. B",
1651 .cpu_features = CPU_FTRS_44X,
1652 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1653 .mmu_features = MMU_FTR_TYPE_44x,
1654 .icache_bsize = 32,
1655 .dcache_bsize = 32,
1656 .machine_check = machine_check_4xx,
1657 .platform = "ppc440",
1658 },
1659 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1660 .pvr_mask = 0xf0000ff7,
1661 .pvr_value = 0x400008d4,
1662 .cpu_name = "440EP Rev. C",
1663 .cpu_features = CPU_FTRS_44X,
1664 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1665 .mmu_features = MMU_FTR_TYPE_44x,
1666 .icache_bsize = 32,
1667 .dcache_bsize = 32,
1668 .cpu_setup = __setup_cpu_440ep,
1669 .machine_check = machine_check_4xx,
1670 .platform = "ppc440",
1671 },
1672 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1673 .pvr_mask = 0xf0000fff,
1674 .pvr_value = 0x400008db,
1675 .cpu_name = "440EP Rev. B",
1676 .cpu_features = CPU_FTRS_44X,
1677 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1678 .mmu_features = MMU_FTR_TYPE_44x,
1679 .icache_bsize = 32,
1680 .dcache_bsize = 32,
1681 .cpu_setup = __setup_cpu_440ep,
1682 .machine_check = machine_check_4xx,
1683 .platform = "ppc440",
1684 },
1685 { /* 440GRX */
1686 .pvr_mask = 0xf0000ffb,
1687 .pvr_value = 0x200008D0,
1688 .cpu_name = "440GRX",
1689 .cpu_features = CPU_FTRS_44X,
1690 .cpu_user_features = COMMON_USER_BOOKE,
1691 .mmu_features = MMU_FTR_TYPE_44x,
1692 .icache_bsize = 32,
1693 .dcache_bsize = 32,
1694 .cpu_setup = __setup_cpu_440grx,
1695 .machine_check = machine_check_440A,
1696 .platform = "ppc440",
1697 },
1698 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1699 .pvr_mask = 0xf0000ffb,
1700 .pvr_value = 0x200008D8,
1701 .cpu_name = "440EPX",
1702 .cpu_features = CPU_FTRS_44X,
1703 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1704 .mmu_features = MMU_FTR_TYPE_44x,
1705 .icache_bsize = 32,
1706 .dcache_bsize = 32,
1707 .cpu_setup = __setup_cpu_440epx,
1708 .machine_check = machine_check_440A,
1709 .platform = "ppc440",
1710 },
1711 { /* 440GP Rev. B */
1712 .pvr_mask = 0xf0000fff,
1713 .pvr_value = 0x40000440,
1714 .cpu_name = "440GP Rev. B",
1715 .cpu_features = CPU_FTRS_44X,
1716 .cpu_user_features = COMMON_USER_BOOKE,
1717 .mmu_features = MMU_FTR_TYPE_44x,
1718 .icache_bsize = 32,
1719 .dcache_bsize = 32,
1720 .machine_check = machine_check_4xx,
1721 .platform = "ppc440gp",
1722 },
1723 { /* 440GP Rev. C */
1724 .pvr_mask = 0xf0000fff,
1725 .pvr_value = 0x40000481,
1726 .cpu_name = "440GP Rev. C",
1727 .cpu_features = CPU_FTRS_44X,
1728 .cpu_user_features = COMMON_USER_BOOKE,
1729 .mmu_features = MMU_FTR_TYPE_44x,
1730 .icache_bsize = 32,
1731 .dcache_bsize = 32,
1732 .machine_check = machine_check_4xx,
1733 .platform = "ppc440gp",
1734 },
1735 { /* 440GX Rev. A */
1736 .pvr_mask = 0xf0000fff,
1737 .pvr_value = 0x50000850,
1738 .cpu_name = "440GX Rev. A",
1739 .cpu_features = CPU_FTRS_44X,
1740 .cpu_user_features = COMMON_USER_BOOKE,
1741 .mmu_features = MMU_FTR_TYPE_44x,
1742 .icache_bsize = 32,
1743 .dcache_bsize = 32,
1744 .cpu_setup = __setup_cpu_440gx,
1745 .machine_check = machine_check_440A,
1746 .platform = "ppc440",
1747 },
1748 { /* 440GX Rev. B */
1749 .pvr_mask = 0xf0000fff,
1750 .pvr_value = 0x50000851,
1751 .cpu_name = "440GX Rev. B",
1752 .cpu_features = CPU_FTRS_44X,
1753 .cpu_user_features = COMMON_USER_BOOKE,
1754 .mmu_features = MMU_FTR_TYPE_44x,
1755 .icache_bsize = 32,
1756 .dcache_bsize = 32,
1757 .cpu_setup = __setup_cpu_440gx,
1758 .machine_check = machine_check_440A,
1759 .platform = "ppc440",
1760 },
1761 { /* 440GX Rev. C */
1762 .pvr_mask = 0xf0000fff,
1763 .pvr_value = 0x50000892,
1764 .cpu_name = "440GX Rev. C",
1765 .cpu_features = CPU_FTRS_44X,
1766 .cpu_user_features = COMMON_USER_BOOKE,
1767 .mmu_features = MMU_FTR_TYPE_44x,
1768 .icache_bsize = 32,
1769 .dcache_bsize = 32,
1770 .cpu_setup = __setup_cpu_440gx,
1771 .machine_check = machine_check_440A,
1772 .platform = "ppc440",
1773 },
1774 { /* 440GX Rev. F */
1775 .pvr_mask = 0xf0000fff,
1776 .pvr_value = 0x50000894,
1777 .cpu_name = "440GX Rev. F",
1778 .cpu_features = CPU_FTRS_44X,
1779 .cpu_user_features = COMMON_USER_BOOKE,
1780 .mmu_features = MMU_FTR_TYPE_44x,
1781 .icache_bsize = 32,
1782 .dcache_bsize = 32,
1783 .cpu_setup = __setup_cpu_440gx,
1784 .machine_check = machine_check_440A,
1785 .platform = "ppc440",
1786 },
1787 { /* 440SP Rev. A */
1788 .pvr_mask = 0xfff00fff,
1789 .pvr_value = 0x53200891,
1790 .cpu_name = "440SP Rev. A",
1791 .cpu_features = CPU_FTRS_44X,
1792 .cpu_user_features = COMMON_USER_BOOKE,
1793 .mmu_features = MMU_FTR_TYPE_44x,
1794 .icache_bsize = 32,
1795 .dcache_bsize = 32,
1796 .machine_check = machine_check_4xx,
1797 .platform = "ppc440",
1798 },
1799 { /* 440SPe Rev. A */
1800 .pvr_mask = 0xfff00fff,
1801 .pvr_value = 0x53400890,
1802 .cpu_name = "440SPe Rev. A",
1803 .cpu_features = CPU_FTRS_44X,
1804 .cpu_user_features = COMMON_USER_BOOKE,
1805 .mmu_features = MMU_FTR_TYPE_44x,
1806 .icache_bsize = 32,
1807 .dcache_bsize = 32,
1808 .cpu_setup = __setup_cpu_440spe,
1809 .machine_check = machine_check_440A,
1810 .platform = "ppc440",
1811 },
1812 { /* 440SPe Rev. B */
1813 .pvr_mask = 0xfff00fff,
1814 .pvr_value = 0x53400891,
1815 .cpu_name = "440SPe Rev. B",
1816 .cpu_features = CPU_FTRS_44X,
1817 .cpu_user_features = COMMON_USER_BOOKE,
1818 .mmu_features = MMU_FTR_TYPE_44x,
1819 .icache_bsize = 32,
1820 .dcache_bsize = 32,
1821 .cpu_setup = __setup_cpu_440spe,
1822 .machine_check = machine_check_440A,
1823 .platform = "ppc440",
1824 },
1825 { /* 440 in Xilinx Virtex-5 FXT */
1826 .pvr_mask = 0xfffffff0,
1827 .pvr_value = 0x7ff21910,
1828 .cpu_name = "440 in Virtex-5 FXT",
1829 .cpu_features = CPU_FTRS_44X,
1830 .cpu_user_features = COMMON_USER_BOOKE,
1831 .mmu_features = MMU_FTR_TYPE_44x,
1832 .icache_bsize = 32,
1833 .dcache_bsize = 32,
1834 .cpu_setup = __setup_cpu_440x5,
1835 .machine_check = machine_check_440A,
1836 .platform = "ppc440",
1837 },
1838 { /* 460EX */
1839 .pvr_mask = 0xffff0006,
1840 .pvr_value = 0x13020002,
1841 .cpu_name = "460EX",
1842 .cpu_features = CPU_FTRS_440x6,
1843 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1844 .mmu_features = MMU_FTR_TYPE_44x,
1845 .icache_bsize = 32,
1846 .dcache_bsize = 32,
1847 .cpu_setup = __setup_cpu_460ex,
1848 .machine_check = machine_check_440A,
1849 .platform = "ppc440",
1850 },
1851 { /* 460EX Rev B */
1852 .pvr_mask = 0xffff0007,
1853 .pvr_value = 0x13020004,
1854 .cpu_name = "460EX Rev. B",
1855 .cpu_features = CPU_FTRS_440x6,
1856 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1857 .mmu_features = MMU_FTR_TYPE_44x,
1858 .icache_bsize = 32,
1859 .dcache_bsize = 32,
1860 .cpu_setup = __setup_cpu_460ex,
1861 .machine_check = machine_check_440A,
1862 .platform = "ppc440",
1863 },
1864 { /* 460GT */
1865 .pvr_mask = 0xffff0006,
1866 .pvr_value = 0x13020000,
1867 .cpu_name = "460GT",
1868 .cpu_features = CPU_FTRS_440x6,
1869 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1870 .mmu_features = MMU_FTR_TYPE_44x,
1871 .icache_bsize = 32,
1872 .dcache_bsize = 32,
1873 .cpu_setup = __setup_cpu_460gt,
1874 .machine_check = machine_check_440A,
1875 .platform = "ppc440",
1876 },
1877 { /* 460GT Rev B */
1878 .pvr_mask = 0xffff0007,
1879 .pvr_value = 0x13020005,
1880 .cpu_name = "460GT Rev. B",
1881 .cpu_features = CPU_FTRS_440x6,
1882 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1883 .mmu_features = MMU_FTR_TYPE_44x,
1884 .icache_bsize = 32,
1885 .dcache_bsize = 32,
1886 .cpu_setup = __setup_cpu_460gt,
1887 .machine_check = machine_check_440A,
1888 .platform = "ppc440",
1889 },
1890 { /* 460SX */
1891 .pvr_mask = 0xffffff00,
1892 .pvr_value = 0x13541800,
1893 .cpu_name = "460SX",
1894 .cpu_features = CPU_FTRS_44X,
1895 .cpu_user_features = COMMON_USER_BOOKE,
1896 .mmu_features = MMU_FTR_TYPE_44x,
1897 .icache_bsize = 32,
1898 .dcache_bsize = 32,
1899 .cpu_setup = __setup_cpu_460sx,
1900 .machine_check = machine_check_440A,
1901 .platform = "ppc440",
1902 },
1903 { /* 464 in APM821xx */
1904 .pvr_mask = 0xfffffff0,
1905 .pvr_value = 0x12C41C80,
1906 .cpu_name = "APM821XX",
1907 .cpu_features = CPU_FTRS_44X,
1908 .cpu_user_features = COMMON_USER_BOOKE |
1909 PPC_FEATURE_HAS_FPU,
1910 .mmu_features = MMU_FTR_TYPE_44x,
1911 .icache_bsize = 32,
1912 .dcache_bsize = 32,
1913 .cpu_setup = __setup_cpu_apm821xx,
1914 .machine_check = machine_check_440A,
1915 .platform = "ppc440",
1916 },
1917 { /* 476 DD2 core */
1918 .pvr_mask = 0xffffffff,
1919 .pvr_value = 0x11a52080,
1920 .cpu_name = "476",
1921 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1922 .cpu_user_features = COMMON_USER_BOOKE |
1923 PPC_FEATURE_HAS_FPU,
1924 .mmu_features = MMU_FTR_TYPE_47x |
1925 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1926 .icache_bsize = 32,
1927 .dcache_bsize = 128,
1928 .machine_check = machine_check_47x,
1929 .platform = "ppc470",
1930 },
1931 { /* 476fpe */
1932 .pvr_mask = 0xffff0000,
1933 .pvr_value = 0x7ff50000,
1934 .cpu_name = "476fpe",
1935 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1936 .cpu_user_features = COMMON_USER_BOOKE |
1937 PPC_FEATURE_HAS_FPU,
1938 .mmu_features = MMU_FTR_TYPE_47x |
1939 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1940 .icache_bsize = 32,
1941 .dcache_bsize = 128,
1942 .machine_check = machine_check_47x,
1943 .platform = "ppc470",
1944 },
1945 { /* 476 iss */
1946 .pvr_mask = 0xffff0000,
1947 .pvr_value = 0x00050000,
1948 .cpu_name = "476",
1949 .cpu_features = CPU_FTRS_47X,
1950 .cpu_user_features = COMMON_USER_BOOKE |
1951 PPC_FEATURE_HAS_FPU,
1952 .mmu_features = MMU_FTR_TYPE_47x |
1953 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1954 .icache_bsize = 32,
1955 .dcache_bsize = 128,
1956 .machine_check = machine_check_47x,
1957 .platform = "ppc470",
1958 },
1959 { /* 476 others */
1960 .pvr_mask = 0xffff0000,
1961 .pvr_value = 0x11a50000,
1962 .cpu_name = "476",
1963 .cpu_features = CPU_FTRS_47X,
1964 .cpu_user_features = COMMON_USER_BOOKE |
1965 PPC_FEATURE_HAS_FPU,
1966 .mmu_features = MMU_FTR_TYPE_47x |
1967 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1968 .icache_bsize = 32,
1969 .dcache_bsize = 128,
1970 .machine_check = machine_check_47x,
1971 .platform = "ppc470",
1972 },
1973 { /* default match */
1974 .pvr_mask = 0x00000000,
1975 .pvr_value = 0x00000000,
1976 .cpu_name = "(generic 44x PPC)",
1977 .cpu_features = CPU_FTRS_44X,
1978 .cpu_user_features = COMMON_USER_BOOKE,
1979 .mmu_features = MMU_FTR_TYPE_44x,
1980 .icache_bsize = 32,
1981 .dcache_bsize = 32,
1982 .machine_check = machine_check_4xx,
1983 .platform = "ppc440",
1984 }
1985 #endif /* CONFIG_44x */
1986 #ifdef CONFIG_E200
1987 { /* e200z5 */
1988 .pvr_mask = 0xfff00000,
1989 .pvr_value = 0x81000000,
1990 .cpu_name = "e200z5",
1991 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1992 .cpu_features = CPU_FTRS_E200,
1993 .cpu_user_features = COMMON_USER_BOOKE |
1994 PPC_FEATURE_HAS_EFP_SINGLE |
1995 PPC_FEATURE_UNIFIED_CACHE,
1996 .mmu_features = MMU_FTR_TYPE_FSL_E,
1997 .dcache_bsize = 32,
1998 .machine_check = machine_check_e200,
1999 .platform = "ppc5554",
2000 },
2001 { /* e200z6 */
2002 .pvr_mask = 0xfff00000,
2003 .pvr_value = 0x81100000,
2004 .cpu_name = "e200z6",
2005 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2006 .cpu_features = CPU_FTRS_E200,
2007 .cpu_user_features = COMMON_USER_BOOKE |
2008 PPC_FEATURE_HAS_SPE_COMP |
2009 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2010 PPC_FEATURE_UNIFIED_CACHE,
2011 .mmu_features = MMU_FTR_TYPE_FSL_E,
2012 .dcache_bsize = 32,
2013 .machine_check = machine_check_e200,
2014 .platform = "ppc5554",
2015 },
2016 { /* default match */
2017 .pvr_mask = 0x00000000,
2018 .pvr_value = 0x00000000,
2019 .cpu_name = "(generic E200 PPC)",
2020 .cpu_features = CPU_FTRS_E200,
2021 .cpu_user_features = COMMON_USER_BOOKE |
2022 PPC_FEATURE_HAS_EFP_SINGLE |
2023 PPC_FEATURE_UNIFIED_CACHE,
2024 .mmu_features = MMU_FTR_TYPE_FSL_E,
2025 .dcache_bsize = 32,
2026 .cpu_setup = __setup_cpu_e200,
2027 .machine_check = machine_check_e200,
2028 .platform = "ppc5554",
2029 }
2030 #endif /* CONFIG_E200 */
2031 #endif /* CONFIG_PPC32 */
2032 #ifdef CONFIG_E500
2033 #ifdef CONFIG_PPC32
2034 { /* e500 */
2035 .pvr_mask = 0xffff0000,
2036 .pvr_value = 0x80200000,
2037 .cpu_name = "e500",
2038 .cpu_features = CPU_FTRS_E500,
2039 .cpu_user_features = COMMON_USER_BOOKE |
2040 PPC_FEATURE_HAS_SPE_COMP |
2041 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2042 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2043 .mmu_features = MMU_FTR_TYPE_FSL_E,
2044 .icache_bsize = 32,
2045 .dcache_bsize = 32,
2046 .num_pmcs = 4,
2047 .oprofile_cpu_type = "ppc/e500",
2048 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2049 .cpu_setup = __setup_cpu_e500v1,
2050 .machine_check = machine_check_e500,
2051 .platform = "ppc8540",
2052 },
2053 { /* e500v2 */
2054 .pvr_mask = 0xffff0000,
2055 .pvr_value = 0x80210000,
2056 .cpu_name = "e500v2",
2057 .cpu_features = CPU_FTRS_E500_2,
2058 .cpu_user_features = COMMON_USER_BOOKE |
2059 PPC_FEATURE_HAS_SPE_COMP |
2060 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2061 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2062 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2063 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2064 .icache_bsize = 32,
2065 .dcache_bsize = 32,
2066 .num_pmcs = 4,
2067 .oprofile_cpu_type = "ppc/e500",
2068 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2069 .cpu_setup = __setup_cpu_e500v2,
2070 .machine_check = machine_check_e500,
2071 .platform = "ppc8548",
2072 },
2073 { /* e500mc */
2074 .pvr_mask = 0xffff0000,
2075 .pvr_value = 0x80230000,
2076 .cpu_name = "e500mc",
2077 .cpu_features = CPU_FTRS_E500MC,
2078 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2079 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2080 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2081 MMU_FTR_USE_TLBILX,
2082 .icache_bsize = 64,
2083 .dcache_bsize = 64,
2084 .num_pmcs = 4,
2085 .oprofile_cpu_type = "ppc/e500mc",
2086 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2087 .cpu_setup = __setup_cpu_e500mc,
2088 .machine_check = machine_check_e500mc,
2089 .platform = "ppce500mc",
2090 },
2091 #endif /* CONFIG_PPC32 */
2092 { /* e5500 */
2093 .pvr_mask = 0xffff0000,
2094 .pvr_value = 0x80240000,
2095 .cpu_name = "e5500",
2096 .cpu_features = CPU_FTRS_E5500,
2097 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2098 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2099 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2100 MMU_FTR_USE_TLBILX,
2101 .icache_bsize = 64,
2102 .dcache_bsize = 64,
2103 .num_pmcs = 4,
2104 .oprofile_cpu_type = "ppc/e500mc",
2105 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2106 .cpu_setup = __setup_cpu_e5500,
2107 #ifndef CONFIG_PPC32
2108 .cpu_restore = __restore_cpu_e5500,
2109 #endif
2110 .machine_check = machine_check_e500mc,
2111 .platform = "ppce5500",
2112 },
2113 { /* e6500 */
2114 .pvr_mask = 0xffff0000,
2115 .pvr_value = 0x80400000,
2116 .cpu_name = "e6500",
2117 .cpu_features = CPU_FTRS_E6500,
2118 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2119 PPC_FEATURE_HAS_ALTIVEC_COMP,
2120 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2121 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2122 MMU_FTR_USE_TLBILX,
2123 .icache_bsize = 64,
2124 .dcache_bsize = 64,
2125 .num_pmcs = 6,
2126 .oprofile_cpu_type = "ppc/e6500",
2127 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2128 .cpu_setup = __setup_cpu_e6500,
2129 #ifndef CONFIG_PPC32
2130 .cpu_restore = __restore_cpu_e6500,
2131 #endif
2132 .machine_check = machine_check_e500mc,
2133 .platform = "ppce6500",
2134 },
2135 #ifdef CONFIG_PPC32
2136 { /* default match */
2137 .pvr_mask = 0x00000000,
2138 .pvr_value = 0x00000000,
2139 .cpu_name = "(generic E500 PPC)",
2140 .cpu_features = CPU_FTRS_E500,
2141 .cpu_user_features = COMMON_USER_BOOKE |
2142 PPC_FEATURE_HAS_SPE_COMP |
2143 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2144 .mmu_features = MMU_FTR_TYPE_FSL_E,
2145 .icache_bsize = 32,
2146 .dcache_bsize = 32,
2147 .machine_check = machine_check_e500,
2148 .platform = "powerpc",
2149 }
2150 #endif /* CONFIG_PPC32 */
2151 #endif /* CONFIG_E500 */
2152
2153 #ifdef CONFIG_PPC_A2
2154 { /* Standard A2 (>= DD2) + FPU core */
2155 .pvr_mask = 0xffff0000,
2156 .pvr_value = 0x00480000,
2157 .cpu_name = "A2 (>= DD2)",
2158 .cpu_features = CPU_FTRS_A2,
2159 .cpu_user_features = COMMON_USER_PPC64,
2160 .mmu_features = MMU_FTRS_A2,
2161 .icache_bsize = 64,
2162 .dcache_bsize = 64,
2163 .num_pmcs = 0,
2164 .cpu_setup = __setup_cpu_a2,
2165 .cpu_restore = __restore_cpu_a2,
2166 .machine_check = machine_check_generic,
2167 .platform = "ppca2",
2168 },
2169 { /* This is a default entry to get going, to be replaced by
2170 * a real one at some stage
2171 */
2172 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2173 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2174 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2175 .pvr_mask = 0x00000000,
2176 .pvr_value = 0x00000000,
2177 .cpu_name = "Book3E",
2178 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2179 .cpu_user_features = COMMON_USER_PPC64,
2180 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2181 MMU_FTR_USE_TLBIVAX_BCAST |
2182 MMU_FTR_LOCK_BCAST_INVAL,
2183 .icache_bsize = 64,
2184 .dcache_bsize = 64,
2185 .num_pmcs = 0,
2186 .machine_check = machine_check_generic,
2187 .platform = "power6",
2188 },
2189 #endif /* CONFIG_PPC_A2 */
2190 };
2191
2192 static struct cpu_spec the_cpu_spec;
2193
2194 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2195 struct cpu_spec *s)
2196 {
2197 struct cpu_spec *t = &the_cpu_spec;
2198 struct cpu_spec old;
2199
2200 t = PTRRELOC(t);
2201 old = *t;
2202
2203 /* Copy everything, then do fixups */
2204 *t = *s;
2205
2206 /*
2207 * If we are overriding a previous value derived from the real
2208 * PVR with a new value obtained using a logical PVR value,
2209 * don't modify the performance monitor fields.
2210 */
2211 if (old.num_pmcs && !s->num_pmcs) {
2212 t->num_pmcs = old.num_pmcs;
2213 t->pmc_type = old.pmc_type;
2214 t->oprofile_type = old.oprofile_type;
2215 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2216 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2217 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2218
2219 /*
2220 * If we have passed through this logic once before and
2221 * have pulled the default case because the real PVR was
2222 * not found inside cpu_specs[], then we are possibly
2223 * running in compatibility mode. In that case, let the
2224 * oprofiler know which set of compatibility counters to
2225 * pull from by making sure the oprofile_cpu_type string
2226 * is set to that of compatibility mode. If the
2227 * oprofile_cpu_type already has a value, then we are
2228 * possibly overriding a real PVR with a logical one,
2229 * and, in that case, keep the current value for
2230 * oprofile_cpu_type.
2231 */
2232 if (old.oprofile_cpu_type != NULL) {
2233 t->oprofile_cpu_type = old.oprofile_cpu_type;
2234 t->oprofile_type = old.oprofile_type;
2235 }
2236 }
2237
2238 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2239
2240 /*
2241 * Set the base platform string once; assumes
2242 * we're called with real pvr first.
2243 */
2244 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2245 *PTRRELOC(&powerpc_base_platform) = t->platform;
2246
2247 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2248 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2249 * that processor. I will consolidate that at a later time, for now,
2250 * just use #ifdef. We also don't need to PTRRELOC the function
2251 * pointer on ppc64 and booke as we are running at 0 in real mode
2252 * on ppc64 and reloc_offset is always 0 on booke.
2253 */
2254 if (t->cpu_setup) {
2255 t->cpu_setup(offset, t);
2256 }
2257 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2258
2259 return t;
2260 }
2261
2262 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2263 {
2264 struct cpu_spec *s = cpu_specs;
2265 int i;
2266
2267 s = PTRRELOC(s);
2268
2269 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2270 if ((pvr & s->pvr_mask) == s->pvr_value)
2271 return setup_cpu_spec(offset, s);
2272 }
2273
2274 BUG();
2275
2276 return NULL;
2277 }
Linux kernel - Deliverables
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