2 * The file intends to implement PE based on the information from
3 * platforms. Basically, there have 3 types of PEs: PHB/Bus/Device.
4 * All the PEs should be organized as hierarchy tree. The first level
5 * of the tree will be associated to existing PHBs since the particular
6 * PE is only meaningful in one PHB domain.
8 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2012.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/delay.h>
26 #include <linux/export.h>
27 #include <linux/gfp.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/string.h>
32 #include <asm/pci-bridge.h>
33 #include <asm/ppc-pci.h>
35 static int eeh_pe_aux_size
= 0;
36 static LIST_HEAD(eeh_phb_pe
);
39 * eeh_set_pe_aux_size - Set PE auxillary data size
40 * @size: PE auxillary data size
42 * Set PE auxillary data size
44 void eeh_set_pe_aux_size(int size
)
49 eeh_pe_aux_size
= size
;
53 * eeh_pe_alloc - Allocate PE
54 * @phb: PCI controller
57 * Allocate PE instance dynamically.
59 static struct eeh_pe
*eeh_pe_alloc(struct pci_controller
*phb
, int type
)
64 alloc_size
= sizeof(struct eeh_pe
);
65 if (eeh_pe_aux_size
) {
66 alloc_size
= ALIGN(alloc_size
, cache_line_size());
67 alloc_size
+= eeh_pe_aux_size
;
71 pe
= kzalloc(alloc_size
, GFP_KERNEL
);
74 /* Initialize PHB PE */
77 INIT_LIST_HEAD(&pe
->child_list
);
78 INIT_LIST_HEAD(&pe
->child
);
79 INIT_LIST_HEAD(&pe
->edevs
);
81 pe
->data
= (void *)pe
+ ALIGN(sizeof(struct eeh_pe
),
87 * eeh_phb_pe_create - Create PHB PE
88 * @phb: PCI controller
90 * The function should be called while the PHB is detected during
91 * system boot or PCI hotplug in order to create PHB PE.
93 int eeh_phb_pe_create(struct pci_controller
*phb
)
98 pe
= eeh_pe_alloc(phb
, EEH_PE_PHB
);
100 pr_err("%s: out of memory!\n", __func__
);
104 /* Put it into the list */
105 list_add_tail(&pe
->child
, &eeh_phb_pe
);
107 pr_debug("EEH: Add PE for PHB#%d\n", phb
->global_number
);
113 * eeh_phb_pe_get - Retrieve PHB PE based on the given PHB
114 * @phb: PCI controller
116 * The overall PEs form hierarchy tree. The first layer of the
117 * hierarchy tree is composed of PHB PEs. The function is used
118 * to retrieve the corresponding PHB PE according to the given PHB.
120 struct eeh_pe
*eeh_phb_pe_get(struct pci_controller
*phb
)
124 list_for_each_entry(pe
, &eeh_phb_pe
, child
) {
126 * Actually, we needn't check the type since
127 * the PE for PHB has been determined when that
130 if ((pe
->type
& EEH_PE_PHB
) && pe
->phb
== phb
)
138 * eeh_pe_next - Retrieve the next PE in the tree
142 * The function is used to retrieve the next PE in the
145 static struct eeh_pe
*eeh_pe_next(struct eeh_pe
*pe
,
148 struct list_head
*next
= pe
->child_list
.next
;
150 if (next
== &pe
->child_list
) {
154 next
= pe
->child
.next
;
155 if (next
!= &pe
->parent
->child_list
)
161 return list_entry(next
, struct eeh_pe
, child
);
165 * eeh_pe_traverse - Traverse PEs in the specified PHB
168 * @flag: extra parameter to callback
170 * The function is used to traverse the specified PE and its
171 * child PEs. The traversing is to be terminated once the
172 * callback returns something other than NULL, or no more PEs
175 void *eeh_pe_traverse(struct eeh_pe
*root
,
176 eeh_traverse_func fn
, void *flag
)
181 for (pe
= root
; pe
; pe
= eeh_pe_next(pe
, root
)) {
190 * eeh_pe_dev_traverse - Traverse the devices from the PE
192 * @fn: function callback
193 * @flag: extra parameter to callback
195 * The function is used to traverse the devices of the specified
196 * PE and its child PEs.
198 void *eeh_pe_dev_traverse(struct eeh_pe
*root
,
199 eeh_traverse_func fn
, void *flag
)
202 struct eeh_dev
*edev
, *tmp
;
206 pr_warn("%s: Invalid PE %p\n",
211 /* Traverse root PE */
212 for (pe
= root
; pe
; pe
= eeh_pe_next(pe
, root
)) {
213 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
214 ret
= fn(edev
, flag
);
224 * __eeh_pe_get - Check the PE address
228 * For one particular PE, it can be identified by PE address
229 * or tranditional BDF address. BDF address is composed of
230 * Bus/Device/Function number. The extra data referred by flag
231 * indicates which type of address should be used.
233 static void *__eeh_pe_get(void *data
, void *flag
)
235 struct eeh_pe
*pe
= (struct eeh_pe
*)data
;
236 struct eeh_dev
*edev
= (struct eeh_dev
*)flag
;
238 /* Unexpected PHB PE */
239 if (pe
->type
& EEH_PE_PHB
)
243 * We prefer PE address. For most cases, we should
244 * have non-zero PE address
246 if (eeh_has_flag(EEH_VALID_PE_ZERO
)) {
247 if (edev
->pe_config_addr
== pe
->addr
)
250 if (edev
->pe_config_addr
&&
251 (edev
->pe_config_addr
== pe
->addr
))
255 /* Try BDF address */
256 if (edev
->config_addr
&&
257 (edev
->config_addr
== pe
->config_addr
))
264 * eeh_pe_get - Search PE based on the given address
267 * Search the corresponding PE based on the specified address which
268 * is included in the eeh device. The function is used to check if
269 * the associated PE has been created against the PE address. It's
270 * notable that the PE address has 2 format: traditional PE address
271 * which is composed of PCI bus/device/function number, or unified
274 struct eeh_pe
*eeh_pe_get(struct eeh_dev
*edev
)
276 struct eeh_pe
*root
= eeh_phb_pe_get(edev
->phb
);
279 pe
= eeh_pe_traverse(root
, __eeh_pe_get
, edev
);
285 * eeh_pe_get_parent - Retrieve the parent PE
288 * The whole PEs existing in the system are organized as hierarchy
289 * tree. The function is used to retrieve the parent PE according
290 * to the parent EEH device.
292 static struct eeh_pe
*eeh_pe_get_parent(struct eeh_dev
*edev
)
294 struct device_node
*dn
;
295 struct eeh_dev
*parent
;
298 * It might have the case for the indirect parent
299 * EEH device already having associated PE, but
300 * the direct parent EEH device doesn't have yet.
302 dn
= edev
->dn
->parent
;
304 /* We're poking out of PCI territory */
305 if (!PCI_DN(dn
)) return NULL
;
307 parent
= of_node_to_eeh_dev(dn
);
308 /* We're poking out of PCI territory */
309 if (!parent
) return NULL
;
321 * eeh_add_to_parent_pe - Add EEH device to parent PE
324 * Add EEH device to the parent PE. If the parent PE already
325 * exists, the PE type will be changed to EEH_PE_BUS. Otherwise,
326 * we have to create new PE to hold the EEH device and the new
327 * PE will be linked to its parent PE as well.
329 int eeh_add_to_parent_pe(struct eeh_dev
*edev
)
331 struct eeh_pe
*pe
, *parent
;
334 * Search the PE has been existing or not according
335 * to the PE address. If that has been existing, the
336 * PE should be composed of PCI bus and its subordinate
339 pe
= eeh_pe_get(edev
);
340 if (pe
&& !(pe
->type
& EEH_PE_INVALID
)) {
341 if (!edev
->pe_config_addr
) {
342 pr_err("%s: PE with addr 0x%x already exists\n",
343 __func__
, edev
->config_addr
);
347 /* Mark the PE as type of PCI bus */
348 pe
->type
= EEH_PE_BUS
;
351 /* Put the edev to PE */
352 list_add_tail(&edev
->list
, &pe
->edevs
);
353 pr_debug("EEH: Add %s to Bus PE#%x\n",
354 edev
->dn
->full_name
, pe
->addr
);
357 } else if (pe
&& (pe
->type
& EEH_PE_INVALID
)) {
358 list_add_tail(&edev
->list
, &pe
->edevs
);
361 * We're running to here because of PCI hotplug caused by
362 * EEH recovery. We need clear EEH_PE_INVALID until the top.
366 if (!(parent
->type
& EEH_PE_INVALID
))
368 parent
->type
&= ~(EEH_PE_INVALID
| EEH_PE_KEEP
);
369 parent
= parent
->parent
;
371 pr_debug("EEH: Add %s to Device PE#%x, Parent PE#%x\n",
372 edev
->dn
->full_name
, pe
->addr
, pe
->parent
->addr
);
377 /* Create a new EEH PE */
378 pe
= eeh_pe_alloc(edev
->phb
, EEH_PE_DEVICE
);
380 pr_err("%s: out of memory!\n", __func__
);
383 pe
->addr
= edev
->pe_config_addr
;
384 pe
->config_addr
= edev
->config_addr
;
387 * Put the new EEH PE into hierarchy tree. If the parent
388 * can't be found, the newly created PE will be attached
389 * to PHB directly. Otherwise, we have to associate the
390 * PE with its parent.
392 parent
= eeh_pe_get_parent(edev
);
394 parent
= eeh_phb_pe_get(edev
->phb
);
396 pr_err("%s: No PHB PE is found (PHB Domain=%d)\n",
397 __func__
, edev
->phb
->global_number
);
406 * Put the newly created PE into the child list and
407 * link the EEH device accordingly.
409 list_add_tail(&pe
->child
, &parent
->child_list
);
410 list_add_tail(&edev
->list
, &pe
->edevs
);
412 pr_debug("EEH: Add %s to Device PE#%x, Parent PE#%x\n",
413 edev
->dn
->full_name
, pe
->addr
, pe
->parent
->addr
);
419 * eeh_rmv_from_parent_pe - Remove one EEH device from the associated PE
422 * The PE hierarchy tree might be changed when doing PCI hotplug.
423 * Also, the PCI devices or buses could be removed from the system
424 * during EEH recovery. So we have to call the function remove the
425 * corresponding PE accordingly if necessary.
427 int eeh_rmv_from_parent_pe(struct eeh_dev
*edev
)
429 struct eeh_pe
*pe
, *parent
, *child
;
433 pr_debug("%s: No PE found for EEH device %s\n",
434 __func__
, edev
->dn
->full_name
);
438 /* Remove the EEH device */
439 pe
= eeh_dev_to_pe(edev
);
441 list_del(&edev
->list
);
444 * Check if the parent PE includes any EEH devices.
445 * If not, we should delete that. Also, we should
446 * delete the parent PE if it doesn't have associated
447 * child PEs and EEH devices.
451 if (pe
->type
& EEH_PE_PHB
)
454 if (!(pe
->state
& EEH_PE_KEEP
)) {
455 if (list_empty(&pe
->edevs
) &&
456 list_empty(&pe
->child_list
)) {
457 list_del(&pe
->child
);
463 if (list_empty(&pe
->edevs
)) {
465 list_for_each_entry(child
, &pe
->child_list
, child
) {
466 if (!(child
->type
& EEH_PE_INVALID
)) {
473 pe
->type
|= EEH_PE_INVALID
;
486 * eeh_pe_update_time_stamp - Update PE's frozen time stamp
489 * We have time stamp for each PE to trace its time of getting
490 * frozen in last hour. The function should be called to update
491 * the time stamp on first error of the specific PE. On the other
492 * handle, we needn't account for errors happened in last hour.
494 void eeh_pe_update_time_stamp(struct eeh_pe
*pe
)
496 struct timeval tstamp
;
500 if (pe
->freeze_count
<= 0) {
501 pe
->freeze_count
= 0;
502 do_gettimeofday(&pe
->tstamp
);
504 do_gettimeofday(&tstamp
);
505 if (tstamp
.tv_sec
- pe
->tstamp
.tv_sec
> 3600) {
507 pe
->freeze_count
= 0;
513 * __eeh_pe_state_mark - Mark the state for the PE
517 * The function is used to mark the indicated state for the given
518 * PE. Also, the associated PCI devices will be put into IO frozen
521 static void *__eeh_pe_state_mark(void *data
, void *flag
)
523 struct eeh_pe
*pe
= (struct eeh_pe
*)data
;
524 int state
= *((int *)flag
);
525 struct eeh_dev
*edev
, *tmp
;
526 struct pci_dev
*pdev
;
528 /* Keep the state of permanently removed PE intact */
529 if (pe
->state
& EEH_PE_REMOVED
)
534 /* Offline PCI devices if applicable */
535 if (!(state
& EEH_PE_ISOLATED
))
538 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
539 pdev
= eeh_dev_to_pci_dev(edev
);
541 pdev
->error_state
= pci_channel_io_frozen
;
544 /* Block PCI config access if required */
545 if (pe
->state
& EEH_PE_CFG_RESTRICTED
)
546 pe
->state
|= EEH_PE_CFG_BLOCKED
;
552 * eeh_pe_state_mark - Mark specified state for PE and its associated device
555 * EEH error affects the current PE and its child PEs. The function
556 * is used to mark appropriate state for the affected PEs and the
557 * associated devices.
559 void eeh_pe_state_mark(struct eeh_pe
*pe
, int state
)
561 eeh_pe_traverse(pe
, __eeh_pe_state_mark
, &state
);
564 static void *__eeh_pe_dev_mode_mark(void *data
, void *flag
)
566 struct eeh_dev
*edev
= data
;
567 int mode
= *((int *)flag
);
575 * eeh_pe_dev_state_mark - Mark state for all device under the PE
578 * Mark specific state for all child devices of the PE.
580 void eeh_pe_dev_mode_mark(struct eeh_pe
*pe
, int mode
)
582 eeh_pe_dev_traverse(pe
, __eeh_pe_dev_mode_mark
, &mode
);
586 * __eeh_pe_state_clear - Clear state for the PE
590 * The function is used to clear the indicated state from the
591 * given PE. Besides, we also clear the check count of the PE
594 static void *__eeh_pe_state_clear(void *data
, void *flag
)
596 struct eeh_pe
*pe
= (struct eeh_pe
*)data
;
597 int state
= *((int *)flag
);
598 struct eeh_dev
*edev
, *tmp
;
599 struct pci_dev
*pdev
;
601 /* Keep the state of permanently removed PE intact */
602 if (pe
->state
& EEH_PE_REMOVED
)
608 * Special treatment on clearing isolated state. Clear
609 * check count since last isolation and put all affected
610 * devices to normal state.
612 if (!(state
& EEH_PE_ISOLATED
))
616 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
617 pdev
= eeh_dev_to_pci_dev(edev
);
621 pdev
->error_state
= pci_channel_io_normal
;
624 /* Unblock PCI config access if required */
625 if (pe
->state
& EEH_PE_CFG_RESTRICTED
)
626 pe
->state
&= ~EEH_PE_CFG_BLOCKED
;
632 * eeh_pe_state_clear - Clear state for the PE and its children
634 * @state: state to be cleared
636 * When the PE and its children has been recovered from error,
637 * we need clear the error state for that. The function is used
640 void eeh_pe_state_clear(struct eeh_pe
*pe
, int state
)
642 eeh_pe_traverse(pe
, __eeh_pe_state_clear
, &state
);
646 * Some PCI bridges (e.g. PLX bridges) have primary/secondary
647 * buses assigned explicitly by firmware, and we probably have
648 * lost that after reset. So we have to delay the check until
649 * the PCI-CFG registers have been restored for the parent
652 * Don't use normal PCI-CFG accessors, which probably has been
653 * blocked on normal path during the stage. So we need utilize
654 * eeh operations, which is always permitted.
656 static void eeh_bridge_check_link(struct eeh_dev
*edev
,
657 struct device_node
*dn
)
664 * We only check root port and downstream ports of
667 if (!(edev
->mode
& (EEH_DEV_ROOT_PORT
| EEH_DEV_DS_PORT
)))
670 pr_debug("%s: Check PCIe link for %04x:%02x:%02x.%01x ...\n",
671 __func__
, edev
->phb
->global_number
,
672 edev
->config_addr
>> 8,
673 PCI_SLOT(edev
->config_addr
& 0xFF),
674 PCI_FUNC(edev
->config_addr
& 0xFF));
676 /* Check slot status */
677 cap
= edev
->pcie_cap
;
678 eeh_ops
->read_config(dn
, cap
+ PCI_EXP_SLTSTA
, 2, &val
);
679 if (!(val
& PCI_EXP_SLTSTA_PDS
)) {
680 pr_debug(" No card in the slot (0x%04x) !\n", val
);
684 /* Check power status if we have the capability */
685 eeh_ops
->read_config(dn
, cap
+ PCI_EXP_SLTCAP
, 2, &val
);
686 if (val
& PCI_EXP_SLTCAP_PCP
) {
687 eeh_ops
->read_config(dn
, cap
+ PCI_EXP_SLTCTL
, 2, &val
);
688 if (val
& PCI_EXP_SLTCTL_PCC
) {
689 pr_debug(" In power-off state, power it on ...\n");
690 val
&= ~(PCI_EXP_SLTCTL_PCC
| PCI_EXP_SLTCTL_PIC
);
691 val
|= (0x0100 & PCI_EXP_SLTCTL_PIC
);
692 eeh_ops
->write_config(dn
, cap
+ PCI_EXP_SLTCTL
, 2, val
);
698 eeh_ops
->read_config(dn
, cap
+ PCI_EXP_LNKCTL
, 2, &val
);
699 val
&= ~PCI_EXP_LNKCTL_LD
;
700 eeh_ops
->write_config(dn
, cap
+ PCI_EXP_LNKCTL
, 2, val
);
703 eeh_ops
->read_config(dn
, cap
+ PCI_EXP_LNKCAP
, 4, &val
);
704 if (!(val
& PCI_EXP_LNKCAP_DLLLARC
)) {
705 pr_debug(" No link reporting capability (0x%08x) \n", val
);
710 /* Wait the link is up until timeout (5s) */
712 while (timeout
< 5000) {
716 eeh_ops
->read_config(dn
, cap
+ PCI_EXP_LNKSTA
, 2, &val
);
717 if (val
& PCI_EXP_LNKSTA_DLLLA
)
721 if (val
& PCI_EXP_LNKSTA_DLLLA
)
722 pr_debug(" Link up (%s)\n",
723 (val
& PCI_EXP_LNKSTA_CLS_2_5GB
) ? "2.5GB" : "5GB");
725 pr_debug(" Link not ready (0x%04x)\n", val
);
728 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
729 #define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
731 static void eeh_restore_bridge_bars(struct eeh_dev
*edev
,
732 struct device_node
*dn
)
737 * Device BARs: 0x10 - 0x18
738 * Bus numbers and windows: 0x18 - 0x30
740 for (i
= 4; i
< 13; i
++)
741 eeh_ops
->write_config(dn
, i
*4, 4, edev
->config_space
[i
]);
743 eeh_ops
->write_config(dn
, 14*4, 4, edev
->config_space
[14]);
745 /* Cache line & Latency timer: 0xC 0xD */
746 eeh_ops
->write_config(dn
, PCI_CACHE_LINE_SIZE
, 1,
747 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
748 eeh_ops
->write_config(dn
, PCI_LATENCY_TIMER
, 1,
749 SAVED_BYTE(PCI_LATENCY_TIMER
));
750 /* Max latency, min grant, interrupt ping and line: 0x3C */
751 eeh_ops
->write_config(dn
, 15*4, 4, edev
->config_space
[15]);
753 /* PCI Command: 0x4 */
754 eeh_ops
->write_config(dn
, PCI_COMMAND
, 4, edev
->config_space
[1]);
756 /* Check the PCIe link is ready */
757 eeh_bridge_check_link(edev
, dn
);
760 static void eeh_restore_device_bars(struct eeh_dev
*edev
,
761 struct device_node
*dn
)
766 for (i
= 4; i
< 10; i
++)
767 eeh_ops
->write_config(dn
, i
*4, 4, edev
->config_space
[i
]);
768 /* 12 == Expansion ROM Address */
769 eeh_ops
->write_config(dn
, 12*4, 4, edev
->config_space
[12]);
771 eeh_ops
->write_config(dn
, PCI_CACHE_LINE_SIZE
, 1,
772 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
773 eeh_ops
->write_config(dn
, PCI_LATENCY_TIMER
, 1,
774 SAVED_BYTE(PCI_LATENCY_TIMER
));
776 /* max latency, min grant, interrupt pin and line */
777 eeh_ops
->write_config(dn
, 15*4, 4, edev
->config_space
[15]);
780 * Restore PERR & SERR bits, some devices require it,
781 * don't touch the other command bits
783 eeh_ops
->read_config(dn
, PCI_COMMAND
, 4, &cmd
);
784 if (edev
->config_space
[1] & PCI_COMMAND_PARITY
)
785 cmd
|= PCI_COMMAND_PARITY
;
787 cmd
&= ~PCI_COMMAND_PARITY
;
788 if (edev
->config_space
[1] & PCI_COMMAND_SERR
)
789 cmd
|= PCI_COMMAND_SERR
;
791 cmd
&= ~PCI_COMMAND_SERR
;
792 eeh_ops
->write_config(dn
, PCI_COMMAND
, 4, cmd
);
796 * eeh_restore_one_device_bars - Restore the Base Address Registers for one device
800 * Loads the PCI configuration space base address registers,
801 * the expansion ROM base address, the latency timer, and etc.
802 * from the saved values in the device node.
804 static void *eeh_restore_one_device_bars(void *data
, void *flag
)
806 struct eeh_dev
*edev
= (struct eeh_dev
*)data
;
807 struct device_node
*dn
= eeh_dev_to_of_node(edev
);
809 /* Do special restore for bridges */
810 if (edev
->mode
& EEH_DEV_BRIDGE
)
811 eeh_restore_bridge_bars(edev
, dn
);
813 eeh_restore_device_bars(edev
, dn
);
815 if (eeh_ops
->restore_config
)
816 eeh_ops
->restore_config(dn
);
822 * eeh_pe_restore_bars - Restore the PCI config space info
825 * This routine performs a recursive walk to the children
826 * of this device as well.
828 void eeh_pe_restore_bars(struct eeh_pe
*pe
)
831 * We needn't take the EEH lock since eeh_pe_dev_traverse()
834 eeh_pe_dev_traverse(pe
, eeh_restore_one_device_bars
, NULL
);
838 * eeh_pe_loc_get - Retrieve location code binding to the given PE
841 * Retrieve the location code of the given PE. If the primary PE bus
842 * is root bus, we will grab location code from PHB device tree node
843 * or root port. Otherwise, the upstream bridge's device tree node
844 * of the primary PE bus will be checked for the location code.
846 const char *eeh_pe_loc_get(struct eeh_pe
*pe
)
848 struct pci_bus
*bus
= eeh_pe_bus_get(pe
);
849 struct device_node
*dn
= pci_bus_to_OF_node(bus
);
850 const char *loc
= NULL
;
855 /* PHB PE or root PE ? */
856 if (pci_is_root_bus(bus
)) {
857 loc
= of_get_property(dn
, "ibm,loc-code", NULL
);
859 loc
= of_get_property(dn
, "ibm,io-base-loc-code", NULL
);
863 /* Check the root port */
869 loc
= of_get_property(dn
, "ibm,loc-code", NULL
);
871 loc
= of_get_property(dn
, "ibm,slot-location-code", NULL
);
874 return loc
? loc
: "N/A";
878 * eeh_pe_bus_get - Retrieve PCI bus according to the given PE
881 * Retrieve the PCI bus according to the given PE. Basically,
882 * there're 3 types of PEs: PHB/Bus/Device. For PHB PE, the
883 * primary PCI bus will be retrieved. The parent bus will be
884 * returned for BUS PE. However, we don't have associated PCI
887 struct pci_bus
*eeh_pe_bus_get(struct eeh_pe
*pe
)
889 struct pci_bus
*bus
= NULL
;
890 struct eeh_dev
*edev
;
891 struct pci_dev
*pdev
;
893 if (pe
->type
& EEH_PE_PHB
) {
895 } else if (pe
->type
& EEH_PE_BUS
||
896 pe
->type
& EEH_PE_DEVICE
) {
902 edev
= list_first_entry(&pe
->edevs
, struct eeh_dev
, list
);
903 pdev
= eeh_dev_to_pci_dev(edev
);