2 * This file contains the power_save function for Power7 CPUs.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
10 #include <linux/threads.h>
11 #include <asm/processor.h>
13 #include <asm/cputable.h>
14 #include <asm/thread_info.h>
15 #include <asm/ppc_asm.h>
16 #include <asm/asm-offsets.h>
17 #include <asm/ppc-opcode.h>
18 #include <asm/hw_irq.h>
19 #include <asm/kvm_book3s_asm.h>
21 #include <asm/cpuidle.h>
22 #include <asm/book3s/64/mmu-hash.h>
27 * Use unused space in the interrupt stack to save and restore
28 * registers for winkle support.
40 /* Idle state entry routines */
42 #define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
43 /* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
55 * Used by threads when the lock bit of core_idle_state is set.
56 * Threads will spin in HMT_LOW until the lock bit is cleared.
57 * r14 - pointer to core_idle_state
58 * r15 - used to load contents of core_idle_state
64 andi. r15,r15,PNV_CORE_IDLE_LOCK_BIT
71 * Pass requested state in r3:
72 * r3 - PNV_THREAD_NAP/SLEEP/WINKLE
74 * To check IRQ_HAPPENED in r4
78 _GLOBAL(power7_powersave_common)
79 /* Use r3 to pass state nap/sleep/winkle */
80 /* NAP is a state loss, we create a regs frame on the
81 * stack, fill it up with the state we care about and
82 * stick a pointer to it in PACAR1. We really only
83 * need to save PC, some CR bits and the NV GPRs,
84 * but for now an interrupt frame will do.
88 stdu r1,-INT_FRAME_SIZE(r1)
92 /* Hard disable interrupts */
96 mtmsrd r9,1 /* hard-disable interrupts */
98 /* Check if something happened while soft-disabled */
99 lbz r0,PACAIRQHAPPENED(r13)
100 andi. r0,r0,~PACA_IRQ_HARD_DIS@l
104 addi r1,r1,INT_FRAME_SIZE
106 li r3,0 /* Return 0 (no nap) */
110 1: /* We mark irqs hard disabled as this is the state we'll
111 * be in when returning and we need to tell arch_local_irq_restore()
114 li r0,PACA_IRQ_HARD_DIS
115 stb r0,PACAIRQHAPPENED(r13)
117 /* We haven't lost state ... yet */
119 stb r0,PACA_NAPSTATELOST(r13)
121 /* Continue saving state */
130 * Go to real mode to do the nap, as required by the architecture.
131 * Also, we need to be in real mode before setting hwthread_state,
132 * because as soon as we do that, another thread can switch
133 * the MMU context to the guest.
135 LOAD_REG_IMMEDIATE(r5, MSR_IDLE)
138 LOAD_REG_ADDR(r7, power7_enter_nap_mode)
139 mtmsrd r6, 1 /* clear RI before setting SRR0/1 */
144 .globl power7_enter_nap_mode
145 power7_enter_nap_mode:
146 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
147 /* Tell KVM we're napping */
148 li r4,KVM_HWTHREAD_IN_NAP
149 stb r4,HSTATE_HWTHREAD_STATE(r13)
151 stb r3,PACA_THREAD_IDLE_STATE(r13)
152 cmpwi cr3,r3,PNV_THREAD_SLEEP
154 IDLE_STATE_ENTER_SEQ(PPC_NAP)
157 /* Sleep or winkle */
158 lbz r7,PACA_THREAD_MASK(r13)
159 ld r14,PACA_CORE_IDLE_STATE_PTR(r13)
163 andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT
164 bnel core_idle_lock_held
166 andc r15,r15,r7 /* Clear thread bit */
168 andi. r15,r15,PNV_CORE_IDLE_THREAD_BITS
171 * If cr0 = 0, then current thread is the last thread of the core entering
172 * sleep. Last thread needs to execute the hardware bug workaround code if
173 * required by the platform.
174 * Make the workaround call unconditionally here. The below branch call is
175 * patched out when the idle states are discovered if the platform does not
178 .global pnv_fastsleep_workaround_at_entry
179 pnv_fastsleep_workaround_at_entry:
180 beq fastsleep_workaround_at_entry
186 common_enter: /* common code for all the threads entering sleep or winkle */
188 IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
190 fastsleep_workaround_at_entry:
191 ori r15,r15,PNV_CORE_IDLE_LOCK_BIT
196 /* Fast sleep workaround */
199 li r0,OPAL_CONFIG_CPU_IDLE_STATE
200 bl opal_call_realmode
210 * Note all register i.e per-core, per-subcore or per-thread is saved
211 * here since any thread in the core might wake up first
231 IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
234 /* Now check if user or arch enabled NAP mode */
235 LOAD_REG_ADDRBASE(r3,powersave_nap)
236 lwz r4,ADDROFF(powersave_nap)(r3)
245 b power7_powersave_common
248 _GLOBAL(power7_sleep)
249 li r3,PNV_THREAD_SLEEP
251 b power7_powersave_common
254 _GLOBAL(power7_winkle)
257 b power7_powersave_common
260 #define CHECK_HMI_INTERRUPT \
261 mfspr r0,SPRN_SRR1; \
262 BEGIN_FTR_SECTION_NESTED(66); \
263 rlwinm r0,r0,45-31,0xf; /* extract wake reason field (P8) */ \
264 FTR_SECTION_ELSE_NESTED(66); \
265 rlwinm r0,r0,45-31,0xe; /* P7 wake reason field is 3 bits */ \
266 ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
267 cmpwi r0,0xa; /* Hypervisor maintenance ? */ \
269 /* Invoke opal call to handle hmi */ \
270 ld r2,PACATOC(r13); \
272 std r3,ORIG_GPR3(r1); /* Save original r3 */ \
273 li r0,OPAL_HANDLE_HMI; /* Pass opal token argument*/ \
274 bl opal_call_realmode; \
275 ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \
279 _GLOBAL(power7_wakeup_tb_loss)
283 * Before entering any idle state, the NVGPRs are saved in the stack
284 * and they are restored before switching to the process context. Hence
285 * until they are restored, they are free to be used.
287 * Save SRR1 in a NVGPR as it might be clobbered in opal_call_realmode
288 * (called in CHECK_HMI_INTERRUPT). SRR1 is required to determine the
289 * wakeup reason if we branch to kvm_start_guest.
295 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
297 lbz r7,PACA_THREAD_MASK(r13)
298 ld r14,PACA_CORE_IDLE_STATE_PTR(r13)
301 andi. r9,r15,PNV_CORE_IDLE_LOCK_BIT
303 * Lock bit is set in one of the 2 cases-
304 * a. In the sleep/winkle enter path, the last thread is executing
305 * fastsleep workaround code.
306 * b. In the wake up path, another thread is executing fastsleep
307 * workaround undo code or resyncing timebase or restoring context
308 * In either case loop until the lock bit is cleared.
310 bnel core_idle_lock_held
313 lbz r4,PACA_SUBCORE_SIBLING_MASK(r13)
315 cmpwi cr1,r4,0 /* Check if first in subcore */
319 * cr1 - 0b0100 if first thread to wakeup in subcore
320 * cr2 - 0b0100 if first thread to wakeup in core
321 * cr3- 0b0010 if waking up from sleep or winkle
322 * cr4 - 0b0100 if waking up from winkle
325 or r15,r15,r7 /* Set thread bit */
327 beq cr1,first_thread_in_subcore
329 /* Not first thread in subcore to wake up */
335 first_thread_in_subcore:
336 /* First thread in subcore to wakeup */
337 ori r15,r15,PNV_CORE_IDLE_LOCK_BIT
343 * If waking up from sleep, subcore state is not lost. Hence
344 * skip subcore state restore
346 bne cr4,subcore_state_restored
348 /* Restore per-subcore state */
356 subcore_state_restored:
358 * Check if the thread is also the first thread in the core. If not,
359 * skip to clear_lock.
363 first_thread_in_core:
366 * First thread in the core waking up from fastsleep. It needs to
367 * call the fastsleep workaround code if the platform requires it.
368 * Call it unconditionally here. The below branch instruction will
369 * be patched out when the idle states are discovered if platform
370 * does not require workaround.
372 .global pnv_fastsleep_workaround_at_exit
373 pnv_fastsleep_workaround_at_exit:
374 b fastsleep_workaround_at_exit
377 /* Do timebase resync if we are waking up from sleep. Use cr3 value
378 * set in exceptions-64s.S */
380 /* Time base re-sync */
381 li r0,OPAL_RESYNC_TIMEBASE
382 bl opal_call_realmode;
383 /* TODO: Check r3 for failure */
386 * If waking up from sleep, per core state is not lost, skip to
391 /* Restore per core state */
398 andi. r15,r15,PNV_CORE_IDLE_THREAD_BITS
404 * Common to all threads.
406 * If waking up from sleep, hypervisor state is not lost. Hence
407 * skip hypervisor state restore.
409 bne cr4,hypervisor_state_restored
411 /* Waking up from winkle */
413 /* Restore per thread state */
414 bl __restore_cpu_power8
416 /* Restore SLB from PACA */
417 ld r8,PACA_SLBSHADOWPTR(r13)
420 li r3, SLBSHADOW_SAVEAREA
424 andis. r7,r5,SLB_ESID_V@h
439 hypervisor_state_restored:
441 li r5,PNV_THREAD_RUNNING
442 stb r5,PACA_THREAD_IDLE_STATE(r13)
445 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
446 li r0,KVM_HWTHREAD_IN_KERNEL
447 stb r0,HSTATE_HWTHREAD_STATE(r13)
448 /* Order setting hwthread_state vs. testing hwthread_req */
450 lbz r0,HSTATE_HWTHREAD_REQ(r13)
462 addi r1,r1,INT_FRAME_SIZE
464 mfspr r3,SPRN_SRR1 /* Return SRR1 */
469 fastsleep_workaround_at_exit:
472 li r0,OPAL_CONFIG_CPU_IDLE_STATE
473 bl opal_call_realmode
477 * R3 here contains the value that will be returned to the caller
480 _GLOBAL(power7_wakeup_loss)
484 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
490 addi r1,r1,INT_FRAME_SIZE
497 * R3 here contains the value that will be returned to the caller
500 _GLOBAL(power7_wakeup_noloss)
501 lbz r0,PACA_NAPSTATELOST(r13)
503 bne power7_wakeup_loss
506 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
511 addi r1,r1,INT_FRAME_SIZE