2 * Common prep/pmac/chrp boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/tty.h>
14 #include <linux/seq_file.h>
15 #include <linux/root_dev.h>
16 #include <linux/cpu.h>
17 #include <linux/console.h>
18 #include <linux/memblock.h>
22 #include <asm/processor.h>
23 #include <asm/pgtable.h>
24 #include <asm/setup.h>
27 #include <asm/cputable.h>
28 #include <asm/bootx.h>
29 #include <asm/btext.h>
30 #include <asm/machdep.h>
31 #include <asm/uaccess.h>
32 #include <asm/pmac_feature.h>
33 #include <asm/sections.h>
34 #include <asm/nvram.h>
37 #include <asm/serial.h>
39 #include <asm/mmu_context.h>
40 #include <asm/epapr_hcalls.h>
41 #include <asm/code-patching.h>
45 extern void bootx_init(unsigned long r4
, unsigned long phys
);
48 EXPORT_SYMBOL_GPL(boot_cpuid_phys
);
50 int smp_hw_index
[NR_CPUS
];
52 unsigned long ISA_DMA_THRESHOLD
;
53 unsigned int DMA_MODE_READ
;
54 unsigned int DMA_MODE_WRITE
;
57 * These are used in binfmt_elf.c to put aux entries on the stack
58 * for each elf executable being started.
65 * We're called here very early in the boot. We determine the machine
66 * type and call the appropriate low-level setup functions.
67 * -- Cort <cort@fsmlabs.com>
69 * Note that the kernel may be running at an address which is different
70 * from the address that it was linked at, so we must use RELOC/PTRRELOC
71 * to access static data (including strings). -- paulus
73 notrace
unsigned long __init
early_init(unsigned long dt_ptr
)
75 unsigned long offset
= reloc_offset();
76 struct cpu_spec
*spec
;
78 /* First zero the BSS -- use memset_io, some platforms don't have
80 memset_io((void __iomem
*)PTRRELOC(&__bss_start
), 0,
81 __bss_stop
- __bss_start
);
84 * Identify the CPU type and fix up code sections
85 * that depend on which cpu we have.
87 spec
= identify_cpu(offset
, mfspr(SPRN_PVR
));
89 do_feature_fixups(spec
->cpu_features
,
90 PTRRELOC(&__start___ftr_fixup
),
91 PTRRELOC(&__stop___ftr_fixup
));
93 do_feature_fixups(spec
->mmu_features
,
94 PTRRELOC(&__start___mmu_ftr_fixup
),
95 PTRRELOC(&__stop___mmu_ftr_fixup
));
97 do_lwsync_fixups(spec
->cpu_features
,
98 PTRRELOC(&__start___lwsync_fixup
),
99 PTRRELOC(&__stop___lwsync_fixup
));
103 return KERNELBASE
+ offset
;
108 * Find out what kind of machine we're on and save any data we need
109 * from the early boot process (devtree is copied on pmac by prom_init()).
110 * This is called very early on the boot process, after a minimal
111 * MMU environment has been set up but before MMU_init is called.
113 extern unsigned int memset_nocache_branch
; /* Insn to be replaced by NOP */
115 notrace
void __init
machine_init(u64 dt_ptr
)
117 /* Enable early debugging if any specified (see udbg.h) */
120 patch_instruction((unsigned int *)&memcpy
, PPC_INST_NOP
);
121 patch_instruction(&memset_nocache_branch
, PPC_INST_NOP
);
123 /* Do some early initialization based on the flat device tree */
124 early_init_devtree(__va(dt_ptr
));
126 epapr_paravirt_early_init();
132 setup_kdump_trampoline();
135 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
136 cpu_has_feature(CPU_FTR_CAN_NAP
))
137 ppc_md
.power_save
= ppc6xx_idle
;
141 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
142 cpu_has_feature(CPU_FTR_CAN_NAP
))
143 ppc_md
.power_save
= e500_idle
;
146 ppc_md
.progress("id mach(): done", 0x200);
149 /* Checks "l2cr=xxxx" command-line option */
150 int __init
ppc_setup_l2cr(char *str
)
152 if (cpu_has_feature(CPU_FTR_L2CR
)) {
153 unsigned long val
= simple_strtoul(str
, NULL
, 0);
154 printk(KERN_INFO
"l2cr set to %lx\n", val
);
155 _set_L2CR(0); /* force invalidate by disable cache */
156 _set_L2CR(val
); /* and enable it */
160 __setup("l2cr=", ppc_setup_l2cr
);
162 /* Checks "l3cr=xxxx" command-line option */
163 int __init
ppc_setup_l3cr(char *str
)
165 if (cpu_has_feature(CPU_FTR_L3CR
)) {
166 unsigned long val
= simple_strtoul(str
, NULL
, 0);
167 printk(KERN_INFO
"l3cr set to %lx\n", val
);
168 _set_L3CR(val
); /* and enable it */
172 __setup("l3cr=", ppc_setup_l3cr
);
174 #ifdef CONFIG_GENERIC_NVRAM
176 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
177 unsigned char nvram_read_byte(int addr
)
179 if (ppc_md
.nvram_read_val
)
180 return ppc_md
.nvram_read_val(addr
);
183 EXPORT_SYMBOL(nvram_read_byte
);
185 void nvram_write_byte(unsigned char val
, int addr
)
187 if (ppc_md
.nvram_write_val
)
188 ppc_md
.nvram_write_val(addr
, val
);
190 EXPORT_SYMBOL(nvram_write_byte
);
192 ssize_t
nvram_get_size(void)
194 if (ppc_md
.nvram_size
)
195 return ppc_md
.nvram_size();
198 EXPORT_SYMBOL(nvram_get_size
);
200 void nvram_sync(void)
202 if (ppc_md
.nvram_sync
)
205 EXPORT_SYMBOL(nvram_sync
);
207 #endif /* CONFIG_NVRAM */
209 int __init
ppc_init(void)
211 /* clear the progress line */
213 ppc_md
.progress(" ", 0xffff);
215 /* call platform init */
216 if (ppc_md
.init
!= NULL
) {
222 arch_initcall(ppc_init
);
224 static void __init
irqstack_early_init(void)
228 /* interrupt stacks must be in lowmem, we get that for free on ppc32
229 * as the memblock is limited to lowmem by default */
230 for_each_possible_cpu(i
) {
231 softirq_ctx
[i
] = (struct thread_info
*)
232 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
233 hardirq_ctx
[i
] = (struct thread_info
*)
234 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
238 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
239 static void __init
exc_lvl_early_init(void)
241 unsigned int i
, hw_cpu
;
243 /* interrupt stacks must be in lowmem, we get that for free on ppc32
244 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
245 for_each_possible_cpu(i
) {
247 hw_cpu
= get_hard_smp_processor_id(i
);
252 critirq_ctx
[hw_cpu
] = (struct thread_info
*)
253 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
255 dbgirq_ctx
[hw_cpu
] = (struct thread_info
*)
256 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
257 mcheckirq_ctx
[hw_cpu
] = (struct thread_info
*)
258 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
263 #define exc_lvl_early_init()
266 /* Warning, IO base is not yet inited */
267 void __init
setup_arch(char **cmdline_p
)
269 *cmdline_p
= boot_command_line
;
271 /* so udelay does something sensible, assume <= 1000 bogomips */
272 loops_per_jiffy
= 500000000 / HZ
;
274 unflatten_device_tree();
277 if (ppc_md
.init_early
)
280 find_legacy_serial_ports();
282 smp_setup_cpu_maps();
284 /* Register early console */
285 register_early_udbg_console();
290 * Set cache line size based on type of cpu as a default.
291 * Systems with OF can look in the properties on the cpu node(s)
292 * for a possibly more accurate value.
294 dcache_bsize
= cur_cpu_spec
->dcache_bsize
;
295 icache_bsize
= cur_cpu_spec
->icache_bsize
;
297 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE
))
298 ucache_bsize
= icache_bsize
= dcache_bsize
;
303 init_mm
.start_code
= (unsigned long)_stext
;
304 init_mm
.end_code
= (unsigned long) _etext
;
305 init_mm
.end_data
= (unsigned long) _edata
;
306 init_mm
.brk
= klimit
;
308 exc_lvl_early_init();
310 irqstack_early_init();
313 if ( ppc_md
.progress
) ppc_md
.progress("setup_arch: initmem", 0x3eab);
315 #ifdef CONFIG_DUMMY_CONSOLE
316 conswitchp
= &dummy_con
;
319 if (ppc_md
.setup_arch
)
321 if ( ppc_md
.progress
) ppc_md
.progress("arch: exit", 0x3eab);
325 /* Initialize the MMU context management stuff */
This page took 0.040754 seconds and 6 git commands to generate.