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[deliverable/linux.git] / arch / powerpc / kvm / book3s_emulate.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
23 #include <asm/reg.h>
24 #include <asm/switch_to.h>
25
26 #define OP_19_XOP_RFID 18
27 #define OP_19_XOP_RFI 50
28
29 #define OP_31_XOP_MFMSR 83
30 #define OP_31_XOP_MTMSR 146
31 #define OP_31_XOP_MTMSRD 178
32 #define OP_31_XOP_MTSR 210
33 #define OP_31_XOP_MTSRIN 242
34 #define OP_31_XOP_TLBIEL 274
35 #define OP_31_XOP_TLBIE 306
36 #define OP_31_XOP_SLBMTE 402
37 #define OP_31_XOP_SLBIE 434
38 #define OP_31_XOP_SLBIA 498
39 #define OP_31_XOP_MFSR 595
40 #define OP_31_XOP_MFSRIN 659
41 #define OP_31_XOP_DCBA 758
42 #define OP_31_XOP_SLBMFEV 851
43 #define OP_31_XOP_EIOIO 854
44 #define OP_31_XOP_SLBMFEE 915
45
46 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
47 #define OP_31_XOP_DCBZ 1010
48
49 #define OP_LFS 48
50 #define OP_LFD 50
51 #define OP_STFS 52
52 #define OP_STFD 54
53
54 #define SPRN_GQR0 912
55 #define SPRN_GQR1 913
56 #define SPRN_GQR2 914
57 #define SPRN_GQR3 915
58 #define SPRN_GQR4 916
59 #define SPRN_GQR5 917
60 #define SPRN_GQR6 918
61 #define SPRN_GQR7 919
62
63 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
64 * function pointers, so let's just disable the define. */
65 #undef mfsrin
66
67 enum priv_level {
68 PRIV_PROBLEM = 0,
69 PRIV_SUPER = 1,
70 PRIV_HYPER = 2,
71 };
72
73 static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
74 {
75 /* PAPR VMs only access supervisor SPRs */
76 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
77 return false;
78
79 /* Limit user space to its own small SPR set */
80 if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM)
81 return false;
82
83 return true;
84 }
85
86 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
87 unsigned int inst, int *advance)
88 {
89 int emulated = EMULATE_DONE;
90 int rt = get_rt(inst);
91 int rs = get_rs(inst);
92 int ra = get_ra(inst);
93 int rb = get_rb(inst);
94
95 switch (get_op(inst)) {
96 case 19:
97 switch (get_xop(inst)) {
98 case OP_19_XOP_RFID:
99 case OP_19_XOP_RFI:
100 kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
101 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
102 *advance = 0;
103 break;
104
105 default:
106 emulated = EMULATE_FAIL;
107 break;
108 }
109 break;
110 case 31:
111 switch (get_xop(inst)) {
112 case OP_31_XOP_MFMSR:
113 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);
114 break;
115 case OP_31_XOP_MTMSRD:
116 {
117 ulong rs_val = kvmppc_get_gpr(vcpu, rs);
118 if (inst & 0x10000) {
119 ulong new_msr = vcpu->arch.shared->msr;
120 new_msr &= ~(MSR_RI | MSR_EE);
121 new_msr |= rs_val & (MSR_RI | MSR_EE);
122 vcpu->arch.shared->msr = new_msr;
123 } else
124 kvmppc_set_msr(vcpu, rs_val);
125 break;
126 }
127 case OP_31_XOP_MTMSR:
128 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
129 break;
130 case OP_31_XOP_MFSR:
131 {
132 int srnum;
133
134 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
135 if (vcpu->arch.mmu.mfsrin) {
136 u32 sr;
137 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
138 kvmppc_set_gpr(vcpu, rt, sr);
139 }
140 break;
141 }
142 case OP_31_XOP_MFSRIN:
143 {
144 int srnum;
145
146 srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf;
147 if (vcpu->arch.mmu.mfsrin) {
148 u32 sr;
149 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
150 kvmppc_set_gpr(vcpu, rt, sr);
151 }
152 break;
153 }
154 case OP_31_XOP_MTSR:
155 vcpu->arch.mmu.mtsrin(vcpu,
156 (inst >> 16) & 0xf,
157 kvmppc_get_gpr(vcpu, rs));
158 break;
159 case OP_31_XOP_MTSRIN:
160 vcpu->arch.mmu.mtsrin(vcpu,
161 (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf,
162 kvmppc_get_gpr(vcpu, rs));
163 break;
164 case OP_31_XOP_TLBIE:
165 case OP_31_XOP_TLBIEL:
166 {
167 bool large = (inst & 0x00200000) ? true : false;
168 ulong addr = kvmppc_get_gpr(vcpu, rb);
169 vcpu->arch.mmu.tlbie(vcpu, addr, large);
170 break;
171 }
172 case OP_31_XOP_EIOIO:
173 break;
174 case OP_31_XOP_SLBMTE:
175 if (!vcpu->arch.mmu.slbmte)
176 return EMULATE_FAIL;
177
178 vcpu->arch.mmu.slbmte(vcpu,
179 kvmppc_get_gpr(vcpu, rs),
180 kvmppc_get_gpr(vcpu, rb));
181 break;
182 case OP_31_XOP_SLBIE:
183 if (!vcpu->arch.mmu.slbie)
184 return EMULATE_FAIL;
185
186 vcpu->arch.mmu.slbie(vcpu,
187 kvmppc_get_gpr(vcpu, rb));
188 break;
189 case OP_31_XOP_SLBIA:
190 if (!vcpu->arch.mmu.slbia)
191 return EMULATE_FAIL;
192
193 vcpu->arch.mmu.slbia(vcpu);
194 break;
195 case OP_31_XOP_SLBMFEE:
196 if (!vcpu->arch.mmu.slbmfee) {
197 emulated = EMULATE_FAIL;
198 } else {
199 ulong t, rb_val;
200
201 rb_val = kvmppc_get_gpr(vcpu, rb);
202 t = vcpu->arch.mmu.slbmfee(vcpu, rb_val);
203 kvmppc_set_gpr(vcpu, rt, t);
204 }
205 break;
206 case OP_31_XOP_SLBMFEV:
207 if (!vcpu->arch.mmu.slbmfev) {
208 emulated = EMULATE_FAIL;
209 } else {
210 ulong t, rb_val;
211
212 rb_val = kvmppc_get_gpr(vcpu, rb);
213 t = vcpu->arch.mmu.slbmfev(vcpu, rb_val);
214 kvmppc_set_gpr(vcpu, rt, t);
215 }
216 break;
217 case OP_31_XOP_DCBA:
218 /* Gets treated as NOP */
219 break;
220 case OP_31_XOP_DCBZ:
221 {
222 ulong rb_val = kvmppc_get_gpr(vcpu, rb);
223 ulong ra_val = 0;
224 ulong addr, vaddr;
225 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
226 u32 dsisr;
227 int r;
228
229 if (ra)
230 ra_val = kvmppc_get_gpr(vcpu, ra);
231
232 addr = (ra_val + rb_val) & ~31ULL;
233 if (!(vcpu->arch.shared->msr & MSR_SF))
234 addr &= 0xffffffff;
235 vaddr = addr;
236
237 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
238 if ((r == -ENOENT) || (r == -EPERM)) {
239 struct kvmppc_book3s_shadow_vcpu *svcpu;
240
241 svcpu = svcpu_get(vcpu);
242 *advance = 0;
243 vcpu->arch.shared->dar = vaddr;
244 svcpu->fault_dar = vaddr;
245
246 dsisr = DSISR_ISSTORE;
247 if (r == -ENOENT)
248 dsisr |= DSISR_NOHPTE;
249 else if (r == -EPERM)
250 dsisr |= DSISR_PROTFAULT;
251
252 vcpu->arch.shared->dsisr = dsisr;
253 svcpu->fault_dsisr = dsisr;
254 svcpu_put(svcpu);
255
256 kvmppc_book3s_queue_irqprio(vcpu,
257 BOOK3S_INTERRUPT_DATA_STORAGE);
258 }
259
260 break;
261 }
262 default:
263 emulated = EMULATE_FAIL;
264 }
265 break;
266 default:
267 emulated = EMULATE_FAIL;
268 }
269
270 if (emulated == EMULATE_FAIL)
271 emulated = kvmppc_emulate_paired_single(run, vcpu);
272
273 return emulated;
274 }
275
276 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
277 u32 val)
278 {
279 if (upper) {
280 /* Upper BAT */
281 u32 bl = (val >> 2) & 0x7ff;
282 bat->bepi_mask = (~bl << 17);
283 bat->bepi = val & 0xfffe0000;
284 bat->vs = (val & 2) ? 1 : 0;
285 bat->vp = (val & 1) ? 1 : 0;
286 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
287 } else {
288 /* Lower BAT */
289 bat->brpn = val & 0xfffe0000;
290 bat->wimg = (val >> 3) & 0xf;
291 bat->pp = val & 3;
292 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
293 }
294 }
295
296 static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
297 {
298 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
299 struct kvmppc_bat *bat;
300
301 switch (sprn) {
302 case SPRN_IBAT0U ... SPRN_IBAT3L:
303 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
304 break;
305 case SPRN_IBAT4U ... SPRN_IBAT7L:
306 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
307 break;
308 case SPRN_DBAT0U ... SPRN_DBAT3L:
309 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
310 break;
311 case SPRN_DBAT4U ... SPRN_DBAT7L:
312 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
313 break;
314 default:
315 BUG();
316 }
317
318 return bat;
319 }
320
321 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
322 {
323 int emulated = EMULATE_DONE;
324 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
325
326 switch (sprn) {
327 case SPRN_SDR1:
328 if (!spr_allowed(vcpu, PRIV_HYPER))
329 goto unprivileged;
330 to_book3s(vcpu)->sdr1 = spr_val;
331 break;
332 case SPRN_DSISR:
333 vcpu->arch.shared->dsisr = spr_val;
334 break;
335 case SPRN_DAR:
336 vcpu->arch.shared->dar = spr_val;
337 break;
338 case SPRN_HIOR:
339 to_book3s(vcpu)->hior = spr_val;
340 break;
341 case SPRN_IBAT0U ... SPRN_IBAT3L:
342 case SPRN_IBAT4U ... SPRN_IBAT7L:
343 case SPRN_DBAT0U ... SPRN_DBAT3L:
344 case SPRN_DBAT4U ... SPRN_DBAT7L:
345 {
346 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
347
348 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
349 /* BAT writes happen so rarely that we're ok to flush
350 * everything here */
351 kvmppc_mmu_pte_flush(vcpu, 0, 0);
352 kvmppc_mmu_flush_segments(vcpu);
353 break;
354 }
355 case SPRN_HID0:
356 to_book3s(vcpu)->hid[0] = spr_val;
357 break;
358 case SPRN_HID1:
359 to_book3s(vcpu)->hid[1] = spr_val;
360 break;
361 case SPRN_HID2:
362 to_book3s(vcpu)->hid[2] = spr_val;
363 break;
364 case SPRN_HID2_GEKKO:
365 to_book3s(vcpu)->hid[2] = spr_val;
366 /* HID2.PSE controls paired single on gekko */
367 switch (vcpu->arch.pvr) {
368 case 0x00080200: /* lonestar 2.0 */
369 case 0x00088202: /* lonestar 2.2 */
370 case 0x70000100: /* gekko 1.0 */
371 case 0x00080100: /* gekko 2.0 */
372 case 0x00083203: /* gekko 2.3a */
373 case 0x00083213: /* gekko 2.3b */
374 case 0x00083204: /* gekko 2.4 */
375 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
376 case 0x00087200: /* broadway */
377 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
378 /* Native paired singles */
379 } else if (spr_val & (1 << 29)) { /* HID2.PSE */
380 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
381 kvmppc_giveup_ext(vcpu, MSR_FP);
382 } else {
383 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
384 }
385 break;
386 }
387 break;
388 case SPRN_HID4:
389 case SPRN_HID4_GEKKO:
390 to_book3s(vcpu)->hid[4] = spr_val;
391 break;
392 case SPRN_HID5:
393 to_book3s(vcpu)->hid[5] = spr_val;
394 /* guest HID5 set can change is_dcbz32 */
395 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
396 (mfmsr() & MSR_HV))
397 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
398 break;
399 case SPRN_GQR0:
400 case SPRN_GQR1:
401 case SPRN_GQR2:
402 case SPRN_GQR3:
403 case SPRN_GQR4:
404 case SPRN_GQR5:
405 case SPRN_GQR6:
406 case SPRN_GQR7:
407 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
408 break;
409 case SPRN_ICTC:
410 case SPRN_THRM1:
411 case SPRN_THRM2:
412 case SPRN_THRM3:
413 case SPRN_CTRLF:
414 case SPRN_CTRLT:
415 case SPRN_L2CR:
416 case SPRN_MMCR0_GEKKO:
417 case SPRN_MMCR1_GEKKO:
418 case SPRN_PMC1_GEKKO:
419 case SPRN_PMC2_GEKKO:
420 case SPRN_PMC3_GEKKO:
421 case SPRN_PMC4_GEKKO:
422 case SPRN_WPAR_GEKKO:
423 break;
424 unprivileged:
425 default:
426 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
427 #ifndef DEBUG_SPR
428 emulated = EMULATE_FAIL;
429 #endif
430 break;
431 }
432
433 return emulated;
434 }
435
436 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
437 {
438 int emulated = EMULATE_DONE;
439
440 switch (sprn) {
441 case SPRN_IBAT0U ... SPRN_IBAT3L:
442 case SPRN_IBAT4U ... SPRN_IBAT7L:
443 case SPRN_DBAT0U ... SPRN_DBAT3L:
444 case SPRN_DBAT4U ... SPRN_DBAT7L:
445 {
446 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
447
448 if (sprn % 2)
449 kvmppc_set_gpr(vcpu, rt, bat->raw >> 32);
450 else
451 kvmppc_set_gpr(vcpu, rt, bat->raw);
452
453 break;
454 }
455 case SPRN_SDR1:
456 if (!spr_allowed(vcpu, PRIV_HYPER))
457 goto unprivileged;
458 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
459 break;
460 case SPRN_DSISR:
461 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dsisr);
462 break;
463 case SPRN_DAR:
464 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar);
465 break;
466 case SPRN_HIOR:
467 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
468 break;
469 case SPRN_HID0:
470 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
471 break;
472 case SPRN_HID1:
473 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
474 break;
475 case SPRN_HID2:
476 case SPRN_HID2_GEKKO:
477 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
478 break;
479 case SPRN_HID4:
480 case SPRN_HID4_GEKKO:
481 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
482 break;
483 case SPRN_HID5:
484 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
485 break;
486 case SPRN_CFAR:
487 case SPRN_PURR:
488 kvmppc_set_gpr(vcpu, rt, 0);
489 break;
490 case SPRN_GQR0:
491 case SPRN_GQR1:
492 case SPRN_GQR2:
493 case SPRN_GQR3:
494 case SPRN_GQR4:
495 case SPRN_GQR5:
496 case SPRN_GQR6:
497 case SPRN_GQR7:
498 kvmppc_set_gpr(vcpu, rt,
499 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
500 break;
501 case SPRN_THRM1:
502 case SPRN_THRM2:
503 case SPRN_THRM3:
504 case SPRN_CTRLF:
505 case SPRN_CTRLT:
506 case SPRN_L2CR:
507 case SPRN_MMCR0_GEKKO:
508 case SPRN_MMCR1_GEKKO:
509 case SPRN_PMC1_GEKKO:
510 case SPRN_PMC2_GEKKO:
511 case SPRN_PMC3_GEKKO:
512 case SPRN_PMC4_GEKKO:
513 case SPRN_WPAR_GEKKO:
514 kvmppc_set_gpr(vcpu, rt, 0);
515 break;
516 default:
517 unprivileged:
518 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
519 #ifndef DEBUG_SPR
520 emulated = EMULATE_FAIL;
521 #endif
522 break;
523 }
524
525 return emulated;
526 }
527
528 u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
529 {
530 u32 dsisr = 0;
531
532 /*
533 * This is what the spec says about DSISR bits (not mentioned = 0):
534 *
535 * 12:13 [DS] Set to bits 30:31
536 * 15:16 [X] Set to bits 29:30
537 * 17 [X] Set to bit 25
538 * [D/DS] Set to bit 5
539 * 18:21 [X] Set to bits 21:24
540 * [D/DS] Set to bits 1:4
541 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
542 * 27:31 Set to bits 11:15 (RA)
543 */
544
545 switch (get_op(inst)) {
546 /* D-form */
547 case OP_LFS:
548 case OP_LFD:
549 case OP_STFD:
550 case OP_STFS:
551 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
552 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
553 break;
554 /* X-form */
555 case 31:
556 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
557 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
558 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
559 break;
560 default:
561 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
562 break;
563 }
564
565 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
566
567 return dsisr;
568 }
569
570 ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
571 {
572 ulong dar = 0;
573 ulong ra = get_ra(inst);
574 ulong rb = get_rb(inst);
575
576 switch (get_op(inst)) {
577 case OP_LFS:
578 case OP_LFD:
579 case OP_STFD:
580 case OP_STFS:
581 if (ra)
582 dar = kvmppc_get_gpr(vcpu, ra);
583 dar += (s32)((s16)inst);
584 break;
585 case 31:
586 if (ra)
587 dar = kvmppc_get_gpr(vcpu, ra);
588 dar += kvmppc_get_gpr(vcpu, rb);
589 break;
590 default:
591 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
592 break;
593 }
594
595 return dar;
596 }
Linux kernel - Deliverables
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