2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
25 #define OP_19_XOP_RFID 18
26 #define OP_19_XOP_RFI 50
28 #define OP_31_XOP_MFMSR 83
29 #define OP_31_XOP_MTMSR 146
30 #define OP_31_XOP_MTMSRD 178
31 #define OP_31_XOP_MTSR 210
32 #define OP_31_XOP_MTSRIN 242
33 #define OP_31_XOP_TLBIEL 274
34 #define OP_31_XOP_TLBIE 306
35 #define OP_31_XOP_SLBMTE 402
36 #define OP_31_XOP_SLBIE 434
37 #define OP_31_XOP_SLBIA 498
38 #define OP_31_XOP_MFSR 595
39 #define OP_31_XOP_MFSRIN 659
40 #define OP_31_XOP_DCBA 758
41 #define OP_31_XOP_SLBMFEV 851
42 #define OP_31_XOP_EIOIO 854
43 #define OP_31_XOP_SLBMFEE 915
45 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
46 #define OP_31_XOP_DCBZ 1010
62 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
63 * function pointers, so let's just disable the define. */
66 int kvmppc_core_emulate_op(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
,
67 unsigned int inst
, int *advance
)
69 int emulated
= EMULATE_DONE
;
71 switch (get_op(inst
)) {
73 switch (get_xop(inst
)) {
76 kvmppc_set_pc(vcpu
, vcpu
->arch
.srr0
);
77 kvmppc_set_msr(vcpu
, vcpu
->arch
.srr1
);
82 emulated
= EMULATE_FAIL
;
87 switch (get_xop(inst
)) {
89 kvmppc_set_gpr(vcpu
, get_rt(inst
),
90 vcpu
->arch
.shared
->msr
);
92 case OP_31_XOP_MTMSRD
:
94 ulong rs
= kvmppc_get_gpr(vcpu
, get_rs(inst
));
96 vcpu
->arch
.shared
->msr
&= ~(MSR_RI
| MSR_EE
);
97 vcpu
->arch
.shared
->msr
|= rs
& (MSR_RI
| MSR_EE
);
99 kvmppc_set_msr(vcpu
, rs
);
102 case OP_31_XOP_MTMSR
:
103 kvmppc_set_msr(vcpu
, kvmppc_get_gpr(vcpu
, get_rs(inst
)));
109 srnum
= kvmppc_get_field(inst
, 12 + 32, 15 + 32);
110 if (vcpu
->arch
.mmu
.mfsrin
) {
112 sr
= vcpu
->arch
.mmu
.mfsrin(vcpu
, srnum
);
113 kvmppc_set_gpr(vcpu
, get_rt(inst
), sr
);
117 case OP_31_XOP_MFSRIN
:
121 srnum
= (kvmppc_get_gpr(vcpu
, get_rb(inst
)) >> 28) & 0xf;
122 if (vcpu
->arch
.mmu
.mfsrin
) {
124 sr
= vcpu
->arch
.mmu
.mfsrin(vcpu
, srnum
);
125 kvmppc_set_gpr(vcpu
, get_rt(inst
), sr
);
130 vcpu
->arch
.mmu
.mtsrin(vcpu
,
132 kvmppc_get_gpr(vcpu
, get_rs(inst
)));
134 case OP_31_XOP_MTSRIN
:
135 vcpu
->arch
.mmu
.mtsrin(vcpu
,
136 (kvmppc_get_gpr(vcpu
, get_rb(inst
)) >> 28) & 0xf,
137 kvmppc_get_gpr(vcpu
, get_rs(inst
)));
139 case OP_31_XOP_TLBIE
:
140 case OP_31_XOP_TLBIEL
:
142 bool large
= (inst
& 0x00200000) ? true : false;
143 ulong addr
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
144 vcpu
->arch
.mmu
.tlbie(vcpu
, addr
, large
);
147 case OP_31_XOP_EIOIO
:
149 case OP_31_XOP_SLBMTE
:
150 if (!vcpu
->arch
.mmu
.slbmte
)
153 vcpu
->arch
.mmu
.slbmte(vcpu
,
154 kvmppc_get_gpr(vcpu
, get_rs(inst
)),
155 kvmppc_get_gpr(vcpu
, get_rb(inst
)));
157 case OP_31_XOP_SLBIE
:
158 if (!vcpu
->arch
.mmu
.slbie
)
161 vcpu
->arch
.mmu
.slbie(vcpu
,
162 kvmppc_get_gpr(vcpu
, get_rb(inst
)));
164 case OP_31_XOP_SLBIA
:
165 if (!vcpu
->arch
.mmu
.slbia
)
168 vcpu
->arch
.mmu
.slbia(vcpu
);
170 case OP_31_XOP_SLBMFEE
:
171 if (!vcpu
->arch
.mmu
.slbmfee
) {
172 emulated
= EMULATE_FAIL
;
176 rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
177 t
= vcpu
->arch
.mmu
.slbmfee(vcpu
, rb
);
178 kvmppc_set_gpr(vcpu
, get_rt(inst
), t
);
181 case OP_31_XOP_SLBMFEV
:
182 if (!vcpu
->arch
.mmu
.slbmfev
) {
183 emulated
= EMULATE_FAIL
;
187 rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
188 t
= vcpu
->arch
.mmu
.slbmfev(vcpu
, rb
);
189 kvmppc_set_gpr(vcpu
, get_rt(inst
), t
);
193 /* Gets treated as NOP */
197 ulong rb
= kvmppc_get_gpr(vcpu
, get_rb(inst
));
200 u32 zeros
[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
205 ra
= kvmppc_get_gpr(vcpu
, get_ra(inst
));
207 addr
= (ra
+ rb
) & ~31ULL;
208 if (!(vcpu
->arch
.shared
->msr
& MSR_SF
))
212 r
= kvmppc_st(vcpu
, &addr
, 32, zeros
, true);
213 if ((r
== -ENOENT
) || (r
== -EPERM
)) {
215 vcpu
->arch
.shared
->dar
= vaddr
;
216 to_svcpu(vcpu
)->fault_dar
= vaddr
;
218 dsisr
= DSISR_ISSTORE
;
220 dsisr
|= DSISR_NOHPTE
;
221 else if (r
== -EPERM
)
222 dsisr
|= DSISR_PROTFAULT
;
224 vcpu
->arch
.shared
->dsisr
= dsisr
;
225 to_svcpu(vcpu
)->fault_dsisr
= dsisr
;
227 kvmppc_book3s_queue_irqprio(vcpu
,
228 BOOK3S_INTERRUPT_DATA_STORAGE
);
234 emulated
= EMULATE_FAIL
;
238 emulated
= EMULATE_FAIL
;
241 if (emulated
== EMULATE_FAIL
)
242 emulated
= kvmppc_emulate_paired_single(run
, vcpu
);
247 void kvmppc_set_bat(struct kvm_vcpu
*vcpu
, struct kvmppc_bat
*bat
, bool upper
,
252 u32 bl
= (val
>> 2) & 0x7ff;
253 bat
->bepi_mask
= (~bl
<< 17);
254 bat
->bepi
= val
& 0xfffe0000;
255 bat
->vs
= (val
& 2) ? 1 : 0;
256 bat
->vp
= (val
& 1) ? 1 : 0;
257 bat
->raw
= (bat
->raw
& 0xffffffff00000000ULL
) | val
;
260 bat
->brpn
= val
& 0xfffe0000;
261 bat
->wimg
= (val
>> 3) & 0xf;
263 bat
->raw
= (bat
->raw
& 0x00000000ffffffffULL
) | ((u64
)val
<< 32);
267 static u32
kvmppc_read_bat(struct kvm_vcpu
*vcpu
, int sprn
)
269 struct kvmppc_vcpu_book3s
*vcpu_book3s
= to_book3s(vcpu
);
270 struct kvmppc_bat
*bat
;
273 case SPRN_IBAT0U
... SPRN_IBAT3L
:
274 bat
= &vcpu_book3s
->ibat
[(sprn
- SPRN_IBAT0U
) / 2];
276 case SPRN_IBAT4U
... SPRN_IBAT7L
:
277 bat
= &vcpu_book3s
->ibat
[4 + ((sprn
- SPRN_IBAT4U
) / 2)];
279 case SPRN_DBAT0U
... SPRN_DBAT3L
:
280 bat
= &vcpu_book3s
->dbat
[(sprn
- SPRN_DBAT0U
) / 2];
282 case SPRN_DBAT4U
... SPRN_DBAT7L
:
283 bat
= &vcpu_book3s
->dbat
[4 + ((sprn
- SPRN_DBAT4U
) / 2)];
290 return bat
->raw
>> 32;
295 static void kvmppc_write_bat(struct kvm_vcpu
*vcpu
, int sprn
, u32 val
)
297 struct kvmppc_vcpu_book3s
*vcpu_book3s
= to_book3s(vcpu
);
298 struct kvmppc_bat
*bat
;
301 case SPRN_IBAT0U
... SPRN_IBAT3L
:
302 bat
= &vcpu_book3s
->ibat
[(sprn
- SPRN_IBAT0U
) / 2];
304 case SPRN_IBAT4U
... SPRN_IBAT7L
:
305 bat
= &vcpu_book3s
->ibat
[4 + ((sprn
- SPRN_IBAT4U
) / 2)];
307 case SPRN_DBAT0U
... SPRN_DBAT3L
:
308 bat
= &vcpu_book3s
->dbat
[(sprn
- SPRN_DBAT0U
) / 2];
310 case SPRN_DBAT4U
... SPRN_DBAT7L
:
311 bat
= &vcpu_book3s
->dbat
[4 + ((sprn
- SPRN_DBAT4U
) / 2)];
317 kvmppc_set_bat(vcpu
, bat
, !(sprn
% 2), val
);
320 int kvmppc_core_emulate_mtspr(struct kvm_vcpu
*vcpu
, int sprn
, int rs
)
322 int emulated
= EMULATE_DONE
;
323 ulong spr_val
= kvmppc_get_gpr(vcpu
, rs
);
327 to_book3s(vcpu
)->sdr1
= spr_val
;
330 vcpu
->arch
.shared
->dsisr
= spr_val
;
333 vcpu
->arch
.shared
->dar
= spr_val
;
336 to_book3s(vcpu
)->hior
= spr_val
;
338 case SPRN_IBAT0U
... SPRN_IBAT3L
:
339 case SPRN_IBAT4U
... SPRN_IBAT7L
:
340 case SPRN_DBAT0U
... SPRN_DBAT3L
:
341 case SPRN_DBAT4U
... SPRN_DBAT7L
:
342 kvmppc_write_bat(vcpu
, sprn
, (u32
)spr_val
);
343 /* BAT writes happen so rarely that we're ok to flush
345 kvmppc_mmu_pte_flush(vcpu
, 0, 0);
346 kvmppc_mmu_flush_segments(vcpu
);
349 to_book3s(vcpu
)->hid
[0] = spr_val
;
352 to_book3s(vcpu
)->hid
[1] = spr_val
;
355 to_book3s(vcpu
)->hid
[2] = spr_val
;
357 case SPRN_HID2_GEKKO
:
358 to_book3s(vcpu
)->hid
[2] = spr_val
;
359 /* HID2.PSE controls paired single on gekko */
360 switch (vcpu
->arch
.pvr
) {
361 case 0x00080200: /* lonestar 2.0 */
362 case 0x00088202: /* lonestar 2.2 */
363 case 0x70000100: /* gekko 1.0 */
364 case 0x00080100: /* gekko 2.0 */
365 case 0x00083203: /* gekko 2.3a */
366 case 0x00083213: /* gekko 2.3b */
367 case 0x00083204: /* gekko 2.4 */
368 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
369 case 0x00087200: /* broadway */
370 if (vcpu
->arch
.hflags
& BOOK3S_HFLAG_NATIVE_PS
) {
371 /* Native paired singles */
372 } else if (spr_val
& (1 << 29)) { /* HID2.PSE */
373 vcpu
->arch
.hflags
|= BOOK3S_HFLAG_PAIRED_SINGLE
;
374 kvmppc_giveup_ext(vcpu
, MSR_FP
);
376 vcpu
->arch
.hflags
&= ~BOOK3S_HFLAG_PAIRED_SINGLE
;
382 case SPRN_HID4_GEKKO
:
383 to_book3s(vcpu
)->hid
[4] = spr_val
;
386 to_book3s(vcpu
)->hid
[5] = spr_val
;
387 /* guest HID5 set can change is_dcbz32 */
388 if (vcpu
->arch
.mmu
.is_dcbz32(vcpu
) &&
390 vcpu
->arch
.hflags
|= BOOK3S_HFLAG_DCBZ32
;
400 to_book3s(vcpu
)->gqr
[sprn
- SPRN_GQR0
] = spr_val
;
409 case SPRN_MMCR0_GEKKO
:
410 case SPRN_MMCR1_GEKKO
:
411 case SPRN_PMC1_GEKKO
:
412 case SPRN_PMC2_GEKKO
:
413 case SPRN_PMC3_GEKKO
:
414 case SPRN_PMC4_GEKKO
:
415 case SPRN_WPAR_GEKKO
:
418 printk(KERN_INFO
"KVM: invalid SPR write: %d\n", sprn
);
420 emulated
= EMULATE_FAIL
;
428 int kvmppc_core_emulate_mfspr(struct kvm_vcpu
*vcpu
, int sprn
, int rt
)
430 int emulated
= EMULATE_DONE
;
433 case SPRN_IBAT0U
... SPRN_IBAT3L
:
434 case SPRN_IBAT4U
... SPRN_IBAT7L
:
435 case SPRN_DBAT0U
... SPRN_DBAT3L
:
436 case SPRN_DBAT4U
... SPRN_DBAT7L
:
437 kvmppc_set_gpr(vcpu
, rt
, kvmppc_read_bat(vcpu
, sprn
));
440 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->sdr1
);
443 kvmppc_set_gpr(vcpu
, rt
, vcpu
->arch
.shared
->dsisr
);
446 kvmppc_set_gpr(vcpu
, rt
, vcpu
->arch
.shared
->dar
);
449 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hior
);
452 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[0]);
455 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[1]);
458 case SPRN_HID2_GEKKO
:
459 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[2]);
462 case SPRN_HID4_GEKKO
:
463 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[4]);
466 kvmppc_set_gpr(vcpu
, rt
, to_book3s(vcpu
)->hid
[5]);
476 kvmppc_set_gpr(vcpu
, rt
,
477 to_book3s(vcpu
)->gqr
[sprn
- SPRN_GQR0
]);
485 case SPRN_MMCR0_GEKKO
:
486 case SPRN_MMCR1_GEKKO
:
487 case SPRN_PMC1_GEKKO
:
488 case SPRN_PMC2_GEKKO
:
489 case SPRN_PMC3_GEKKO
:
490 case SPRN_PMC4_GEKKO
:
491 case SPRN_WPAR_GEKKO
:
492 kvmppc_set_gpr(vcpu
, rt
, 0);
495 printk(KERN_INFO
"KVM: invalid SPR read: %d\n", sprn
);
497 emulated
= EMULATE_FAIL
;
505 u32
kvmppc_alignment_dsisr(struct kvm_vcpu
*vcpu
, unsigned int inst
)
510 * This is what the spec says about DSISR bits (not mentioned = 0):
512 * 12:13 [DS] Set to bits 30:31
513 * 15:16 [X] Set to bits 29:30
514 * 17 [X] Set to bit 25
515 * [D/DS] Set to bit 5
516 * 18:21 [X] Set to bits 21:24
517 * [D/DS] Set to bits 1:4
518 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
519 * 27:31 Set to bits 11:15 (RA)
522 switch (get_op(inst
)) {
528 dsisr
|= (inst
>> 12) & 0x4000; /* bit 17 */
529 dsisr
|= (inst
>> 17) & 0x3c00; /* bits 18:21 */
533 dsisr
|= (inst
<< 14) & 0x18000; /* bits 15:16 */
534 dsisr
|= (inst
<< 8) & 0x04000; /* bit 17 */
535 dsisr
|= (inst
<< 3) & 0x03c00; /* bits 18:21 */
538 printk(KERN_INFO
"KVM: Unaligned instruction 0x%x\n", inst
);
542 dsisr
|= (inst
>> 16) & 0x03ff; /* bits 22:31 */
547 ulong
kvmppc_alignment_dar(struct kvm_vcpu
*vcpu
, unsigned int inst
)
552 switch (get_op(inst
)) {
559 dar
= kvmppc_get_gpr(vcpu
, ra
);
560 dar
+= (s32
)((s16
)inst
);
565 dar
= kvmppc_get_gpr(vcpu
, ra
);
566 dar
+= kvmppc_get_gpr(vcpu
, get_rb(inst
));
569 printk(KERN_INFO
"KVM: Unaligned instruction 0x%x\n", inst
);