arch/powerpc/mm/slb_low.S

   1 /*
   2  * Low-level SLB routines
   3  *
   4  * Copyright (C) 2004 David Gibson <dwg@au.ibm.com>, IBM
   5  *
   6  * Based on earlier C version:
   7  * Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
   8  *    Copyright (c) 2001 Dave Engebretsen
   9  * Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
  10  *
  11  *  This program is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU General Public License
  13  *  as published by the Free Software Foundation; either version
  14  *  2 of the License, or (at your option) any later version.
  15  */
  16
  17 #include <linux/config.h>
  18 #include <asm/processor.h>
  19 #include <asm/ppc_asm.h>
  20 #include <asm/asm-offsets.h>
  21 #include <asm/cputable.h>
  22 #include <asm/page.h>
  23 #include <asm/mmu.h>
  24 #include <asm/pgtable.h>
  25
  26 /* void slb_allocate_realmode(unsigned long ea);
  27  *
  28  * Create an SLB entry for the given EA (user or kernel).
  29  *      r3 = faulting address, r13 = PACA
  30  *      r9, r10, r11 are clobbered by this function
  31  * No other registers are examined or changed.
  32  */
  33 _GLOBAL(slb_allocate_realmode)
  34         /* r3 = faulting address */
  35
  36         srdi    r9,r3,60                /* get region */
  37         srdi    r10,r3,28               /* get esid */
  38         cmpldi  cr7,r9,0xc              /* cmp PAGE_OFFSET for later use */
  39
  40         /* r3 = address, r10 = esid, cr7 = <> PAGE_OFFSET */
  41         blt     cr7,0f                  /* user or kernel? */
  42
  43         /* kernel address: proto-VSID = ESID */
  44         /* WARNING - MAGIC: we don't use the VSID 0xfffffffff, but
  45          * this code will generate the protoVSID 0xfffffffff for the
  46          * top segment.  That's ok, the scramble below will translate
  47          * it to VSID 0, which is reserved as a bad VSID - one which
  48          * will never have any pages in it.  */
  49
  50         /* Check if hitting the linear mapping of the vmalloc/ioremap
  51          * kernel space
  52         */
  53         bne     cr7,1f
  54
  55         /* Linear mapping encoding bits, the "li" instruction below will
  56          * be patched by the kernel at boot
  57          */
  58 _GLOBAL(slb_miss_kernel_load_linear)
  59         li      r11,0
  60         b       slb_finish_load
  61
  62 1:      /* vmalloc/ioremap mapping encoding bits, the "li" instructions below
  63          * will be patched by the kernel at boot
  64          */
  65 BEGIN_FTR_SECTION
  66         /* check whether this is in vmalloc or ioremap space */
  67         clrldi  r11,r10,48
  68         cmpldi  r11,(VMALLOC_SIZE >> 28) - 1
  69         bgt     5f
  70         lhz     r11,PACAVMALLOCSLLP(r13)
  71         b       slb_finish_load
  72 5:
  73 END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
  74 _GLOBAL(slb_miss_kernel_load_io)
  75         li      r11,0
  76         b       slb_finish_load
  77
  78
  79 0:      /* user address: proto-VSID = context << 15 | ESID. First check
  80          * if the address is within the boundaries of the user region
  81          */
  82         srdi.   r9,r10,USER_ESID_BITS
  83         bne-    8f                      /* invalid ea bits set */
  84
  85         /* Figure out if the segment contains huge pages */
  86 #ifdef CONFIG_HUGETLB_PAGE
  87 BEGIN_FTR_SECTION
  88         b       1f
  89 END_FTR_SECTION_IFCLR(CPU_FTR_16M_PAGE)
  90         cmpldi  r10,16
  91
  92         lhz     r9,PACALOWHTLBAREAS(r13)
  93         mr      r11,r10
  94         blt     5f
  95
  96         lhz     r9,PACAHIGHHTLBAREAS(r13)
  97         srdi    r11,r10,(HTLB_AREA_SHIFT-SID_SHIFT)
  98
  99 5:      srd     r9,r9,r11
 100         andi.   r9,r9,1
 101         beq     1f
 102 _GLOBAL(slb_miss_user_load_huge)
 103         li      r11,0
 104         b       2f
 105 1:
 106 #endif /* CONFIG_HUGETLB_PAGE */
 107
 108         lhz     r11,PACACONTEXTSLLP(r13)
 109 2:
 110         ld      r9,PACACONTEXTID(r13)
 111         rldimi  r10,r9,USER_ESID_BITS,0
 112         b       slb_finish_load
 113
 114 8:      /* invalid EA */
 115         li      r10,0                   /* BAD_VSID */
 116         li      r11,SLB_VSID_USER       /* flags don't much matter */
 117         b       slb_finish_load
 118
 119 #ifdef __DISABLED__
 120
 121 /* void slb_allocate_user(unsigned long ea);
 122  *
 123  * Create an SLB entry for the given EA (user or kernel).
 124  *      r3 = faulting address, r13 = PACA
 125  *      r9, r10, r11 are clobbered by this function
 126  * No other registers are examined or changed.
 127  *
 128  * It is called with translation enabled in order to be able to walk the
 129  * page tables. This is not currently used.
 130  */
 131 _GLOBAL(slb_allocate_user)
 132         /* r3 = faulting address */
 133         srdi    r10,r3,28               /* get esid */
 134
 135         crset   4*cr7+lt                /* set "user" flag for later */
 136
 137         /* check if we fit in the range covered by the pagetables*/
 138         srdi.   r9,r3,PGTABLE_EADDR_SIZE
 139         crnot   4*cr0+eq,4*cr0+eq
 140         beqlr
 141
 142         /* now we need to get to the page tables in order to get the page
 143          * size encoding from the PMD. In the future, we'll be able to deal
 144          * with 1T segments too by getting the encoding from the PGD instead
 145          */
 146         ld      r9,PACAPGDIR(r13)
 147         cmpldi  cr0,r9,0
 148         beqlr
 149         rlwinm  r11,r10,8,25,28
 150         ldx     r9,r9,r11               /* get pgd_t */
 151         cmpldi  cr0,r9,0
 152         beqlr
 153         rlwinm  r11,r10,3,17,28
 154         ldx     r9,r9,r11               /* get pmd_t */
 155         cmpldi  cr0,r9,0
 156         beqlr
 157
 158         /* build vsid flags */
 159         andi.   r11,r9,SLB_VSID_LLP
 160         ori     r11,r11,SLB_VSID_USER
 161
 162         /* get context to calculate proto-VSID */
 163         ld      r9,PACACONTEXTID(r13)
 164         rldimi  r10,r9,USER_ESID_BITS,0
 165
 166         /* fall through slb_finish_load */
 167
 168 #endif /* __DISABLED__ */
 169
 170
 171 /*
 172  * Finish loading of an SLB entry and return
 173  *
 174  * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
 175  */
 176 slb_finish_load:
 177         ASM_VSID_SCRAMBLE(r10,r9)
 178         rldimi  r11,r10,SLB_VSID_SHIFT,16       /* combine VSID and flags */
 179
 180         /* r3 = EA, r11 = VSID data */
 181         /*
 182          * Find a slot, round robin. Previously we tried to find a
 183          * free slot first but that took too long. Unfortunately we
 184          * dont have any LRU information to help us choose a slot.
 185          */
 186 #ifdef CONFIG_PPC_ISERIES
 187         /*
 188          * On iSeries, the "bolted" stack segment can be cast out on
 189          * shared processor switch so we need to check for a miss on
 190          * it and restore it to the right slot.
 191          */
 192         ld      r9,PACAKSAVE(r13)
 193         clrrdi  r9,r9,28
 194         clrrdi  r3,r3,28
 195         li      r10,SLB_NUM_BOLTED-1    /* Stack goes in last bolted slot */
 196         cmpld   r9,r3
 197         beq     3f
 198 #endif /* CONFIG_PPC_ISERIES */
 199
 200         ld      r10,PACASTABRR(r13)
 201         addi    r10,r10,1
 202         /* use a cpu feature mask if we ever change our slb size */
 203         cmpldi  r10,SLB_NUM_ENTRIES
 204
 205         blt+    4f
 206         li      r10,SLB_NUM_BOLTED
 207
 208 4:
 209         std     r10,PACASTABRR(r13)
 210
 211 3:
 212         rldimi  r3,r10,0,36             /* r3= EA[0:35] | entry */
 213         oris    r10,r3,SLB_ESID_V@h     /* r3 |= SLB_ESID_V */
 214
 215         /* r3 = ESID data, r11 = VSID data */
 216
 217         /*
 218          * No need for an isync before or after this slbmte. The exception
 219          * we enter with and the rfid we exit with are context synchronizing.
 220          */
 221         slbmte  r11,r10
 222
 223         /* we're done for kernel addresses */
 224         crclr   4*cr0+eq                /* set result to "success" */
 225         bgelr   cr7
 226
 227         /* Update the slb cache */
 228         lhz     r3,PACASLBCACHEPTR(r13) /* offset = paca->slb_cache_ptr */
 229         cmpldi  r3,SLB_CACHE_ENTRIES
 230         bge     1f
 231
 232         /* still room in the slb cache */
 233         sldi    r11,r3,1                /* r11 = offset * sizeof(u16) */
 234         rldicl  r10,r10,36,28           /* get low 16 bits of the ESID */
 235         add     r11,r11,r13             /* r11 = (u16 *)paca + offset */
 236         sth     r10,PACASLBCACHE(r11)   /* paca->slb_cache[offset] = esid */
 237         addi    r3,r3,1                 /* offset++ */
 238         b       2f
 239 1:                                      /* offset >= SLB_CACHE_ENTRIES */
 240         li      r3,SLB_CACHE_ENTRIES+1
 241 2:
 242         sth     r3,PACASLBCACHEPTR(r13) /* paca->slb_cache_ptr = offset */
 243         crclr   4*cr0+eq                /* set result to "success" */
 244         blr
 245