projects / deliverable / linux.git / blob
? search:


ceafaf52a66878b6b2e994232900e3eb708c2395
[deliverable/linux.git] / arch / powerpc / platforms / powermac / low_i2c.c
1 /*
2 * arch/powerpc/platforms/powermac/low_i2c.c
3 *
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipstes in earlier machines if we ever need
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
28 */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/module.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/completion.h>
44 #include <linux/timer.h>
45 #include <asm/keylargo.h>
46 #include <asm/uninorth.h>
47 #include <asm/io.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/smu.h>
51 #include <asm/pmac_pfunc.h>
52 #include <asm/pmac_low_i2c.h>
53
54 #ifdef DEBUG
55 #define DBG(x...) do {\
56 printk(KERN_DEBUG "low_i2c:" x); \
57 } while(0)
58 #else
59 #define DBG(x...)
60 #endif
61
62 #ifdef DEBUG_LOW
63 #define DBG_LOW(x...) do {\
64 printk(KERN_DEBUG "low_i2c:" x); \
65 } while(0)
66 #else
67 #define DBG_LOW(x...)
68 #endif
69
70
71 static int pmac_i2c_force_poll = 1;
72
73 /*
74 * A bus structure. Each bus in the system has such a structure associated.
75 */
76 struct pmac_i2c_bus
77 {
78 struct list_head link;
79 struct device_node *controller;
80 struct device_node *busnode;
81 int type;
82 int flags;
83 struct i2c_adapter *adapter;
84 void *hostdata;
85 int channel; /* some hosts have multiple */
86 int mode; /* current mode */
87 struct semaphore sem;
88 int opened;
89 int polled; /* open mode */
90 struct platform_device *platform_dev;
91
92 /* ops */
93 int (*open)(struct pmac_i2c_bus *bus);
94 void (*close)(struct pmac_i2c_bus *bus);
95 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
96 u32 subaddr, u8 *data, int len);
97 };
98
99 static LIST_HEAD(pmac_i2c_busses);
100
101 /*
102 * Keywest implementation
103 */
104
105 struct pmac_i2c_host_kw
106 {
107 struct semaphore mutex; /* Access mutex for use by
108 * i2c-keywest */
109 void __iomem *base; /* register base address */
110 int bsteps; /* register stepping */
111 int speed; /* speed */
112 int irq;
113 u8 *data;
114 unsigned len;
115 int state;
116 int rw;
117 int polled;
118 int result;
119 struct completion complete;
120 spinlock_t lock;
121 struct timer_list timeout_timer;
122 };
123
124 /* Register indices */
125 typedef enum {
126 reg_mode = 0,
127 reg_control,
128 reg_status,
129 reg_isr,
130 reg_ier,
131 reg_addr,
132 reg_subaddr,
133 reg_data
134 } reg_t;
135
136 /* The Tumbler audio equalizer can be really slow sometimes */
137 #define KW_POLL_TIMEOUT (2*HZ)
138
139 /* Mode register */
140 #define KW_I2C_MODE_100KHZ 0x00
141 #define KW_I2C_MODE_50KHZ 0x01
142 #define KW_I2C_MODE_25KHZ 0x02
143 #define KW_I2C_MODE_DUMB 0x00
144 #define KW_I2C_MODE_STANDARD 0x04
145 #define KW_I2C_MODE_STANDARDSUB 0x08
146 #define KW_I2C_MODE_COMBINED 0x0C
147 #define KW_I2C_MODE_MODE_MASK 0x0C
148 #define KW_I2C_MODE_CHAN_MASK 0xF0
149
150 /* Control register */
151 #define KW_I2C_CTL_AAK 0x01
152 #define KW_I2C_CTL_XADDR 0x02
153 #define KW_I2C_CTL_STOP 0x04
154 #define KW_I2C_CTL_START 0x08
155
156 /* Status register */
157 #define KW_I2C_STAT_BUSY 0x01
158 #define KW_I2C_STAT_LAST_AAK 0x02
159 #define KW_I2C_STAT_LAST_RW 0x04
160 #define KW_I2C_STAT_SDA 0x08
161 #define KW_I2C_STAT_SCL 0x10
162
163 /* IER & ISR registers */
164 #define KW_I2C_IRQ_DATA 0x01
165 #define KW_I2C_IRQ_ADDR 0x02
166 #define KW_I2C_IRQ_STOP 0x04
167 #define KW_I2C_IRQ_START 0x08
168 #define KW_I2C_IRQ_MASK 0x0F
169
170 /* State machine states */
171 enum {
172 state_idle,
173 state_addr,
174 state_read,
175 state_write,
176 state_stop,
177 state_dead
178 };
179
180 #define WRONG_STATE(name) do {\
181 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
182 "(isr: %02x)\n", \
183 name, __kw_state_names[host->state], isr); \
184 } while(0)
185
186 static const char *__kw_state_names[] = {
187 "state_idle",
188 "state_addr",
189 "state_read",
190 "state_write",
191 "state_stop",
192 "state_dead"
193 };
194
195 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
196 {
197 return readb(host->base + (((unsigned int)reg) << host->bsteps));
198 }
199
200 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
201 reg_t reg, u8 val)
202 {
203 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
204 (void)__kw_read_reg(host, reg_subaddr);
205 }
206
207 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
208 #define kw_read_reg(reg) __kw_read_reg(host, reg)
209
210 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
211 {
212 int i, j;
213 u8 isr;
214
215 for (i = 0; i < 1000; i++) {
216 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
217 if (isr != 0)
218 return isr;
219
220 /* This code is used with the timebase frozen, we cannot rely
221 * on udelay nor schedule when in polled mode !
222 * For now, just use a bogus loop....
223 */
224 if (host->polled) {
225 for (j = 1; j < 100000; j++)
226 mb();
227 } else
228 msleep(1);
229 }
230 return isr;
231 }
232
233 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
234 {
235 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
236 host->state = state_stop;
237 host->result = result;
238 }
239
240
241 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
242 {
243 u8 ack;
244
245 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
246 __kw_state_names[host->state], isr);
247
248 if (host->state == state_idle) {
249 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
250 " interrupt, ignoring\n");
251 kw_write_reg(reg_isr, isr);
252 return;
253 }
254
255 if (isr == 0) {
256 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
257 " on keywest !\n");
258 if (host->state != state_stop) {
259 kw_i2c_do_stop(host, -EIO);
260 return;
261 }
262 ack = kw_read_reg(reg_status);
263 if (ack & KW_I2C_STAT_BUSY)
264 kw_write_reg(reg_status, 0);
265 host->state = state_idle;
266 kw_write_reg(reg_ier, 0x00);
267 if (!host->polled)
268 complete(&host->complete);
269 return;
270 }
271
272 if (isr & KW_I2C_IRQ_ADDR) {
273 ack = kw_read_reg(reg_status);
274 if (host->state != state_addr) {
275 WRONG_STATE("KW_I2C_IRQ_ADDR");
276 kw_i2c_do_stop(host, -EIO);
277 }
278 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
279 host->result = -ENXIO;
280 host->state = state_stop;
281 DBG_LOW("KW: NAK on address\n");
282 } else {
283 if (host->len == 0)
284 kw_i2c_do_stop(host, 0);
285 else if (host->rw) {
286 host->state = state_read;
287 if (host->len > 1)
288 kw_write_reg(reg_control,
289 KW_I2C_CTL_AAK);
290 } else {
291 host->state = state_write;
292 kw_write_reg(reg_data, *(host->data++));
293 host->len--;
294 }
295 }
296 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
297 }
298
299 if (isr & KW_I2C_IRQ_DATA) {
300 if (host->state == state_read) {
301 *(host->data++) = kw_read_reg(reg_data);
302 host->len--;
303 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
304 if (host->len == 0)
305 host->state = state_stop;
306 else if (host->len == 1)
307 kw_write_reg(reg_control, 0);
308 } else if (host->state == state_write) {
309 ack = kw_read_reg(reg_status);
310 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
311 DBG_LOW("KW: nack on data write\n");
312 host->result = -EFBIG;
313 host->state = state_stop;
314 } else if (host->len) {
315 kw_write_reg(reg_data, *(host->data++));
316 host->len--;
317 } else
318 kw_i2c_do_stop(host, 0);
319 } else {
320 WRONG_STATE("KW_I2C_IRQ_DATA");
321 if (host->state != state_stop)
322 kw_i2c_do_stop(host, -EIO);
323 }
324 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
325 }
326
327 if (isr & KW_I2C_IRQ_STOP) {
328 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
329 if (host->state != state_stop) {
330 WRONG_STATE("KW_I2C_IRQ_STOP");
331 host->result = -EIO;
332 }
333 host->state = state_idle;
334 if (!host->polled)
335 complete(&host->complete);
336 }
337
338 /* Below should only happen in manual mode which we don't use ... */
339 if (isr & KW_I2C_IRQ_START)
340 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
341
342 }
343
344 /* Interrupt handler */
345 static irqreturn_t kw_i2c_irq(int irq, void *dev_id, struct pt_regs *regs)
346 {
347 struct pmac_i2c_host_kw *host = dev_id;
348 unsigned long flags;
349
350 spin_lock_irqsave(&host->lock, flags);
351 del_timer(&host->timeout_timer);
352 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
353 if (host->state != state_idle) {
354 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
355 add_timer(&host->timeout_timer);
356 }
357 spin_unlock_irqrestore(&host->lock, flags);
358 return IRQ_HANDLED;
359 }
360
361 static void kw_i2c_timeout(unsigned long data)
362 {
363 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
364 unsigned long flags;
365
366 spin_lock_irqsave(&host->lock, flags);
367 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
368 if (host->state != state_idle) {
369 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
370 add_timer(&host->timeout_timer);
371 }
372 spin_unlock_irqrestore(&host->lock, flags);
373 }
374
375 static int kw_i2c_open(struct pmac_i2c_bus *bus)
376 {
377 struct pmac_i2c_host_kw *host = bus->hostdata;
378 down(&host->mutex);
379 return 0;
380 }
381
382 static void kw_i2c_close(struct pmac_i2c_bus *bus)
383 {
384 struct pmac_i2c_host_kw *host = bus->hostdata;
385 up(&host->mutex);
386 }
387
388 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
389 u32 subaddr, u8 *data, int len)
390 {
391 struct pmac_i2c_host_kw *host = bus->hostdata;
392 u8 mode_reg = host->speed;
393 int use_irq = host->irq != NO_IRQ && !bus->polled;
394
395 /* Setup mode & subaddress if any */
396 switch(bus->mode) {
397 case pmac_i2c_mode_dumb:
398 return -EINVAL;
399 case pmac_i2c_mode_std:
400 mode_reg |= KW_I2C_MODE_STANDARD;
401 if (subsize != 0)
402 return -EINVAL;
403 break;
404 case pmac_i2c_mode_stdsub:
405 mode_reg |= KW_I2C_MODE_STANDARDSUB;
406 if (subsize != 1)
407 return -EINVAL;
408 break;
409 case pmac_i2c_mode_combined:
410 mode_reg |= KW_I2C_MODE_COMBINED;
411 if (subsize != 1)
412 return -EINVAL;
413 break;
414 }
415
416 /* Setup channel & clear pending irqs */
417 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
418 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
419 kw_write_reg(reg_status, 0);
420
421 /* Set up address and r/w bit, strip possible stale bus number from
422 * address top bits
423 */
424 kw_write_reg(reg_addr, addrdir & 0xff);
425
426 /* Set up the sub address */
427 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
428 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
429 kw_write_reg(reg_subaddr, subaddr);
430
431 /* Prepare for async operations */
432 host->data = data;
433 host->len = len;
434 host->state = state_addr;
435 host->result = 0;
436 host->rw = (addrdir & 1);
437 host->polled = bus->polled;
438
439 /* Enable interrupt if not using polled mode and interrupt is
440 * available
441 */
442 if (use_irq) {
443 /* Clear completion */
444 INIT_COMPLETION(host->complete);
445 /* Ack stale interrupts */
446 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
447 /* Arm timeout */
448 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
449 add_timer(&host->timeout_timer);
450 /* Enable emission */
451 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
452 }
453
454 /* Start sending address */
455 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
456
457 /* Wait for completion */
458 if (use_irq)
459 wait_for_completion(&host->complete);
460 else {
461 while(host->state != state_idle) {
462 unsigned long flags;
463
464 u8 isr = kw_i2c_wait_interrupt(host);
465 spin_lock_irqsave(&host->lock, flags);
466 kw_i2c_handle_interrupt(host, isr);
467 spin_unlock_irqrestore(&host->lock, flags);
468 }
469 }
470
471 /* Disable emission */
472 kw_write_reg(reg_ier, 0);
473
474 return host->result;
475 }
476
477 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
478 {
479 struct pmac_i2c_host_kw *host;
480 u32 *psteps, *prate, *addrp, steps;
481
482 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
483 if (host == NULL) {
484 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
485 np->full_name);
486 return NULL;
487 }
488
489 /* Apple is kind enough to provide a valid AAPL,address property
490 * on all i2c keywest nodes so far ... we would have to fallback
491 * to macio parsing if that wasn't the case
492 */
493 addrp = (u32 *)get_property(np, "AAPL,address", NULL);
494 if (addrp == NULL) {
495 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
496 np->full_name);
497 kfree(host);
498 return NULL;
499 }
500 init_MUTEX(&host->mutex);
501 init_completion(&host->complete);
502 spin_lock_init(&host->lock);
503 init_timer(&host->timeout_timer);
504 host->timeout_timer.function = kw_i2c_timeout;
505 host->timeout_timer.data = (unsigned long)host;
506
507 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
508 steps = psteps ? (*psteps) : 0x10;
509 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
510 steps >>= 1;
511 /* Select interface rate */
512 host->speed = KW_I2C_MODE_25KHZ;
513 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
514 if (prate) switch(*prate) {
515 case 100:
516 host->speed = KW_I2C_MODE_100KHZ;
517 break;
518 case 50:
519 host->speed = KW_I2C_MODE_50KHZ;
520 break;
521 case 25:
522 host->speed = KW_I2C_MODE_25KHZ;
523 break;
524 }
525 if (np->n_intrs > 0)
526 host->irq = np->intrs[0].line;
527 else
528 host->irq = NO_IRQ;
529
530 host->base = ioremap((*addrp), 0x1000);
531 if (host->base == NULL) {
532 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
533 np->full_name);
534 kfree(host);
535 return NULL;
536 }
537
538 /* Make sure IRQ is disabled */
539 kw_write_reg(reg_ier, 0);
540
541 /* Request chip interrupt */
542 if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host))
543 host->irq = NO_IRQ;
544
545 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
546 *addrp, host->irq, np->full_name);
547
548 return host;
549 }
550
551
552 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
553 struct device_node *controller,
554 struct device_node *busnode,
555 int channel)
556 {
557 struct pmac_i2c_bus *bus;
558
559 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
560 if (bus == NULL)
561 return;
562
563 bus->controller = of_node_get(controller);
564 bus->busnode = of_node_get(busnode);
565 bus->type = pmac_i2c_bus_keywest;
566 bus->hostdata = host;
567 bus->channel = channel;
568 bus->mode = pmac_i2c_mode_std;
569 bus->open = kw_i2c_open;
570 bus->close = kw_i2c_close;
571 bus->xfer = kw_i2c_xfer;
572 init_MUTEX(&bus->sem);
573 if (controller == busnode)
574 bus->flags = pmac_i2c_multibus;
575 list_add(&bus->link, &pmac_i2c_busses);
576
577 printk(KERN_INFO " channel %d bus %s\n", channel,
578 (controller == busnode) ? "<multibus>" : busnode->full_name);
579 }
580
581 static void __init kw_i2c_probe(void)
582 {
583 struct device_node *np, *child, *parent;
584
585 /* Probe keywest-i2c busses */
586 for (np = NULL;
587 (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
588 struct pmac_i2c_host_kw *host;
589 int multibus, chans, i;
590
591 /* Found one, init a host structure */
592 host = kw_i2c_host_init(np);
593 if (host == NULL)
594 continue;
595
596 /* Now check if we have a multibus setup (old style) or if we
597 * have proper bus nodes. Note that the "new" way (proper bus
598 * nodes) might cause us to not create some busses that are
599 * kept hidden in the device-tree. In the future, we might
600 * want to work around that by creating busses without a node
601 * but not for now
602 */
603 child = of_get_next_child(np, NULL);
604 multibus = !child || strcmp(child->name, "i2c-bus");
605 of_node_put(child);
606
607 /* For a multibus setup, we get the bus count based on the
608 * parent type
609 */
610 if (multibus) {
611 parent = of_get_parent(np);
612 if (parent == NULL)
613 continue;
614 chans = parent->name[0] == 'u' ? 2 : 1;
615 for (i = 0; i < chans; i++)
616 kw_i2c_add(host, np, np, i);
617 } else {
618 for (child = NULL;
619 (child = of_get_next_child(np, child)) != NULL;) {
620 u32 *reg =
621 (u32 *)get_property(child, "reg", NULL);
622 if (reg == NULL)
623 continue;
624 kw_i2c_add(host, np, child, *reg);
625 }
626 }
627 }
628 }
629
630
631 /*
632 *
633 * PMU implementation
634 *
635 */
636
637 #ifdef CONFIG_ADB_PMU
638
639 /*
640 * i2c command block to the PMU
641 */
642 struct pmu_i2c_hdr {
643 u8 bus;
644 u8 mode;
645 u8 bus2;
646 u8 address;
647 u8 sub_addr;
648 u8 comb_addr;
649 u8 count;
650 u8 data[];
651 };
652
653 static void pmu_i2c_complete(struct adb_request *req)
654 {
655 complete(req->arg);
656 }
657
658 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
659 u32 subaddr, u8 *data, int len)
660 {
661 struct adb_request *req = bus->hostdata;
662 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
663 struct completion comp;
664 int read = addrdir & 1;
665 int retry;
666 int rc = 0;
667
668 /* For now, limit ourselves to 16 bytes transfers */
669 if (len > 16)
670 return -EINVAL;
671
672 init_completion(&comp);
673
674 for (retry = 0; retry < 16; retry++) {
675 memset(req, 0, sizeof(struct adb_request));
676 hdr->bus = bus->channel;
677 hdr->count = len;
678
679 switch(bus->mode) {
680 case pmac_i2c_mode_std:
681 if (subsize != 0)
682 return -EINVAL;
683 hdr->address = addrdir;
684 hdr->mode = PMU_I2C_MODE_SIMPLE;
685 break;
686 case pmac_i2c_mode_stdsub:
687 case pmac_i2c_mode_combined:
688 if (subsize != 1)
689 return -EINVAL;
690 hdr->address = addrdir & 0xfe;
691 hdr->comb_addr = addrdir;
692 hdr->sub_addr = subaddr;
693 if (bus->mode == pmac_i2c_mode_stdsub)
694 hdr->mode = PMU_I2C_MODE_STDSUB;
695 else
696 hdr->mode = PMU_I2C_MODE_COMBINED;
697 break;
698 default:
699 return -EINVAL;
700 }
701
702 INIT_COMPLETION(comp);
703 req->data[0] = PMU_I2C_CMD;
704 req->reply[0] = 0xff;
705 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
706 req->done = pmu_i2c_complete;
707 req->arg = &comp;
708 if (!read && len) {
709 memcpy(hdr->data, data, len);
710 req->nbytes += len;
711 }
712 rc = pmu_queue_request(req);
713 if (rc)
714 return rc;
715 wait_for_completion(&comp);
716 if (req->reply[0] == PMU_I2C_STATUS_OK)
717 break;
718 msleep(15);
719 }
720 if (req->reply[0] != PMU_I2C_STATUS_OK)
721 return -EIO;
722
723 for (retry = 0; retry < 16; retry++) {
724 memset(req, 0, sizeof(struct adb_request));
725
726 /* I know that looks like a lot, slow as hell, but darwin
727 * does it so let's be on the safe side for now
728 */
729 msleep(15);
730
731 hdr->bus = PMU_I2C_BUS_STATUS;
732
733 INIT_COMPLETION(comp);
734 req->data[0] = PMU_I2C_CMD;
735 req->reply[0] = 0xff;
736 req->nbytes = 2;
737 req->done = pmu_i2c_complete;
738 req->arg = &comp;
739 rc = pmu_queue_request(req);
740 if (rc)
741 return rc;
742 wait_for_completion(&comp);
743
744 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
745 return 0;
746 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
747 int rlen = req->reply_len - 1;
748
749 if (rlen != len) {
750 printk(KERN_WARNING "low_i2c: PMU returned %d"
751 " bytes, expected %d !\n", rlen, len);
752 return -EIO;
753 }
754 if (len)
755 memcpy(data, &req->reply[1], len);
756 return 0;
757 }
758 }
759 return -EIO;
760 }
761
762 static void __init pmu_i2c_probe(void)
763 {
764 struct pmac_i2c_bus *bus;
765 struct device_node *busnode;
766 int channel, sz;
767
768 if (!pmu_present())
769 return;
770
771 /* There might or might not be a "pmu-i2c" node, we use that
772 * or via-pmu itself, whatever we find. I haven't seen a machine
773 * with separate bus nodes, so we assume a multibus setup
774 */
775 busnode = of_find_node_by_name(NULL, "pmu-i2c");
776 if (busnode == NULL)
777 busnode = of_find_node_by_name(NULL, "via-pmu");
778 if (busnode == NULL)
779 return;
780
781 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
782
783 /*
784 * We add bus 1 and 2 only for now, bus 0 is "special"
785 */
786 for (channel = 1; channel <= 2; channel++) {
787 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
788 bus = kzalloc(sz, GFP_KERNEL);
789 if (bus == NULL)
790 return;
791
792 bus->controller = busnode;
793 bus->busnode = busnode;
794 bus->type = pmac_i2c_bus_pmu;
795 bus->channel = channel;
796 bus->mode = pmac_i2c_mode_std;
797 bus->hostdata = bus + 1;
798 bus->xfer = pmu_i2c_xfer;
799 init_MUTEX(&bus->sem);
800 bus->flags = pmac_i2c_multibus;
801 list_add(&bus->link, &pmac_i2c_busses);
802
803 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
804 }
805 }
806
807 #endif /* CONFIG_ADB_PMU */
808
809
810 /*
811 *
812 * SMU implementation
813 *
814 */
815
816 #ifdef CONFIG_PMAC_SMU
817
818 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
819 {
820 complete(misc);
821 }
822
823 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
824 u32 subaddr, u8 *data, int len)
825 {
826 struct smu_i2c_cmd *cmd = bus->hostdata;
827 struct completion comp;
828 int read = addrdir & 1;
829 int rc = 0;
830
831 if ((read && len > SMU_I2C_READ_MAX) ||
832 ((!read) && len > SMU_I2C_WRITE_MAX))
833 return -EINVAL;
834
835 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
836 cmd->info.bus = bus->channel;
837 cmd->info.devaddr = addrdir;
838 cmd->info.datalen = len;
839
840 switch(bus->mode) {
841 case pmac_i2c_mode_std:
842 if (subsize != 0)
843 return -EINVAL;
844 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
845 break;
846 case pmac_i2c_mode_stdsub:
847 case pmac_i2c_mode_combined:
848 if (subsize > 3 || subsize < 1)
849 return -EINVAL;
850 cmd->info.sublen = subsize;
851 /* that's big-endian only but heh ! */
852 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
853 subsize);
854 if (bus->mode == pmac_i2c_mode_stdsub)
855 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
856 else
857 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
858 break;
859 default:
860 return -EINVAL;
861 }
862 if (!read && len)
863 memcpy(cmd->info.data, data, len);
864
865 init_completion(&comp);
866 cmd->done = smu_i2c_complete;
867 cmd->misc = &comp;
868 rc = smu_queue_i2c(cmd);
869 if (rc < 0)
870 return rc;
871 wait_for_completion(&comp);
872 rc = cmd->status;
873
874 if (read && len)
875 memcpy(data, cmd->info.data, len);
876 return rc < 0 ? rc : 0;
877 }
878
879 static void __init smu_i2c_probe(void)
880 {
881 struct device_node *controller, *busnode;
882 struct pmac_i2c_bus *bus;
883 u32 *reg;
884 int sz;
885
886 if (!smu_present())
887 return;
888
889 controller = of_find_node_by_name(NULL, "smu-i2c-control");
890 if (controller == NULL)
891 controller = of_find_node_by_name(NULL, "smu");
892 if (controller == NULL)
893 return;
894
895 printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
896
897 /* Look for childs, note that they might not be of the right
898 * type as older device trees mix i2c busses and other thigns
899 * at the same level
900 */
901 for (busnode = NULL;
902 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
903 if (strcmp(busnode->type, "i2c") &&
904 strcmp(busnode->type, "i2c-bus"))
905 continue;
906 reg = (u32 *)get_property(busnode, "reg", NULL);
907 if (reg == NULL)
908 continue;
909
910 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
911 bus = kzalloc(sz, GFP_KERNEL);
912 if (bus == NULL)
913 return;
914
915 bus->controller = controller;
916 bus->busnode = of_node_get(busnode);
917 bus->type = pmac_i2c_bus_smu;
918 bus->channel = *reg;
919 bus->mode = pmac_i2c_mode_std;
920 bus->hostdata = bus + 1;
921 bus->xfer = smu_i2c_xfer;
922 init_MUTEX(&bus->sem);
923 bus->flags = 0;
924 list_add(&bus->link, &pmac_i2c_busses);
925
926 printk(KERN_INFO " channel %x bus %s\n",
927 bus->channel, busnode->full_name);
928 }
929 }
930
931 #endif /* CONFIG_PMAC_SMU */
932
933 /*
934 *
935 * Core code
936 *
937 */
938
939
940 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
941 {
942 struct device_node *p = of_node_get(node);
943 struct device_node *prev = NULL;
944 struct pmac_i2c_bus *bus;
945
946 while(p) {
947 list_for_each_entry(bus, &pmac_i2c_busses, link) {
948 if (p == bus->busnode) {
949 if (prev && bus->flags & pmac_i2c_multibus) {
950 u32 *reg;
951 reg = (u32 *)get_property(prev, "reg",
952 NULL);
953 if (!reg)
954 continue;
955 if (((*reg) >> 8) != bus->channel)
956 continue;
957 }
958 of_node_put(p);
959 of_node_put(prev);
960 return bus;
961 }
962 }
963 of_node_put(prev);
964 prev = p;
965 p = of_get_parent(p);
966 }
967 return NULL;
968 }
969 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
970
971 u8 pmac_i2c_get_dev_addr(struct device_node *device)
972 {
973 u32 *reg = (u32 *)get_property(device, "reg", NULL);
974
975 if (reg == NULL)
976 return 0;
977
978 return (*reg) & 0xff;
979 }
980 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
981
982 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
983 {
984 return bus->controller;
985 }
986 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
987
988 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
989 {
990 return bus->busnode;
991 }
992 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
993
994 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
995 {
996 return bus->type;
997 }
998 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
999
1000 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1001 {
1002 return bus->flags;
1003 }
1004 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1005
1006 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1007 {
1008 return bus->channel;
1009 }
1010 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1011
1012
1013 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1014 struct i2c_adapter *adapter)
1015 {
1016 WARN_ON(bus->adapter != NULL);
1017 bus->adapter = adapter;
1018 }
1019 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1020
1021 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1022 struct i2c_adapter *adapter)
1023 {
1024 WARN_ON(bus->adapter != adapter);
1025 bus->adapter = NULL;
1026 }
1027 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1028
1029 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1030 {
1031 return bus->adapter;
1032 }
1033 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1034
1035 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1036 {
1037 struct pmac_i2c_bus *bus;
1038
1039 list_for_each_entry(bus, &pmac_i2c_busses, link)
1040 if (bus->adapter == adapter)
1041 return bus;
1042 return NULL;
1043 }
1044 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1045
1046 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1047 {
1048 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1049
1050 if (bus == NULL)
1051 return 0;
1052 return (bus->adapter == adapter);
1053 }
1054 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1055
1056 int pmac_low_i2c_lock(struct device_node *np)
1057 {
1058 struct pmac_i2c_bus *bus, *found = NULL;
1059
1060 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1061 if (np == bus->controller) {
1062 found = bus;
1063 break;
1064 }
1065 }
1066 if (!found)
1067 return -ENODEV;
1068 return pmac_i2c_open(bus, 0);
1069 }
1070 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1071
1072 int pmac_low_i2c_unlock(struct device_node *np)
1073 {
1074 struct pmac_i2c_bus *bus, *found = NULL;
1075
1076 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1077 if (np == bus->controller) {
1078 found = bus;
1079 break;
1080 }
1081 }
1082 if (!found)
1083 return -ENODEV;
1084 pmac_i2c_close(bus);
1085 return 0;
1086 }
1087 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1088
1089
1090 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1091 {
1092 int rc;
1093
1094 down(&bus->sem);
1095 bus->polled = polled || pmac_i2c_force_poll;
1096 bus->opened = 1;
1097 bus->mode = pmac_i2c_mode_std;
1098 if (bus->open && (rc = bus->open(bus)) != 0) {
1099 bus->opened = 0;
1100 up(&bus->sem);
1101 return rc;
1102 }
1103 return 0;
1104 }
1105 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1106
1107 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1108 {
1109 WARN_ON(!bus->opened);
1110 if (bus->close)
1111 bus->close(bus);
1112 bus->opened = 0;
1113 up(&bus->sem);
1114 }
1115 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1116
1117 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1118 {
1119 WARN_ON(!bus->opened);
1120
1121 /* Report me if you see the error below as there might be a new
1122 * "combined4" mode that I need to implement for the SMU bus
1123 */
1124 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1125 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1126 " bus %s !\n", mode, bus->busnode->full_name);
1127 return -EINVAL;
1128 }
1129 bus->mode = mode;
1130
1131 return 0;
1132 }
1133 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1134
1135 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1136 u32 subaddr, u8 *data, int len)
1137 {
1138 int rc;
1139
1140 WARN_ON(!bus->opened);
1141
1142 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1143 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1144 subaddr, len, bus->busnode->full_name);
1145
1146 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1147
1148 #ifdef DEBUG
1149 if (rc)
1150 DBG("xfer error %d\n", rc);
1151 #endif
1152 return rc;
1153 }
1154 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1155
1156 /* some quirks for platform function decoding */
1157 enum {
1158 pmac_i2c_quirk_invmask = 0x00000001u,
1159 pmac_i2c_quirk_skip = 0x00000002u,
1160 };
1161
1162 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1163 int quirks))
1164 {
1165 struct pmac_i2c_bus *bus;
1166 struct device_node *np;
1167 static struct whitelist_ent {
1168 char *name;
1169 char *compatible;
1170 int quirks;
1171 } whitelist[] = {
1172 /* XXX Study device-tree's & apple drivers are get the quirks
1173 * right !
1174 */
1175 /* Workaround: It seems that running the clockspreading
1176 * properties on the eMac will cause lockups during boot.
1177 * The machine seems to work fine without that. So for now,
1178 * let's make sure i2c-hwclock doesn't match about "imic"
1179 * clocks and we'll figure out if we really need to do
1180 * something special about those later.
1181 */
1182 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1183 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1184 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1185 { "i2c-cpu-voltage", NULL, 0},
1186 { "temp-monitor", NULL, 0 },
1187 { "supply-monitor", NULL, 0 },
1188 { NULL, NULL, 0 },
1189 };
1190
1191 /* Only some devices need to have platform functions instanciated
1192 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1193 * on Xserve, if we ever do a driver for them, will use their own
1194 * platform function instance
1195 */
1196 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1197 for (np = NULL;
1198 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1199 struct whitelist_ent *p;
1200 /* If multibus, check if device is on that bus */
1201 if (bus->flags & pmac_i2c_multibus)
1202 if (bus != pmac_i2c_find_bus(np))
1203 continue;
1204 for (p = whitelist; p->name != NULL; p++) {
1205 if (strcmp(np->name, p->name))
1206 continue;
1207 if (p->compatible &&
1208 !device_is_compatible(np, p->compatible))
1209 continue;
1210 if (p->quirks & pmac_i2c_quirk_skip)
1211 break;
1212 callback(np, p->quirks);
1213 break;
1214 }
1215 }
1216 }
1217 }
1218
1219 #define MAX_I2C_DATA 64
1220
1221 struct pmac_i2c_pf_inst
1222 {
1223 struct pmac_i2c_bus *bus;
1224 u8 addr;
1225 u8 buffer[MAX_I2C_DATA];
1226 u8 scratch[MAX_I2C_DATA];
1227 int bytes;
1228 int quirks;
1229 };
1230
1231 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1232 {
1233 struct pmac_i2c_pf_inst *inst;
1234 struct pmac_i2c_bus *bus;
1235
1236 bus = pmac_i2c_find_bus(func->node);
1237 if (bus == NULL) {
1238 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1239 func->node->full_name);
1240 return NULL;
1241 }
1242 if (pmac_i2c_open(bus, 0)) {
1243 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1244 func->node->full_name);
1245 return NULL;
1246 }
1247
1248 /* XXX might need GFP_ATOMIC when called during the suspend process,
1249 * but then, there are already lots of issues with suspending when
1250 * near OOM that need to be resolved, the allocator itself should
1251 * probably make GFP_NOIO implicit during suspend
1252 */
1253 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1254 if (inst == NULL) {
1255 pmac_i2c_close(bus);
1256 return NULL;
1257 }
1258 inst->bus = bus;
1259 inst->addr = pmac_i2c_get_dev_addr(func->node);
1260 inst->quirks = (int)(long)func->driver_data;
1261 return inst;
1262 }
1263
1264 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1265 {
1266 struct pmac_i2c_pf_inst *inst = instdata;
1267
1268 if (inst == NULL)
1269 return;
1270 pmac_i2c_close(inst->bus);
1271 if (inst)
1272 kfree(inst);
1273 }
1274
1275 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1276 {
1277 struct pmac_i2c_pf_inst *inst = instdata;
1278
1279 inst->bytes = len;
1280 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1281 inst->buffer, len);
1282 }
1283
1284 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1285 {
1286 struct pmac_i2c_pf_inst *inst = instdata;
1287
1288 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1289 (u8 *)data, len);
1290 }
1291
1292 /* This function is used to do the masking & OR'ing for the "rmw" type
1293 * callbacks. Ze should apply the mask and OR in the values in the
1294 * buffer before writing back. The problem is that it seems that
1295 * various darwin drivers implement the mask/or differently, thus
1296 * we need to check the quirks first
1297 */
1298 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1299 u32 len, const u8 *mask, const u8 *val)
1300 {
1301 int i;
1302
1303 if (inst->quirks & pmac_i2c_quirk_invmask) {
1304 for (i = 0; i < len; i ++)
1305 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1306 } else {
1307 for (i = 0; i < len; i ++)
1308 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1309 | (val[i] & mask[i]);
1310 }
1311 }
1312
1313 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1314 u32 totallen, const u8 *maskdata,
1315 const u8 *valuedata)
1316 {
1317 struct pmac_i2c_pf_inst *inst = instdata;
1318
1319 if (masklen > inst->bytes || valuelen > inst->bytes ||
1320 totallen > inst->bytes || valuelen > masklen)
1321 return -EINVAL;
1322
1323 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1324
1325 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1326 inst->scratch, totallen);
1327 }
1328
1329 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1330 {
1331 struct pmac_i2c_pf_inst *inst = instdata;
1332
1333 inst->bytes = len;
1334 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1335 inst->buffer, len);
1336 }
1337
1338 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1339 const u8 *data)
1340 {
1341 struct pmac_i2c_pf_inst *inst = instdata;
1342
1343 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1344 subaddr, (u8 *)data, len);
1345 }
1346
1347 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1348 {
1349 struct pmac_i2c_pf_inst *inst = instdata;
1350
1351 return pmac_i2c_setmode(inst->bus, mode);
1352 }
1353
1354 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1355 u32 valuelen, u32 totallen, const u8 *maskdata,
1356 const u8 *valuedata)
1357 {
1358 struct pmac_i2c_pf_inst *inst = instdata;
1359
1360 if (masklen > inst->bytes || valuelen > inst->bytes ||
1361 totallen > inst->bytes || valuelen > masklen)
1362 return -EINVAL;
1363
1364 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1365
1366 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1367 subaddr, inst->scratch, totallen);
1368 }
1369
1370 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1371 const u8 *maskdata,
1372 const u8 *valuedata)
1373 {
1374 struct pmac_i2c_pf_inst *inst = instdata;
1375 int i, match;
1376
1377 /* Get return value pointer, it's assumed to be a u32 */
1378 if (!args || !args->count || !args->u[0].p)
1379 return -EINVAL;
1380
1381 /* Check buffer */
1382 if (len > inst->bytes)
1383 return -EINVAL;
1384
1385 for (i = 0, match = 1; match && i < len; i ++)
1386 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1387 match = 0;
1388 *args->u[0].p = match;
1389 return 0;
1390 }
1391
1392 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1393 {
1394 msleep((duration + 999) / 1000);
1395 return 0;
1396 }
1397
1398
1399 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1400 .begin = pmac_i2c_do_begin,
1401 .end = pmac_i2c_do_end,
1402 .read_i2c = pmac_i2c_do_read,
1403 .write_i2c = pmac_i2c_do_write,
1404 .rmw_i2c = pmac_i2c_do_rmw,
1405 .read_i2c_sub = pmac_i2c_do_read_sub,
1406 .write_i2c_sub = pmac_i2c_do_write_sub,
1407 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1408 .set_i2c_mode = pmac_i2c_do_set_mode,
1409 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1410 .delay = pmac_i2c_do_delay,
1411 };
1412
1413 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1414 {
1415 DBG("dev_create(%s)\n", np->full_name);
1416
1417 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1418 (void *)(long)quirks);
1419 }
1420
1421 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1422 {
1423 DBG("dev_create(%s)\n", np->full_name);
1424
1425 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1426 }
1427
1428 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1429 {
1430 DBG("dev_suspend(%s)\n", np->full_name);
1431 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1432 }
1433
1434 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1435 {
1436 DBG("dev_resume(%s)\n", np->full_name);
1437 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1438 }
1439
1440 void pmac_pfunc_i2c_suspend(void)
1441 {
1442 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1443 }
1444
1445 void pmac_pfunc_i2c_resume(void)
1446 {
1447 pmac_i2c_devscan(pmac_i2c_dev_resume);
1448 }
1449
1450 /*
1451 * Initialize us: probe all i2c busses on the machine, instantiate
1452 * busses and platform functions as needed.
1453 */
1454 /* This is non-static as it might be called early by smp code */
1455 int __init pmac_i2c_init(void)
1456 {
1457 static int i2c_inited;
1458
1459 if (i2c_inited)
1460 return 0;
1461 i2c_inited = 1;
1462
1463 if (!machine_is(powermac))
1464 return 0;
1465
1466 /* Probe keywest-i2c busses */
1467 kw_i2c_probe();
1468
1469 #ifdef CONFIG_ADB_PMU
1470 /* Probe PMU i2c busses */
1471 pmu_i2c_probe();
1472 #endif
1473
1474 #ifdef CONFIG_PMAC_SMU
1475 /* Probe SMU i2c busses */
1476 smu_i2c_probe();
1477 #endif
1478
1479 /* Now add plaform functions for some known devices */
1480 pmac_i2c_devscan(pmac_i2c_dev_create);
1481
1482 return 0;
1483 }
1484 arch_initcall(pmac_i2c_init);
1485
1486 /* Since pmac_i2c_init can be called too early for the platform device
1487 * registration, we need to do it at a later time. In our case, subsys
1488 * happens to fit well, though I agree it's a bit of a hack...
1489 */
1490 static int __init pmac_i2c_create_platform_devices(void)
1491 {
1492 struct pmac_i2c_bus *bus;
1493 int i = 0;
1494
1495 /* In the case where we are initialized from smp_init(), we must
1496 * not use the timer (and thus the irq). It's safe from now on
1497 * though
1498 */
1499 pmac_i2c_force_poll = 0;
1500
1501 /* Create platform devices */
1502 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1503 bus->platform_dev =
1504 platform_device_alloc("i2c-powermac", i++);
1505 if (bus->platform_dev == NULL)
1506 return -ENOMEM;
1507 bus->platform_dev->dev.platform_data = bus;
1508 platform_device_add(bus->platform_dev);
1509 }
1510
1511 /* Now call platform "init" functions */
1512 pmac_i2c_devscan(pmac_i2c_dev_init);
1513
1514 return 0;
1515 }
1516 subsys_initcall(pmac_i2c_create_platform_devices);
Linux kernel - Deliverables
This page took 0.063214 seconds and 4 git commands to generate.