dd2c285ad1708d755b5a1950558566149e837839
[deliverable/linux.git] / arch / powerpc / platforms / powernv / opal-lpc.c
1 /*
2 * PowerNV LPC bus handling.
3 *
4 * Copyright 2013 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/of.h>
14 #include <linux/bug.h>
15 #include <linux/debugfs.h>
16 #include <linux/io.h>
17 #include <linux/slab.h>
18
19 #include <asm/machdep.h>
20 #include <asm/firmware.h>
21 #include <asm/xics.h>
22 #include <asm/opal.h>
23 #include <asm/prom.h>
24 #include <asm/uaccess.h>
25 #include <asm/debug.h>
26
27 static int opal_lpc_chip_id = -1;
28
29 static u8 opal_lpc_inb(unsigned long port)
30 {
31 int64_t rc;
32 __be32 data;
33
34 if (opal_lpc_chip_id < 0 || port > 0xffff)
35 return 0xff;
36 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 1);
37 return rc ? 0xff : be32_to_cpu(data);
38 }
39
40 static __le16 __opal_lpc_inw(unsigned long port)
41 {
42 int64_t rc;
43 __be32 data;
44
45 if (opal_lpc_chip_id < 0 || port > 0xfffe)
46 return 0xffff;
47 if (port & 1)
48 return (__le16)opal_lpc_inb(port) << 8 | opal_lpc_inb(port + 1);
49 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 2);
50 return rc ? 0xffff : be32_to_cpu(data);
51 }
52 static u16 opal_lpc_inw(unsigned long port)
53 {
54 return le16_to_cpu(__opal_lpc_inw(port));
55 }
56
57 static __le32 __opal_lpc_inl(unsigned long port)
58 {
59 int64_t rc;
60 __be32 data;
61
62 if (opal_lpc_chip_id < 0 || port > 0xfffc)
63 return 0xffffffff;
64 if (port & 3)
65 return (__le32)opal_lpc_inb(port ) << 24 |
66 (__le32)opal_lpc_inb(port + 1) << 16 |
67 (__le32)opal_lpc_inb(port + 2) << 8 |
68 opal_lpc_inb(port + 3);
69 rc = opal_lpc_read(opal_lpc_chip_id, OPAL_LPC_IO, port, &data, 4);
70 return rc ? 0xffffffff : be32_to_cpu(data);
71 }
72
73 static u32 opal_lpc_inl(unsigned long port)
74 {
75 return le32_to_cpu(__opal_lpc_inl(port));
76 }
77
78 static void opal_lpc_outb(u8 val, unsigned long port)
79 {
80 if (opal_lpc_chip_id < 0 || port > 0xffff)
81 return;
82 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 1);
83 }
84
85 static void __opal_lpc_outw(__le16 val, unsigned long port)
86 {
87 if (opal_lpc_chip_id < 0 || port > 0xfffe)
88 return;
89 if (port & 1) {
90 opal_lpc_outb(val >> 8, port);
91 opal_lpc_outb(val , port + 1);
92 return;
93 }
94 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 2);
95 }
96
97 static void opal_lpc_outw(u16 val, unsigned long port)
98 {
99 __opal_lpc_outw(cpu_to_le16(val), port);
100 }
101
102 static void __opal_lpc_outl(__le32 val, unsigned long port)
103 {
104 if (opal_lpc_chip_id < 0 || port > 0xfffc)
105 return;
106 if (port & 3) {
107 opal_lpc_outb(val >> 24, port);
108 opal_lpc_outb(val >> 16, port + 1);
109 opal_lpc_outb(val >> 8, port + 2);
110 opal_lpc_outb(val , port + 3);
111 return;
112 }
113 opal_lpc_write(opal_lpc_chip_id, OPAL_LPC_IO, port, val, 4);
114 }
115
116 static void opal_lpc_outl(u32 val, unsigned long port)
117 {
118 __opal_lpc_outl(cpu_to_le32(val), port);
119 }
120
121 static void opal_lpc_insb(unsigned long p, void *b, unsigned long c)
122 {
123 u8 *ptr = b;
124
125 while(c--)
126 *(ptr++) = opal_lpc_inb(p);
127 }
128
129 static void opal_lpc_insw(unsigned long p, void *b, unsigned long c)
130 {
131 __le16 *ptr = b;
132
133 while(c--)
134 *(ptr++) = __opal_lpc_inw(p);
135 }
136
137 static void opal_lpc_insl(unsigned long p, void *b, unsigned long c)
138 {
139 __le32 *ptr = b;
140
141 while(c--)
142 *(ptr++) = __opal_lpc_inl(p);
143 }
144
145 static void opal_lpc_outsb(unsigned long p, const void *b, unsigned long c)
146 {
147 const u8 *ptr = b;
148
149 while(c--)
150 opal_lpc_outb(*(ptr++), p);
151 }
152
153 static void opal_lpc_outsw(unsigned long p, const void *b, unsigned long c)
154 {
155 const __le16 *ptr = b;
156
157 while(c--)
158 __opal_lpc_outw(*(ptr++), p);
159 }
160
161 static void opal_lpc_outsl(unsigned long p, const void *b, unsigned long c)
162 {
163 const __le32 *ptr = b;
164
165 while(c--)
166 __opal_lpc_outl(*(ptr++), p);
167 }
168
169 static const struct ppc_pci_io opal_lpc_io = {
170 .inb = opal_lpc_inb,
171 .inw = opal_lpc_inw,
172 .inl = opal_lpc_inl,
173 .outb = opal_lpc_outb,
174 .outw = opal_lpc_outw,
175 .outl = opal_lpc_outl,
176 .insb = opal_lpc_insb,
177 .insw = opal_lpc_insw,
178 .insl = opal_lpc_insl,
179 .outsb = opal_lpc_outsb,
180 .outsw = opal_lpc_outsw,
181 .outsl = opal_lpc_outsl,
182 };
183
184 #ifdef CONFIG_DEBUG_FS
185 struct lpc_debugfs_entry {
186 enum OpalLPCAddressType lpc_type;
187 };
188
189 static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
190 size_t count, loff_t *ppos)
191 {
192 struct lpc_debugfs_entry *lpc = filp->private_data;
193 u32 data, pos, len, todo;
194 __be32 bedata;
195 int rc;
196
197 if (!access_ok(VERIFY_WRITE, ubuf, count))
198 return -EFAULT;
199
200 todo = count;
201 while (todo) {
202 pos = *ppos;
203
204 /*
205 * Select access size based on count and alignment and
206 * access type. IO and MEM only support byte acceses,
207 * FW supports all 3.
208 */
209 len = 1;
210 if (lpc->lpc_type == OPAL_LPC_FW) {
211 if (todo > 3 && (pos & 3) == 0)
212 len = 4;
213 else if (todo > 1 && (pos & 1) == 0)
214 len = 2;
215 }
216 rc = opal_lpc_read(opal_lpc_chip_id, lpc->lpc_type, pos,
217 &bedata, len);
218 if (rc)
219 return -ENXIO;
220 data = be32_to_cpu(bedata);
221 switch(len) {
222 case 4:
223 rc = __put_user((u32)data, (u32 __user *)ubuf);
224 break;
225 case 2:
226 rc = __put_user((u16)data, (u16 __user *)ubuf);
227 break;
228 default:
229 rc = __put_user((u8)data, (u8 __user *)ubuf);
230 break;
231 }
232 if (rc)
233 return -EFAULT;
234 *ppos += len;
235 ubuf += len;
236 todo -= len;
237 }
238
239 return count;
240 }
241
242 static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
243 size_t count, loff_t *ppos)
244 {
245 struct lpc_debugfs_entry *lpc = filp->private_data;
246 u32 data, pos, len, todo;
247 int rc;
248
249 if (!access_ok(VERIFY_READ, ubuf, count))
250 return -EFAULT;
251
252 todo = count;
253 while (todo) {
254 pos = *ppos;
255
256 /*
257 * Select access size based on count and alignment and
258 * access type. IO and MEM only support byte acceses,
259 * FW supports all 3.
260 */
261 len = 1;
262 if (lpc->lpc_type == OPAL_LPC_FW) {
263 if (todo > 3 && (pos & 3) == 0)
264 len = 4;
265 else if (todo > 1 && (pos & 1) == 0)
266 len = 2;
267 }
268 switch(len) {
269 case 4:
270 rc = __get_user(data, (u32 __user *)ubuf);
271 break;
272 case 2:
273 rc = __get_user(data, (u16 __user *)ubuf);
274 break;
275 default:
276 rc = __get_user(data, (u8 __user *)ubuf);
277 break;
278 }
279 if (rc)
280 return -EFAULT;
281
282 rc = opal_lpc_write(opal_lpc_chip_id, lpc->lpc_type, pos,
283 data, len);
284 if (rc)
285 return -ENXIO;
286 *ppos += len;
287 ubuf += len;
288 todo -= len;
289 }
290
291 return count;
292 }
293
294 static const struct file_operations lpc_fops = {
295 .read = lpc_debug_read,
296 .write = lpc_debug_write,
297 .open = simple_open,
298 .llseek = default_llseek,
299 };
300
301 static int opal_lpc_debugfs_create_type(struct dentry *folder,
302 const char *fname,
303 enum OpalLPCAddressType type)
304 {
305 struct lpc_debugfs_entry *entry;
306 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
307 if (!entry)
308 return -ENOMEM;
309 entry->lpc_type = type;
310 debugfs_create_file(fname, 0600, folder, entry, &lpc_fops);
311 return 0;
312 }
313
314 static int opal_lpc_init_debugfs(void)
315 {
316 struct dentry *root;
317 int rc = 0;
318
319 if (opal_lpc_chip_id < 0)
320 return -ENODEV;
321
322 root = debugfs_create_dir("lpc", powerpc_debugfs_root);
323
324 rc |= opal_lpc_debugfs_create_type(root, "io", OPAL_LPC_IO);
325 rc |= opal_lpc_debugfs_create_type(root, "mem", OPAL_LPC_MEM);
326 rc |= opal_lpc_debugfs_create_type(root, "fw", OPAL_LPC_FW);
327 return rc;
328 }
329 machine_device_initcall(powernv, opal_lpc_init_debugfs);
330 #endif /* CONFIG_DEBUG_FS */
331
332 void opal_lpc_init(void)
333 {
334 struct device_node *np;
335
336 /*
337 * Look for a Power8 LPC bus tagged as "primary",
338 * we currently support only one though the OPAL APIs
339 * support any number.
340 */
341 for_each_compatible_node(np, NULL, "ibm,power8-lpc") {
342 if (!of_device_is_available(np))
343 continue;
344 if (!of_get_property(np, "primary", NULL))
345 continue;
346 opal_lpc_chip_id = of_get_ibm_chip_id(np);
347 break;
348 }
349 if (opal_lpc_chip_id < 0)
350 return;
351
352 /* Setup special IO ops */
353 ppc_pci_io = opal_lpc_io;
354 isa_io_special = true;
355
356 pr_info("OPAL: Power8 LPC bus found, chip ID %d\n", opal_lpc_chip_id);
357 }
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