2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/seq_file.h>
32 #include <linux/spinlock.h>
33 #include <linux/export.h>
36 #include <linux/atomic.h>
38 #include <asm/eeh_event.h>
40 #include <asm/machdep.h>
41 #include <asm/ppc-pci.h>
46 * EEH, or "Extended Error Handling" is a PCI bridge technology for
47 * dealing with PCI bus errors that can't be dealt with within the
48 * usual PCI framework, except by check-stopping the CPU. Systems
49 * that are designed for high-availability/reliability cannot afford
50 * to crash due to a "mere" PCI error, thus the need for EEH.
51 * An EEH-capable bridge operates by converting a detected error
52 * into a "slot freeze", taking the PCI adapter off-line, making
53 * the slot behave, from the OS'es point of view, as if the slot
54 * were "empty": all reads return 0xff's and all writes are silently
55 * ignored. EEH slot isolation events can be triggered by parity
56 * errors on the address or data busses (e.g. during posted writes),
57 * which in turn might be caused by low voltage on the bus, dust,
58 * vibration, humidity, radioactivity or plain-old failed hardware.
60 * Note, however, that one of the leading causes of EEH slot
61 * freeze events are buggy device drivers, buggy device microcode,
62 * or buggy device hardware. This is because any attempt by the
63 * device to bus-master data to a memory address that is not
64 * assigned to the device will trigger a slot freeze. (The idea
65 * is to prevent devices-gone-wild from corrupting system memory).
66 * Buggy hardware/drivers will have a miserable time co-existing
69 * Ideally, a PCI device driver, when suspecting that an isolation
70 * event has occurred (e.g. by reading 0xff's), will then ask EEH
71 * whether this is the case, and then take appropriate steps to
72 * reset the PCI slot, the PCI device, and then resume operations.
73 * However, until that day, the checking is done here, with the
74 * eeh_check_failure() routine embedded in the MMIO macros. If
75 * the slot is found to be isolated, an "EEH Event" is synthesized
76 * and sent out for processing.
79 /* If a device driver keeps reading an MMIO register in an interrupt
80 * handler after a slot isolation event, it might be broken.
81 * This sets the threshold for how many read attempts we allow
82 * before printing an error message.
84 #define EEH_MAX_FAILS 2100000
86 /* Time to wait for a PCI slot to report status, in milliseconds */
87 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
90 static int ibm_set_eeh_option
;
91 static int ibm_set_slot_reset
;
92 static int ibm_read_slot_reset_state
;
93 static int ibm_read_slot_reset_state2
;
94 static int ibm_slot_error_detail
;
95 static int ibm_get_config_addr_info
;
96 static int ibm_get_config_addr_info2
;
97 static int ibm_configure_bridge
;
98 static int ibm_configure_pe
;
100 int eeh_subsystem_enabled
;
101 EXPORT_SYMBOL(eeh_subsystem_enabled
);
103 /* Lock to avoid races due to multiple reports of an error */
104 static DEFINE_RAW_SPINLOCK(confirm_error_lock
);
106 /* Buffer for reporting slot-error-detail rtas calls. Its here
107 * in BSS, and not dynamically alloced, so that it ends up in
108 * RMO where RTAS can access it.
110 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
111 static DEFINE_SPINLOCK(slot_errbuf_lock
);
112 static int eeh_error_buf_size
;
114 /* Buffer for reporting pci register dumps. Its here in BSS, and
115 * not dynamically alloced, so that it ends up in RMO where RTAS
118 #define EEH_PCI_REGS_LOG_LEN 4096
119 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
121 /* System monitoring statistics */
122 static unsigned long no_device
;
123 static unsigned long no_dn
;
124 static unsigned long no_cfg_addr
;
125 static unsigned long ignored_check
;
126 static unsigned long total_mmio_ffs
;
127 static unsigned long false_positives
;
128 static unsigned long slot_resets
;
130 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
133 * eeh_rtas_slot_error_detail - Retrieve error log through RTAS call
135 * @severity: temporary or permanent error log
136 * @driver_log: driver log to be combined with the retrieved error log
137 * @loglen: length of driver log
139 * This routine should be called to retrieve error log through the dedicated
142 static void eeh_rtas_slot_error_detail(struct pci_dn
*pdn
, int severity
,
143 char *driver_log
, size_t loglen
)
149 /* Log the error with the rtas logger */
150 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
151 memset(slot_errbuf
, 0, eeh_error_buf_size
);
153 /* Use PE configuration address, if present */
154 config_addr
= pdn
->eeh_config_addr
;
155 if (pdn
->eeh_pe_config_addr
)
156 config_addr
= pdn
->eeh_pe_config_addr
;
158 rc
= rtas_call(ibm_slot_error_detail
,
159 8, 1, NULL
, config_addr
,
160 BUID_HI(pdn
->phb
->buid
),
161 BUID_LO(pdn
->phb
->buid
),
162 virt_to_phys(driver_log
), loglen
,
163 virt_to_phys(slot_errbuf
),
168 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
169 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
173 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
174 * @pdn: device to report data for
175 * @buf: point to buffer in which to log
176 * @len: amount of room in buffer
178 * This routine captures assorted PCI configuration space data,
179 * and puts them into a buffer for RTAS error logging.
181 static size_t eeh_gather_pci_data(struct pci_dn
*pdn
, char * buf
, size_t len
)
183 struct pci_dev
*dev
= pdn
->pcidev
;
188 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", pdn
->node
->full_name
);
189 printk(KERN_WARNING
"EEH: of node=%s\n", pdn
->node
->full_name
);
191 rtas_read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
192 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
193 printk(KERN_WARNING
"EEH: PCI device/vendor: %08x\n", cfg
);
195 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
196 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
197 printk(KERN_WARNING
"EEH: PCI cmd/status register: %08x\n", cfg
);
200 printk(KERN_WARNING
"EEH: no PCI device for this of node\n");
204 /* Gather bridge-specific registers */
205 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
206 rtas_read_config(pdn
, PCI_SEC_STATUS
, 2, &cfg
);
207 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
208 printk(KERN_WARNING
"EEH: Bridge secondary status: %04x\n", cfg
);
210 rtas_read_config(pdn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
211 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
212 printk(KERN_WARNING
"EEH: Bridge control: %04x\n", cfg
);
215 /* Dump out the PCI-X command and status regs */
216 cap
= pci_find_capability(dev
, PCI_CAP_ID_PCIX
);
218 rtas_read_config(pdn
, cap
, 4, &cfg
);
219 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
220 printk(KERN_WARNING
"EEH: PCI-X cmd: %08x\n", cfg
);
222 rtas_read_config(pdn
, cap
+4, 4, &cfg
);
223 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
224 printk(KERN_WARNING
"EEH: PCI-X status: %08x\n", cfg
);
227 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
228 cap
= pci_find_capability(dev
, PCI_CAP_ID_EXP
);
230 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
232 "EEH: PCI-E capabilities and status follow:\n");
234 for (i
=0; i
<=8; i
++) {
235 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
236 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
237 printk(KERN_WARNING
"EEH: PCI-E %02x: %08x\n", i
, cfg
);
240 cap
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ERR
);
242 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
244 "EEH: PCI-E AER capability register set follows:\n");
246 for (i
=0; i
<14; i
++) {
247 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
248 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
249 printk(KERN_WARNING
"EEH: PCI-E AER %02x: %08x\n", i
, cfg
);
254 /* Gather status on devices under the bridge */
255 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
256 struct device_node
*dn
;
258 for_each_child_of_node(pdn
->node
, dn
) {
261 n
+= eeh_gather_pci_data(pdn
, buf
+n
, len
-n
);
269 * eeh_slot_error_detail - Generate combined log including driver log and error log
271 * @severity: temporary or permanent error log
273 * This routine should be called to generate the combined log, which
274 * is comprised of driver log and error log. The driver log is figured
275 * out from the config space of the corresponding PCI device, while
276 * the error log is fetched through platform dependent function call.
278 void eeh_slot_error_detail(struct pci_dn
*pdn
, int severity
)
283 eeh_pci_enable(pdn
, EEH_THAW_MMIO
);
284 eeh_configure_bridge(pdn
);
285 eeh_restore_bars(pdn
);
286 loglen
= eeh_gather_pci_data(pdn
, pci_regs_buf
, EEH_PCI_REGS_LOG_LEN
);
288 eeh_rtas_slot_error_detail(pdn
, severity
, pci_regs_buf
, loglen
);
292 * eeh_read_slot_reset_state - Read the reset state of a device node's slot
293 * @dn: device node to read
294 * @rets: array to return results in
296 * Read the reset state of a device node's slot through platform dependent
299 static int eeh_read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
304 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
305 token
= ibm_read_slot_reset_state2
;
308 token
= ibm_read_slot_reset_state
;
309 rets
[2] = 0; /* fake PE Unavailable info */
313 /* Use PE configuration address, if present */
314 config_addr
= pdn
->eeh_config_addr
;
315 if (pdn
->eeh_pe_config_addr
)
316 config_addr
= pdn
->eeh_pe_config_addr
;
318 return rtas_call(token
, 3, outputs
, rets
, config_addr
,
319 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
323 * eeh_wait_for_slot_status - Returns error status of slot
324 * @pdn: pci device node
325 * @max_wait_msecs: maximum number to millisecs to wait
327 * Return negative value if a permanent error, else return
328 * Partition Endpoint (PE) status value.
330 * If @max_wait_msecs is positive, then this routine will
331 * sleep until a valid status can be obtained, or until
332 * the max allowed wait time is exceeded, in which case
335 int eeh_wait_for_slot_status(struct pci_dn
*pdn
, int max_wait_msecs
)
342 rc
= eeh_read_slot_reset_state(pdn
, rets
);
344 if (rets
[1] == 0) return -1; /* EEH is not supported */
346 if (rets
[0] != 5) return rets
[0]; /* return actual status */
348 if (rets
[2] == 0) return -1; /* permanently unavailable */
350 if (max_wait_msecs
<= 0) break;
354 printk(KERN_WARNING
"EEH: Firmware returned bad wait value=%d\n",
357 } else if (mwait
> 300*1000) {
358 printk(KERN_WARNING
"EEH: Firmware is taking too long, time=%d\n",
362 max_wait_msecs
-= mwait
;
366 printk(KERN_WARNING
"EEH: Timed out waiting for slot status\n");
371 * eeh_token_to_phys - Convert EEH address token to phys address
372 * @token: I/O token, should be address in the form 0xA....
374 * This routine should be called to convert virtual I/O address
377 static inline unsigned long eeh_token_to_phys(unsigned long token
)
382 ptep
= find_linux_pte(init_mm
.pgd
, token
);
385 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
387 return pa
| (token
& (PAGE_SIZE
-1));
391 * eeh_find_device_pe - Retrieve the PE for the given device
394 * Return the PE under which this device lies
396 struct device_node
*eeh_find_device_pe(struct device_node
*dn
)
398 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
399 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
406 * __eeh_mark_slot - Mark all child devices as failed
407 * @parent: parent device
408 * @mode_flag: failure flag
410 * Mark all devices that are children of this device as failed.
411 * Mark the device driver too, so that it can see the failure
412 * immediately; this is critical, since some drivers poll
413 * status registers in interrupts ... If a driver is polling,
414 * and the slot is frozen, then the driver can deadlock in
415 * an interrupt context, which is bad.
417 static void __eeh_mark_slot(struct device_node
*parent
, int mode_flag
)
419 struct device_node
*dn
;
421 for_each_child_of_node(parent
, dn
) {
423 /* Mark the pci device driver too */
424 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
426 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
428 if (dev
&& dev
->driver
)
429 dev
->error_state
= pci_channel_io_frozen
;
431 __eeh_mark_slot(dn
, mode_flag
);
437 * eeh_mark_slot - Mark the indicated device and its children as failed
439 * @mode_flag: failure flag
441 * Mark the indicated device and its child devices as failed.
442 * The device drivers are marked as failed as well.
444 void eeh_mark_slot(struct device_node
*dn
, int mode_flag
)
447 dn
= eeh_find_device_pe(dn
);
449 /* Back up one, since config addrs might be shared */
450 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
453 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
455 /* Mark the pci device too */
456 dev
= PCI_DN(dn
)->pcidev
;
458 dev
->error_state
= pci_channel_io_frozen
;
460 __eeh_mark_slot(dn
, mode_flag
);
464 * __eeh_clear_slot - Clear failure flag for the child devices
465 * @parent: parent device
466 * @mode_flag: flag to be cleared
468 * Clear failure flag for the child devices.
470 static void __eeh_clear_slot(struct device_node
*parent
, int mode_flag
)
472 struct device_node
*dn
;
474 for_each_child_of_node(parent
, dn
) {
476 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
477 PCI_DN(dn
)->eeh_check_count
= 0;
478 __eeh_clear_slot(dn
, mode_flag
);
484 * eeh_clear_slot - Clear failure flag for the indicated device and its children
486 * @mode_flag: flag to be cleared
488 * Clear failure flag for the indicated device and its children.
490 void eeh_clear_slot(struct device_node
*dn
, int mode_flag
)
493 raw_spin_lock_irqsave(&confirm_error_lock
, flags
);
495 dn
= eeh_find_device_pe(dn
);
497 /* Back up one, since config addrs might be shared */
498 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
501 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
502 PCI_DN(dn
)->eeh_check_count
= 0;
503 __eeh_clear_slot(dn
, mode_flag
);
504 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
508 * eeh_dn_check_failure - Check if all 1's data is due to EEH slot freeze
510 * @dev: pci device, if known
512 * Check for an EEH failure for the given device node. Call this
513 * routine if the result of a read was all 0xff's and you want to
514 * find out if this is due to an EEH slot freeze. This routine
515 * will query firmware for the EEH status.
517 * Returns 0 if there has not been an EEH error; otherwise returns
518 * a non-zero value and queues up a slot isolation event notification.
520 * It is safe to call this routine in an interrupt context.
522 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
529 const char *location
;
533 if (!eeh_subsystem_enabled
)
540 dn
= eeh_find_device_pe(dn
);
543 /* Access to IO BARs might get this far and still not want checking. */
544 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
545 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
547 pr_debug("EEH: Ignored check (%x) for %s %s\n",
548 pdn
->eeh_mode
, eeh_pci_name(dev
), dn
->full_name
);
552 if (!pdn
->eeh_config_addr
&& !pdn
->eeh_pe_config_addr
) {
557 /* If we already have a pending isolation event for this
558 * slot, we know it's bad already, we don't need to check.
559 * Do this checking under a lock; as multiple PCI devices
560 * in one slot might report errors simultaneously, and we
561 * only want one error recovery routine running.
563 raw_spin_lock_irqsave(&confirm_error_lock
, flags
);
565 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
566 pdn
->eeh_check_count
++;
567 if (pdn
->eeh_check_count
% EEH_MAX_FAILS
== 0) {
568 location
= of_get_property(dn
, "ibm,loc-code", NULL
);
569 printk(KERN_ERR
"EEH: %d reads ignored for recovering device at "
570 "location=%s driver=%s pci addr=%s\n",
571 pdn
->eeh_check_count
, location
,
572 eeh_driver_name(dev
), eeh_pci_name(dev
));
573 printk(KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
574 eeh_driver_name(dev
));
581 * Now test for an EEH failure. This is VERY expensive.
582 * Note that the eeh_config_addr may be a parent device
583 * in the case of a device behind a bridge, or it may be
584 * function zero of a multi-function device.
585 * In any case they must share a common PHB.
587 ret
= eeh_read_slot_reset_state(pdn
, rets
);
589 /* If the call to firmware failed, punt */
591 printk(KERN_WARNING
"EEH: eeh_read_slot_reset_state() failed; rc=%d dn=%s\n",
594 pdn
->eeh_false_positives
++;
599 /* Note that config-io to empty slots may fail;
600 * they are empty when they don't have children.
602 if ((rets
[0] == 5) && (rets
[2] == 0) && (dn
->child
== NULL
)) {
604 pdn
->eeh_false_positives
++;
609 /* If EEH is not supported on this device, punt. */
611 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
614 pdn
->eeh_false_positives
++;
619 /* If not the kind of error we know about, punt. */
620 if (rets
[0] != 1 && rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
622 pdn
->eeh_false_positives
++;
629 /* Avoid repeated reports of this failure, including problems
630 * with other functions on this device, and functions under
633 eeh_mark_slot(dn
, EEH_MODE_ISOLATED
);
634 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
636 eeh_send_failure_event(dn
, dev
);
638 /* Most EEH events are due to device driver bugs. Having
639 * a stack trace will help the device-driver authors figure
640 * out what happened. So print that out.
646 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
650 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
653 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
654 * @token: I/O token, should be address in the form 0xA....
655 * @val: value, should be all 1's (XXX why do we need this arg??)
657 * Check for an EEH failure at the given token address. Call this
658 * routine if the result of a read was all 0xff's and you want to
659 * find out if this is due to an EEH slot freeze event. This routine
660 * will query firmware for the EEH status.
662 * Note this routine is safe to call in an interrupt context.
664 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
668 struct device_node
*dn
;
670 /* Finding the phys addr + pci device; this is pretty quick. */
671 addr
= eeh_token_to_phys((unsigned long __force
) token
);
672 dev
= pci_get_device_by_addr(addr
);
678 dn
= pci_device_to_OF_node(dev
);
679 eeh_dn_check_failure(dn
, dev
);
685 EXPORT_SYMBOL(eeh_check_failure
);
689 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
690 * @pdn pci device node
692 * This routine should be called to reenable frozen MMIO or DMA
693 * so that it would work correctly again. It's useful while doing
694 * recovery or log collection on the indicated device.
696 int eeh_pci_enable(struct pci_dn
*pdn
, int function
)
701 /* Use PE configuration address, if present */
702 config_addr
= pdn
->eeh_config_addr
;
703 if (pdn
->eeh_pe_config_addr
)
704 config_addr
= pdn
->eeh_pe_config_addr
;
706 rc
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
708 BUID_HI(pdn
->phb
->buid
),
709 BUID_LO(pdn
->phb
->buid
),
713 printk(KERN_WARNING
"EEH: Unexpected state change %d, err=%d dn=%s\n",
714 function
, rc
, pdn
->node
->full_name
);
716 rc
= eeh_wait_for_slot_status(pdn
, PCI_BUS_RESET_WAIT_MSEC
);
717 if ((rc
== 4) && (function
== EEH_THAW_MMIO
))
724 * eeh_slot_reset - Raises/Lowers the pci #RST line
725 * @pdn: pci device node
726 * @state: 1/0 to raise/lower the #RST
728 * Clear the EEH-frozen condition on a slot. This routine
729 * asserts the PCI #RST line if the 'state' argument is '1',
730 * and drops the #RST line if 'state is '0'. This routine is
731 * safe to call in an interrupt context.
733 static void eeh_slot_reset(struct pci_dn
*pdn
, int state
)
741 printk(KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
742 pdn
->node
->full_name
);
746 /* Use PE configuration address, if present */
747 config_addr
= pdn
->eeh_config_addr
;
748 if (pdn
->eeh_pe_config_addr
)
749 config_addr
= pdn
->eeh_pe_config_addr
;
751 rc
= rtas_call(ibm_set_slot_reset
, 4, 1, NULL
,
753 BUID_HI(pdn
->phb
->buid
),
754 BUID_LO(pdn
->phb
->buid
),
757 /* Fundamental-reset not supported on this PE, try hot-reset */
758 if (rc
== -8 && state
== 3) {
759 rc
= rtas_call(ibm_set_slot_reset
, 4, 1, NULL
,
761 BUID_HI(pdn
->phb
->buid
),
762 BUID_LO(pdn
->phb
->buid
), 1);
765 "EEH: Unable to reset the failed slot,"
767 rc
, pdn
->node
->full_name
);
772 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
773 * @dev: pci device struct
774 * @state: reset state to enter
779 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
781 struct device_node
*dn
= pci_device_to_OF_node(dev
);
782 struct pci_dn
*pdn
= PCI_DN(dn
);
785 case pcie_deassert_reset
:
786 eeh_slot_reset(pdn
, 0);
789 eeh_slot_reset(pdn
, 1);
791 case pcie_warm_reset
:
792 eeh_slot_reset(pdn
, 3);
802 * __eeh_set_pe_freset - Check the required reset for child devices
803 * @parent: parent device
804 * @freset: return value
806 * Each device might have its preferred reset type: fundamental or
807 * hot reset. The routine is used to collect the information from
808 * the child devices so that they could be reset accordingly.
810 void __eeh_set_pe_freset(struct device_node
*parent
, unsigned int *freset
)
812 struct device_node
*dn
;
814 for_each_child_of_node(parent
, dn
) {
816 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
818 if (dev
&& dev
->driver
)
819 *freset
|= dev
->needs_freset
;
821 __eeh_set_pe_freset(dn
, freset
);
827 * eeh_set_pe_freset - Check the required reset for the indicated device and its children
829 * @freset: return value
831 * Each device might have its preferred reset type: fundamental or
832 * hot reset. The routine is used to collected the information for
833 * the indicated device and its children so that the bunch of the
834 * devices could be reset properly.
836 void eeh_set_pe_freset(struct device_node
*dn
, unsigned int *freset
)
839 dn
= eeh_find_device_pe(dn
);
841 /* Back up one, since config addrs might be shared */
842 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
845 dev
= PCI_DN(dn
)->pcidev
;
847 *freset
|= dev
->needs_freset
;
849 __eeh_set_pe_freset(dn
, freset
);
853 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
854 * @pdn: pci device node to be reset.
856 * Assert the PCI #RST line for 1/4 second.
858 static void eeh_reset_pe_once(struct pci_dn
*pdn
)
860 unsigned int freset
= 0;
862 /* Determine type of EEH reset required for
863 * Partitionable Endpoint, a hot-reset (1)
864 * or a fundamental reset (3).
865 * A fundamental reset required by any device under
866 * Partitionable Endpoint trumps hot-reset.
868 eeh_set_pe_freset(pdn
->node
, &freset
);
871 eeh_slot_reset(pdn
, 3);
873 eeh_slot_reset(pdn
, 1);
875 /* The PCI bus requires that the reset be held high for at least
876 * a 100 milliseconds. We wait a bit longer 'just in case'.
878 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
879 msleep(PCI_BUS_RST_HOLD_TIME_MSEC
);
881 /* We might get hit with another EEH freeze as soon as the
882 * pci slot reset line is dropped. Make sure we don't miss
883 * these, and clear the flag now.
885 eeh_clear_slot(pdn
->node
, EEH_MODE_ISOLATED
);
887 eeh_slot_reset(pdn
, 0);
889 /* After a PCI slot has been reset, the PCI Express spec requires
890 * a 1.5 second idle time for the bus to stabilize, before starting
893 #define PCI_BUS_SETTLE_TIME_MSEC 1800
894 msleep(PCI_BUS_SETTLE_TIME_MSEC
);
898 * eeh_reset_pe - Reset the indicated PE
899 * @pdn: PCI device node
901 * This routine should be called to reset indicated device, including
902 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
903 * might be involved as well.
905 int eeh_reset_pe(struct pci_dn
*pdn
)
909 /* Take three shots at resetting the bus */
910 for (i
=0; i
<3; i
++) {
911 eeh_reset_pe_once(pdn
);
913 rc
= eeh_wait_for_slot_status(pdn
, PCI_BUS_RESET_WAIT_MSEC
);
918 printk(KERN_ERR
"EEH: unrecoverable slot failure %s\n",
919 pdn
->node
->full_name
);
922 printk(KERN_ERR
"EEH: bus reset %d failed on slot %s, rc=%d\n",
923 i
+1, pdn
->node
->full_name
, rc
);
929 /** Save and restore of PCI BARs
931 * Although firmware will set up BARs during boot, it doesn't
932 * set up device BAR's after a device reset, although it will,
933 * if requested, set up bridge configuration. Thus, we need to
934 * configure the PCI devices ourselves.
938 * eeh_restore_one_device_bars - Restore the Base Address Registers for one device
939 * @pdn: pci device node
941 * Loads the PCI configuration space base address registers,
942 * the expansion ROM base address, the latency timer, and etc.
943 * from the saved values in the device node.
945 static inline void eeh_restore_one_device_bars(struct pci_dn
*pdn
)
950 if (NULL
==pdn
->phb
) return;
951 for (i
=4; i
<10; i
++) {
952 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
955 /* 12 == Expansion ROM Address */
956 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
958 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
959 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
961 rtas_write_config(pdn
, PCI_CACHE_LINE_SIZE
, 1,
962 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
964 rtas_write_config(pdn
, PCI_LATENCY_TIMER
, 1,
965 SAVED_BYTE(PCI_LATENCY_TIMER
));
967 /* max latency, min grant, interrupt pin and line */
968 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
970 /* Restore PERR & SERR bits, some devices require it,
971 * don't touch the other command bits
973 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cmd
);
974 if (pdn
->config_space
[1] & PCI_COMMAND_PARITY
)
975 cmd
|= PCI_COMMAND_PARITY
;
977 cmd
&= ~PCI_COMMAND_PARITY
;
978 if (pdn
->config_space
[1] & PCI_COMMAND_SERR
)
979 cmd
|= PCI_COMMAND_SERR
;
981 cmd
&= ~PCI_COMMAND_SERR
;
982 rtas_write_config(pdn
, PCI_COMMAND
, 4, cmd
);
986 * eeh_restore_bars - Restore the PCI config space info
987 * @pdn: PCI device node
989 * This routine performs a recursive walk to the children
990 * of this device as well.
992 void eeh_restore_bars(struct pci_dn
*pdn
)
994 struct device_node
*dn
;
998 if ((pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) && !IS_BRIDGE(pdn
->class_code
))
999 eeh_restore_one_device_bars(pdn
);
1001 for_each_child_of_node(pdn
->node
, dn
)
1002 eeh_restore_bars(PCI_DN(dn
));
1006 * eeh_save_bars - Save device bars
1007 * @pdn: PCI device node
1009 * Save the values of the device bars. Unlike the restore
1010 * routine, this routine is *not* recursive. This is because
1011 * PCI devices are added individually; but, for the restore,
1012 * an entire slot is reset at a time.
1014 static void eeh_save_bars(struct pci_dn
*pdn
)
1021 for (i
= 0; i
< 16; i
++)
1022 rtas_read_config(pdn
, i
* 4, 4, &pdn
->config_space
[i
]);
1026 * eeh_configure_bridge - Configure PCI bridges for the indicated PE
1027 * @pdn: PCI device node
1029 * PCI bridges might be included in PE. In order to make the PE work
1030 * again. The included PCI bridges should be recovered after the PE
1031 * encounters frozen state.
1033 void eeh_configure_bridge(struct pci_dn
*pdn
)
1039 /* Use PE configuration address, if present */
1040 config_addr
= pdn
->eeh_config_addr
;
1041 if (pdn
->eeh_pe_config_addr
)
1042 config_addr
= pdn
->eeh_pe_config_addr
;
1044 /* Use new configure-pe function, if supported */
1045 if (ibm_configure_pe
!= RTAS_UNKNOWN_SERVICE
)
1046 token
= ibm_configure_pe
;
1048 token
= ibm_configure_bridge
;
1050 rc
= rtas_call(token
, 3, 1, NULL
,
1052 BUID_HI(pdn
->phb
->buid
),
1053 BUID_LO(pdn
->phb
->buid
));
1055 printk(KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
1056 rc
, pdn
->node
->full_name
);
1060 #define EEH_ENABLE 1
1062 struct eeh_early_enable_info
{
1063 unsigned int buid_hi
;
1064 unsigned int buid_lo
;
1068 * eeh_get_pe_addr - Retrieve PE address with given BDF address
1069 * @config_addr: BDF address
1070 * @info: BUID of the associated PHB
1072 * There're 2 kinds of addresses existing in EEH core components:
1073 * BDF address and PE address. Besides, there has dedicated platform
1074 * dependent function call to retrieve the PE address according to
1075 * the given BDF address. Further more, we prefer PE address on BDF
1076 * address in EEH core components.
1078 static int eeh_get_pe_addr(int config_addr
,
1079 struct eeh_early_enable_info
*info
)
1081 unsigned int rets
[3];
1084 /* Use latest config-addr token on power6 */
1085 if (ibm_get_config_addr_info2
!= RTAS_UNKNOWN_SERVICE
) {
1086 /* Make sure we have a PE in hand */
1087 ret
= rtas_call(ibm_get_config_addr_info2
, 4, 2, rets
,
1088 config_addr
, info
->buid_hi
, info
->buid_lo
, 1);
1089 if (ret
|| (rets
[0]==0))
1092 ret
= rtas_call(ibm_get_config_addr_info2
, 4, 2, rets
,
1093 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
1099 /* Use older config-addr token on power5 */
1100 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
1101 ret
= rtas_call(ibm_get_config_addr_info
, 4, 2, rets
,
1102 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
1111 * eeh_early_enable - Early enable EEH on the indicated device
1115 * Enable EEH functionality on the specified PCI device. The function
1116 * is expected to be called before real PCI probing is done. However,
1117 * the PHBs have been initialized at this point.
1119 static void *eeh_early_enable(struct device_node
*dn
, void *data
)
1121 unsigned int rets
[3];
1122 struct eeh_early_enable_info
*info
= data
;
1124 const u32
*class_code
= of_get_property(dn
, "class-code", NULL
);
1125 const u32
*vendor_id
= of_get_property(dn
, "vendor-id", NULL
);
1126 const u32
*device_id
= of_get_property(dn
, "device-id", NULL
);
1129 struct pci_dn
*pdn
= PCI_DN(dn
);
1131 pdn
->class_code
= 0;
1133 pdn
->eeh_check_count
= 0;
1134 pdn
->eeh_freeze_count
= 0;
1135 pdn
->eeh_false_positives
= 0;
1137 if (!of_device_is_available(dn
))
1140 /* Ignore bad nodes. */
1141 if (!class_code
|| !vendor_id
|| !device_id
)
1144 /* There is nothing to check on PCI to ISA bridges */
1145 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
1146 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
1149 pdn
->class_code
= *class_code
;
1151 /* Ok... see if this device supports EEH. Some do, some don't,
1152 * and the only way to find out is to check each and every one.
1154 regs
= of_get_property(dn
, "reg", NULL
);
1156 /* First register entry is addr (00BBSS00) */
1157 /* Try to enable eeh */
1158 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
1159 regs
[0], info
->buid_hi
, info
->buid_lo
,
1164 pdn
->eeh_config_addr
= regs
[0];
1166 /* If the newer, better, ibm,get-config-addr-info is supported,
1167 * then use that instead.
1169 pdn
->eeh_pe_config_addr
= eeh_get_pe_addr(pdn
->eeh_config_addr
, info
);
1171 /* Some older systems (Power4) allow the
1172 * ibm,set-eeh-option call to succeed even on nodes
1173 * where EEH is not supported. Verify support
1176 ret
= eeh_read_slot_reset_state(pdn
, rets
);
1177 if ((ret
== 0) && (rets
[1] == 1))
1182 eeh_subsystem_enabled
= 1;
1183 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1185 pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
1186 dn
->full_name
, pdn
->eeh_config_addr
,
1187 pdn
->eeh_pe_config_addr
);
1190 /* This device doesn't support EEH, but it may have an
1191 * EEH parent, in which case we mark it as supported.
1193 if (dn
->parent
&& PCI_DN(dn
->parent
)
1194 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
1195 /* Parent supports EEH. */
1196 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1197 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
1202 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
1211 * eeh_init - EEH initialization
1213 * Initialize EEH by trying to enable it for all of the adapters in the system.
1214 * As a side effect we can determine here if eeh is supported at all.
1215 * Note that we leave EEH on so failed config cycles won't cause a machine
1216 * check. If a user turns off EEH for a particular adapter they are really
1217 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1218 * grant access to a slot if EEH isn't enabled, and so we always enable
1219 * EEH for all slots/all devices.
1221 * The eeh-force-off option disables EEH checking globally, for all slots.
1222 * Even if force-off is set, the EEH hardware is still enabled, so that
1223 * newer systems can boot.
1225 void __init
eeh_init(void)
1227 struct device_node
*phb
, *np
;
1228 struct eeh_early_enable_info info
;
1230 raw_spin_lock_init(&confirm_error_lock
);
1231 spin_lock_init(&slot_errbuf_lock
);
1233 np
= of_find_node_by_path("/rtas");
1237 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
1238 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
1239 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
1240 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
1241 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
1242 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
1243 ibm_get_config_addr_info2
= rtas_token("ibm,get-config-addr-info2");
1244 ibm_configure_bridge
= rtas_token("ibm,configure-bridge");
1245 ibm_configure_pe
= rtas_token("ibm,configure-pe");
1247 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
1250 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
1251 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
1252 eeh_error_buf_size
= 1024;
1254 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
1255 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
1256 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
1257 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
1260 /* Enable EEH for all adapters. Note that eeh requires buid's */
1261 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
1262 phb
= of_find_node_by_name(phb
, "pci")) {
1265 buid
= get_phb_buid(phb
);
1266 if (buid
== 0 || PCI_DN(phb
) == NULL
)
1269 info
.buid_lo
= BUID_LO(buid
);
1270 info
.buid_hi
= BUID_HI(buid
);
1271 traverse_pci_devices(phb
, eeh_early_enable
, &info
);
1274 if (eeh_subsystem_enabled
)
1275 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
1277 printk(KERN_WARNING
"EEH: No capable adapters found\n");
1281 * eeh_add_device_early - Enable EEH for the indicated device_node
1282 * @dn: device node for which to set up EEH
1284 * This routine must be used to perform EEH initialization for PCI
1285 * devices that were added after system boot (e.g. hotplug, dlpar).
1286 * This routine must be called before any i/o is performed to the
1287 * adapter (inluding any config-space i/o).
1288 * Whether this actually enables EEH or not for this device depends
1289 * on the CEC architecture, type of the device, on earlier boot
1290 * command-line arguments & etc.
1292 static void eeh_add_device_early(struct device_node
*dn
)
1294 struct pci_controller
*phb
;
1295 struct eeh_early_enable_info info
;
1297 if (!dn
|| !PCI_DN(dn
))
1299 phb
= PCI_DN(dn
)->phb
;
1301 /* USB Bus children of PCI devices will not have BUID's */
1302 if (NULL
== phb
|| 0 == phb
->buid
)
1305 info
.buid_hi
= BUID_HI(phb
->buid
);
1306 info
.buid_lo
= BUID_LO(phb
->buid
);
1307 eeh_early_enable(dn
, &info
);
1311 * eeh_add_device_tree_early - Enable EEH for the indicated device
1314 * This routine must be used to perform EEH initialization for the
1315 * indicated PCI device that was added after system boot (e.g.
1318 void eeh_add_device_tree_early(struct device_node
*dn
)
1320 struct device_node
*sib
;
1322 for_each_child_of_node(dn
, sib
)
1323 eeh_add_device_tree_early(sib
);
1324 eeh_add_device_early(dn
);
1326 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1329 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1330 * @dev: pci device for which to set up EEH
1332 * This routine must be used to complete EEH initialization for PCI
1333 * devices that were added after system boot (e.g. hotplug, dlpar).
1335 static void eeh_add_device_late(struct pci_dev
*dev
)
1337 struct device_node
*dn
;
1340 if (!dev
|| !eeh_subsystem_enabled
)
1343 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
1345 dn
= pci_device_to_OF_node(dev
);
1347 if (pdn
->pcidev
== dev
) {
1348 pr_debug("EEH: Already referenced !\n");
1351 WARN_ON(pdn
->pcidev
);
1356 pci_addr_cache_insert_device(dev
);
1357 eeh_sysfs_add_device(dev
);
1361 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1364 * This routine must be used to perform EEH initialization for PCI
1365 * devices which are attached to the indicated PCI bus. The PCI bus
1366 * is added after system boot through hotplug or dlpar.
1368 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1370 struct pci_dev
*dev
;
1372 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1373 eeh_add_device_late(dev
);
1374 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1375 struct pci_bus
*subbus
= dev
->subordinate
;
1377 eeh_add_device_tree_late(subbus
);
1381 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1384 * eeh_remove_device - Undo EEH setup for the indicated pci device
1385 * @dev: pci device to be removed
1387 * This routine should be called when a device is removed from
1388 * a running system (e.g. by hotplug or dlpar). It unregisters
1389 * the PCI device from the EEH subsystem. I/O errors affecting
1390 * this device will no longer be detected after this call; thus,
1391 * i/o errors affecting this slot may leave this device unusable.
1393 static void eeh_remove_device(struct pci_dev
*dev
)
1395 struct device_node
*dn
;
1396 if (!dev
|| !eeh_subsystem_enabled
)
1399 /* Unregister the device with the EEH/PCI address search system */
1400 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1402 dn
= pci_device_to_OF_node(dev
);
1403 if (PCI_DN(dn
)->pcidev
== NULL
) {
1404 pr_debug("EEH: Not referenced !\n");
1407 PCI_DN(dn
)->pcidev
= NULL
;
1410 pci_addr_cache_remove_device(dev
);
1411 eeh_sysfs_remove_device(dev
);
1415 * eeh_remove_bus_device - Undo EEH setup for the indicated PCI device
1418 * This routine must be called when a device is removed from the
1419 * running system through hotplug or dlpar. The corresponding
1420 * PCI address cache will be removed.
1422 void eeh_remove_bus_device(struct pci_dev
*dev
)
1424 struct pci_bus
*bus
= dev
->subordinate
;
1425 struct pci_dev
*child
, *tmp
;
1427 eeh_remove_device(dev
);
1429 if (bus
&& dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1430 list_for_each_entry_safe(child
, tmp
, &bus
->devices
, bus_list
)
1431 eeh_remove_bus_device(child
);
1434 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
1436 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1438 if (0 == eeh_subsystem_enabled
) {
1439 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1440 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs
);
1442 seq_printf(m
, "EEH Subsystem is enabled\n");
1445 "no device node=%ld\n"
1446 "no config address=%ld\n"
1447 "check not wanted=%ld\n"
1448 "eeh_total_mmio_ffs=%ld\n"
1449 "eeh_false_positives=%ld\n"
1450 "eeh_slot_resets=%ld\n",
1451 no_device
, no_dn
, no_cfg_addr
,
1452 ignored_check
, total_mmio_ffs
,
1460 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1462 return single_open(file
, proc_eeh_show
, NULL
);
1465 static const struct file_operations proc_eeh_operations
= {
1466 .open
= proc_eeh_open
,
1468 .llseek
= seq_lseek
,
1469 .release
= single_release
,
1472 static int __init
eeh_init_proc(void)
1474 if (machine_is(pseries
))
1475 proc_create("powerpc/eeh", 0, NULL
, &proc_eeh_operations
);
1478 __initcall(eeh_init_proc
);