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Merge remote-tracking branches 'spi/topic/img-spfi', 'spi/topic/imx', 'spi/topic...
[deliverable/linux.git] / arch / powerpc / xmon / xmon.c
1 /*
2 * Routines providing a simple monitor for use on the PowerMac.
3 *
4 * Copyright (C) 1996-2005 Paul Mackerras.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13 #include <linux/errno.h>
14 #include <linux/sched.h>
15 #include <linux/smp.h>
16 #include <linux/mm.h>
17 #include <linux/reboot.h>
18 #include <linux/delay.h>
19 #include <linux/kallsyms.h>
20 #include <linux/kmsg_dump.h>
21 #include <linux/cpumask.h>
22 #include <linux/export.h>
23 #include <linux/sysrq.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/bug.h>
27 #include <linux/nmi.h>
28
29 #include <asm/ptrace.h>
30 #include <asm/string.h>
31 #include <asm/prom.h>
32 #include <asm/machdep.h>
33 #include <asm/xmon.h>
34 #include <asm/processor.h>
35 #include <asm/pgtable.h>
36 #include <asm/mmu.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/rtas.h>
40 #include <asm/sstep.h>
41 #include <asm/irq_regs.h>
42 #include <asm/spu.h>
43 #include <asm/spu_priv1.h>
44 #include <asm/setjmp.h>
45 #include <asm/reg.h>
46 #include <asm/debug.h>
47 #include <asm/hw_breakpoint.h>
48
49 #ifdef CONFIG_PPC64
50 #include <asm/hvcall.h>
51 #include <asm/paca.h>
52 #endif
53
54 #if defined(CONFIG_PPC_SPLPAR)
55 #include <asm/plpar_wrappers.h>
56 #else
57 static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
58 #endif
59
60 #include "nonstdio.h"
61 #include "dis-asm.h"
62
63 #ifdef CONFIG_SMP
64 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
65 static unsigned long xmon_taken = 1;
66 static int xmon_owner;
67 static int xmon_gate;
68 #else
69 #define xmon_owner 0
70 #endif /* CONFIG_SMP */
71
72 static unsigned long in_xmon __read_mostly = 0;
73
74 static unsigned long adrs;
75 static int size = 1;
76 #define MAX_DUMP (128 * 1024)
77 static unsigned long ndump = 64;
78 static unsigned long nidump = 16;
79 static unsigned long ncsum = 4096;
80 static int termch;
81 static char tmpstr[128];
82
83 static long bus_error_jmp[JMP_BUF_LEN];
84 static int catch_memory_errors;
85 static long *xmon_fault_jmp[NR_CPUS];
86
87 /* Breakpoint stuff */
88 struct bpt {
89 unsigned long address;
90 unsigned int instr[2];
91 atomic_t ref_count;
92 int enabled;
93 unsigned long pad;
94 };
95
96 /* Bits in bpt.enabled */
97 #define BP_CIABR 1
98 #define BP_TRAP 2
99 #define BP_DABR 4
100
101 #define NBPTS 256
102 static struct bpt bpts[NBPTS];
103 static struct bpt dabr;
104 static struct bpt *iabr;
105 static unsigned bpinstr = 0x7fe00008; /* trap */
106
107 #define BP_NUM(bp) ((bp) - bpts + 1)
108
109 /* Prototypes */
110 static int cmds(struct pt_regs *);
111 static int mread(unsigned long, void *, int);
112 static int mwrite(unsigned long, void *, int);
113 static int handle_fault(struct pt_regs *);
114 static void byterev(unsigned char *, int);
115 static void memex(void);
116 static int bsesc(void);
117 static void dump(void);
118 static void prdump(unsigned long, long);
119 static int ppc_inst_dump(unsigned long, long, int);
120 static void dump_log_buf(void);
121 static void backtrace(struct pt_regs *);
122 static void excprint(struct pt_regs *);
123 static void prregs(struct pt_regs *);
124 static void memops(int);
125 static void memlocate(void);
126 static void memzcan(void);
127 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
128 int skipbl(void);
129 int scanhex(unsigned long *valp);
130 static void scannl(void);
131 static int hexdigit(int);
132 void getstring(char *, int);
133 static void flush_input(void);
134 static int inchar(void);
135 static void take_input(char *);
136 static unsigned long read_spr(int);
137 static void write_spr(int, unsigned long);
138 static void super_regs(void);
139 static void remove_bpts(void);
140 static void insert_bpts(void);
141 static void remove_cpu_bpts(void);
142 static void insert_cpu_bpts(void);
143 static struct bpt *at_breakpoint(unsigned long pc);
144 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
145 static int do_step(struct pt_regs *);
146 static void bpt_cmds(void);
147 static void cacheflush(void);
148 static int cpu_cmd(void);
149 static void csum(void);
150 static void bootcmds(void);
151 static void proccall(void);
152 void dump_segments(void);
153 static void symbol_lookup(void);
154 static void xmon_show_stack(unsigned long sp, unsigned long lr,
155 unsigned long pc);
156 static void xmon_print_symbol(unsigned long address, const char *mid,
157 const char *after);
158 static const char *getvecname(unsigned long vec);
159
160 static int do_spu_cmd(void);
161
162 #ifdef CONFIG_44x
163 static void dump_tlb_44x(void);
164 #endif
165 #ifdef CONFIG_PPC_BOOK3E
166 static void dump_tlb_book3e(void);
167 #endif
168
169 static int xmon_no_auto_backtrace;
170
171 extern void xmon_enter(void);
172 extern void xmon_leave(void);
173
174 #ifdef CONFIG_PPC64
175 #define REG "%.16lx"
176 #else
177 #define REG "%.8lx"
178 #endif
179
180 #ifdef __LITTLE_ENDIAN__
181 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
182 #else
183 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
184 #endif
185
186 #define isxdigit(c) (('0' <= (c) && (c) <= '9') \
187 || ('a' <= (c) && (c) <= 'f') \
188 || ('A' <= (c) && (c) <= 'F'))
189 #define isalnum(c) (('0' <= (c) && (c) <= '9') \
190 || ('a' <= (c) && (c) <= 'z') \
191 || ('A' <= (c) && (c) <= 'Z'))
192 #define isspace(c) (c == ' ' || c == '\t' || c == 10 || c == 13 || c == 0)
193
194 static char *help_string = "\
195 Commands:\n\
196 b show breakpoints\n\
197 bd set data breakpoint\n\
198 bi set instruction breakpoint\n\
199 bc clear breakpoint\n"
200 #ifdef CONFIG_SMP
201 "\
202 c print cpus stopped in xmon\n\
203 c# try to switch to cpu number h (in hex)\n"
204 #endif
205 "\
206 C checksum\n\
207 d dump bytes\n\
208 di dump instructions\n\
209 df dump float values\n\
210 dd dump double values\n\
211 dl dump the kernel log buffer\n"
212 #ifdef CONFIG_PPC64
213 "\
214 dp[#] dump paca for current cpu, or cpu #\n\
215 dpa dump paca for all possible cpus\n"
216 #endif
217 "\
218 dr dump stream of raw bytes\n\
219 e print exception information\n\
220 f flush cache\n\
221 la lookup symbol+offset of specified address\n\
222 ls lookup address of specified symbol\n\
223 m examine/change memory\n\
224 mm move a block of memory\n\
225 ms set a block of memory\n\
226 md compare two blocks of memory\n\
227 ml locate a block of memory\n\
228 mz zero a block of memory\n\
229 mi show information about memory allocation\n\
230 p call a procedure\n\
231 r print registers\n\
232 s single step\n"
233 #ifdef CONFIG_SPU_BASE
234 " ss stop execution on all spus\n\
235 sr restore execution on stopped spus\n\
236 sf # dump spu fields for spu # (in hex)\n\
237 sd # dump spu local store for spu # (in hex)\n\
238 sdi # disassemble spu local store for spu # (in hex)\n"
239 #endif
240 " S print special registers\n\
241 t print backtrace\n\
242 x exit monitor and recover\n\
243 X exit monitor and dont recover\n"
244 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
245 " u dump segment table or SLB\n"
246 #elif defined(CONFIG_PPC_STD_MMU_32)
247 " u dump segment registers\n"
248 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
249 " u dump TLB\n"
250 #endif
251 " ? help\n"
252 " zr reboot\n\
253 zh halt\n"
254 ;
255
256 static struct pt_regs *xmon_regs;
257
258 static inline void sync(void)
259 {
260 asm volatile("sync; isync");
261 }
262
263 static inline void store_inst(void *p)
264 {
265 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
266 }
267
268 static inline void cflush(void *p)
269 {
270 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
271 }
272
273 static inline void cinval(void *p)
274 {
275 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
276 }
277
278 /**
279 * write_ciabr() - write the CIABR SPR
280 * @ciabr: The value to write.
281 *
282 * This function writes a value to the CIARB register either directly
283 * through mtspr instruction if the kernel is in HV privilege mode or
284 * call a hypervisor function to achieve the same in case the kernel
285 * is in supervisor privilege mode.
286 */
287 static void write_ciabr(unsigned long ciabr)
288 {
289 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
290 return;
291
292 if (cpu_has_feature(CPU_FTR_HVMODE)) {
293 mtspr(SPRN_CIABR, ciabr);
294 return;
295 }
296 plapr_set_ciabr(ciabr);
297 }
298
299 /**
300 * set_ciabr() - set the CIABR
301 * @addr: The value to set.
302 *
303 * This function sets the correct privilege value into the the HW
304 * breakpoint address before writing it up in the CIABR register.
305 */
306 static void set_ciabr(unsigned long addr)
307 {
308 addr &= ~CIABR_PRIV;
309
310 if (cpu_has_feature(CPU_FTR_HVMODE))
311 addr |= CIABR_PRIV_HYPER;
312 else
313 addr |= CIABR_PRIV_SUPER;
314 write_ciabr(addr);
315 }
316
317 /*
318 * Disable surveillance (the service processor watchdog function)
319 * while we are in xmon.
320 * XXX we should re-enable it when we leave. :)
321 */
322 #define SURVEILLANCE_TOKEN 9000
323
324 static inline void disable_surveillance(void)
325 {
326 #ifdef CONFIG_PPC_PSERIES
327 /* Since this can't be a module, args should end up below 4GB. */
328 static struct rtas_args args;
329
330 /*
331 * At this point we have got all the cpus we can into
332 * xmon, so there is hopefully no other cpu calling RTAS
333 * at the moment, even though we don't take rtas.lock.
334 * If we did try to take rtas.lock there would be a
335 * real possibility of deadlock.
336 */
337 args.token = rtas_token("set-indicator");
338 if (args.token == RTAS_UNKNOWN_SERVICE)
339 return;
340 args.token = cpu_to_be32(args.token);
341 args.nargs = cpu_to_be32(3);
342 args.nret = cpu_to_be32(1);
343 args.rets = &args.args[3];
344 args.args[0] = cpu_to_be32(SURVEILLANCE_TOKEN);
345 args.args[1] = 0;
346 args.args[2] = 0;
347 enter_rtas(__pa(&args));
348 #endif /* CONFIG_PPC_PSERIES */
349 }
350
351 #ifdef CONFIG_SMP
352 static int xmon_speaker;
353
354 static void get_output_lock(void)
355 {
356 int me = smp_processor_id() + 0x100;
357 int last_speaker = 0, prev;
358 long timeout;
359
360 if (xmon_speaker == me)
361 return;
362
363 for (;;) {
364 last_speaker = cmpxchg(&xmon_speaker, 0, me);
365 if (last_speaker == 0)
366 return;
367
368 /*
369 * Wait a full second for the lock, we might be on a slow
370 * console, but check every 100us.
371 */
372 timeout = 10000;
373 while (xmon_speaker == last_speaker) {
374 if (--timeout > 0) {
375 udelay(100);
376 continue;
377 }
378
379 /* hostile takeover */
380 prev = cmpxchg(&xmon_speaker, last_speaker, me);
381 if (prev == last_speaker)
382 return;
383 break;
384 }
385 }
386 }
387
388 static void release_output_lock(void)
389 {
390 xmon_speaker = 0;
391 }
392
393 int cpus_are_in_xmon(void)
394 {
395 return !cpumask_empty(&cpus_in_xmon);
396 }
397 #endif
398
399 static inline int unrecoverable_excp(struct pt_regs *regs)
400 {
401 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
402 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
403 return 0;
404 #else
405 return ((regs->msr & MSR_RI) == 0);
406 #endif
407 }
408
409 static int xmon_core(struct pt_regs *regs, int fromipi)
410 {
411 int cmd = 0;
412 struct bpt *bp;
413 long recurse_jmp[JMP_BUF_LEN];
414 unsigned long offset;
415 unsigned long flags;
416 #ifdef CONFIG_SMP
417 int cpu;
418 int secondary;
419 unsigned long timeout;
420 #endif
421
422 local_irq_save(flags);
423 hard_irq_disable();
424
425 bp = in_breakpoint_table(regs->nip, &offset);
426 if (bp != NULL) {
427 regs->nip = bp->address + offset;
428 atomic_dec(&bp->ref_count);
429 }
430
431 remove_cpu_bpts();
432
433 #ifdef CONFIG_SMP
434 cpu = smp_processor_id();
435 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
436 get_output_lock();
437 excprint(regs);
438 printf("cpu 0x%x: Exception %lx %s in xmon, "
439 "returning to main loop\n",
440 cpu, regs->trap, getvecname(TRAP(regs)));
441 release_output_lock();
442 longjmp(xmon_fault_jmp[cpu], 1);
443 }
444
445 if (setjmp(recurse_jmp) != 0) {
446 if (!in_xmon || !xmon_gate) {
447 get_output_lock();
448 printf("xmon: WARNING: bad recursive fault "
449 "on cpu 0x%x\n", cpu);
450 release_output_lock();
451 goto waiting;
452 }
453 secondary = !(xmon_taken && cpu == xmon_owner);
454 goto cmdloop;
455 }
456
457 xmon_fault_jmp[cpu] = recurse_jmp;
458
459 bp = NULL;
460 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
461 bp = at_breakpoint(regs->nip);
462 if (bp || unrecoverable_excp(regs))
463 fromipi = 0;
464
465 if (!fromipi) {
466 get_output_lock();
467 excprint(regs);
468 if (bp) {
469 printf("cpu 0x%x stopped at breakpoint 0x%lx (",
470 cpu, BP_NUM(bp));
471 xmon_print_symbol(regs->nip, " ", ")\n");
472 }
473 if (unrecoverable_excp(regs))
474 printf("WARNING: exception is not recoverable, "
475 "can't continue\n");
476 release_output_lock();
477 }
478
479 cpumask_set_cpu(cpu, &cpus_in_xmon);
480
481 waiting:
482 secondary = 1;
483 while (secondary && !xmon_gate) {
484 if (in_xmon == 0) {
485 if (fromipi)
486 goto leave;
487 secondary = test_and_set_bit(0, &in_xmon);
488 }
489 barrier();
490 }
491
492 if (!secondary && !xmon_gate) {
493 /* we are the first cpu to come in */
494 /* interrupt other cpu(s) */
495 int ncpus = num_online_cpus();
496
497 xmon_owner = cpu;
498 mb();
499 if (ncpus > 1) {
500 smp_send_debugger_break();
501 /* wait for other cpus to come in */
502 for (timeout = 100000000; timeout != 0; --timeout) {
503 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
504 break;
505 barrier();
506 }
507 }
508 remove_bpts();
509 disable_surveillance();
510 /* for breakpoint or single step, print the current instr. */
511 if (bp || TRAP(regs) == 0xd00)
512 ppc_inst_dump(regs->nip, 1, 0);
513 printf("enter ? for help\n");
514 mb();
515 xmon_gate = 1;
516 barrier();
517 }
518
519 cmdloop:
520 while (in_xmon) {
521 if (secondary) {
522 if (cpu == xmon_owner) {
523 if (!test_and_set_bit(0, &xmon_taken)) {
524 secondary = 0;
525 continue;
526 }
527 /* missed it */
528 while (cpu == xmon_owner)
529 barrier();
530 }
531 barrier();
532 } else {
533 cmd = cmds(regs);
534 if (cmd != 0) {
535 /* exiting xmon */
536 insert_bpts();
537 xmon_gate = 0;
538 wmb();
539 in_xmon = 0;
540 break;
541 }
542 /* have switched to some other cpu */
543 secondary = 1;
544 }
545 }
546 leave:
547 cpumask_clear_cpu(cpu, &cpus_in_xmon);
548 xmon_fault_jmp[cpu] = NULL;
549 #else
550 /* UP is simple... */
551 if (in_xmon) {
552 printf("Exception %lx %s in xmon, returning to main loop\n",
553 regs->trap, getvecname(TRAP(regs)));
554 longjmp(xmon_fault_jmp[0], 1);
555 }
556 if (setjmp(recurse_jmp) == 0) {
557 xmon_fault_jmp[0] = recurse_jmp;
558 in_xmon = 1;
559
560 excprint(regs);
561 bp = at_breakpoint(regs->nip);
562 if (bp) {
563 printf("Stopped at breakpoint %lx (", BP_NUM(bp));
564 xmon_print_symbol(regs->nip, " ", ")\n");
565 }
566 if (unrecoverable_excp(regs))
567 printf("WARNING: exception is not recoverable, "
568 "can't continue\n");
569 remove_bpts();
570 disable_surveillance();
571 /* for breakpoint or single step, print the current instr. */
572 if (bp || TRAP(regs) == 0xd00)
573 ppc_inst_dump(regs->nip, 1, 0);
574 printf("enter ? for help\n");
575 }
576
577 cmd = cmds(regs);
578
579 insert_bpts();
580 in_xmon = 0;
581 #endif
582
583 #ifdef CONFIG_BOOKE
584 if (regs->msr & MSR_DE) {
585 bp = at_breakpoint(regs->nip);
586 if (bp != NULL) {
587 regs->nip = (unsigned long) &bp->instr[0];
588 atomic_inc(&bp->ref_count);
589 }
590 }
591 #else
592 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
593 bp = at_breakpoint(regs->nip);
594 if (bp != NULL) {
595 int stepped = emulate_step(regs, bp->instr[0]);
596 if (stepped == 0) {
597 regs->nip = (unsigned long) &bp->instr[0];
598 atomic_inc(&bp->ref_count);
599 } else if (stepped < 0) {
600 printf("Couldn't single-step %s instruction\n",
601 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
602 }
603 }
604 }
605 #endif
606 insert_cpu_bpts();
607
608 touch_nmi_watchdog();
609 local_irq_restore(flags);
610
611 return cmd != 'X' && cmd != EOF;
612 }
613
614 int xmon(struct pt_regs *excp)
615 {
616 struct pt_regs regs;
617
618 if (excp == NULL) {
619 ppc_save_regs(&regs);
620 excp = &regs;
621 }
622
623 return xmon_core(excp, 0);
624 }
625 EXPORT_SYMBOL(xmon);
626
627 irqreturn_t xmon_irq(int irq, void *d)
628 {
629 unsigned long flags;
630 local_irq_save(flags);
631 printf("Keyboard interrupt\n");
632 xmon(get_irq_regs());
633 local_irq_restore(flags);
634 return IRQ_HANDLED;
635 }
636
637 static int xmon_bpt(struct pt_regs *regs)
638 {
639 struct bpt *bp;
640 unsigned long offset;
641
642 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
643 return 0;
644
645 /* Are we at the trap at bp->instr[1] for some bp? */
646 bp = in_breakpoint_table(regs->nip, &offset);
647 if (bp != NULL && offset == 4) {
648 regs->nip = bp->address + 4;
649 atomic_dec(&bp->ref_count);
650 return 1;
651 }
652
653 /* Are we at a breakpoint? */
654 bp = at_breakpoint(regs->nip);
655 if (!bp)
656 return 0;
657
658 xmon_core(regs, 0);
659
660 return 1;
661 }
662
663 static int xmon_sstep(struct pt_regs *regs)
664 {
665 if (user_mode(regs))
666 return 0;
667 xmon_core(regs, 0);
668 return 1;
669 }
670
671 static int xmon_break_match(struct pt_regs *regs)
672 {
673 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
674 return 0;
675 if (dabr.enabled == 0)
676 return 0;
677 xmon_core(regs, 0);
678 return 1;
679 }
680
681 static int xmon_iabr_match(struct pt_regs *regs)
682 {
683 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
684 return 0;
685 if (iabr == NULL)
686 return 0;
687 xmon_core(regs, 0);
688 return 1;
689 }
690
691 static int xmon_ipi(struct pt_regs *regs)
692 {
693 #ifdef CONFIG_SMP
694 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
695 xmon_core(regs, 1);
696 #endif
697 return 0;
698 }
699
700 static int xmon_fault_handler(struct pt_regs *regs)
701 {
702 struct bpt *bp;
703 unsigned long offset;
704
705 if (in_xmon && catch_memory_errors)
706 handle_fault(regs); /* doesn't return */
707
708 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
709 bp = in_breakpoint_table(regs->nip, &offset);
710 if (bp != NULL) {
711 regs->nip = bp->address + offset;
712 atomic_dec(&bp->ref_count);
713 }
714 }
715
716 return 0;
717 }
718
719 static struct bpt *at_breakpoint(unsigned long pc)
720 {
721 int i;
722 struct bpt *bp;
723
724 bp = bpts;
725 for (i = 0; i < NBPTS; ++i, ++bp)
726 if (bp->enabled && pc == bp->address)
727 return bp;
728 return NULL;
729 }
730
731 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
732 {
733 unsigned long off;
734
735 off = nip - (unsigned long) bpts;
736 if (off >= sizeof(bpts))
737 return NULL;
738 off %= sizeof(struct bpt);
739 if (off != offsetof(struct bpt, instr[0])
740 && off != offsetof(struct bpt, instr[1]))
741 return NULL;
742 *offp = off - offsetof(struct bpt, instr[0]);
743 return (struct bpt *) (nip - off);
744 }
745
746 static struct bpt *new_breakpoint(unsigned long a)
747 {
748 struct bpt *bp;
749
750 a &= ~3UL;
751 bp = at_breakpoint(a);
752 if (bp)
753 return bp;
754
755 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
756 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
757 bp->address = a;
758 bp->instr[1] = bpinstr;
759 store_inst(&bp->instr[1]);
760 return bp;
761 }
762 }
763
764 printf("Sorry, no free breakpoints. Please clear one first.\n");
765 return NULL;
766 }
767
768 static void insert_bpts(void)
769 {
770 int i;
771 struct bpt *bp;
772
773 bp = bpts;
774 for (i = 0; i < NBPTS; ++i, ++bp) {
775 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
776 continue;
777 if (mread(bp->address, &bp->instr[0], 4) != 4) {
778 printf("Couldn't read instruction at %lx, "
779 "disabling breakpoint there\n", bp->address);
780 bp->enabled = 0;
781 continue;
782 }
783 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
784 printf("Breakpoint at %lx is on an mtmsrd or rfid "
785 "instruction, disabling it\n", bp->address);
786 bp->enabled = 0;
787 continue;
788 }
789 store_inst(&bp->instr[0]);
790 if (bp->enabled & BP_CIABR)
791 continue;
792 if (mwrite(bp->address, &bpinstr, 4) != 4) {
793 printf("Couldn't write instruction at %lx, "
794 "disabling breakpoint there\n", bp->address);
795 bp->enabled &= ~BP_TRAP;
796 continue;
797 }
798 store_inst((void *)bp->address);
799 }
800 }
801
802 static void insert_cpu_bpts(void)
803 {
804 struct arch_hw_breakpoint brk;
805
806 if (dabr.enabled) {
807 brk.address = dabr.address;
808 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
809 brk.len = 8;
810 __set_breakpoint(&brk);
811 }
812
813 if (iabr)
814 set_ciabr(iabr->address);
815 }
816
817 static void remove_bpts(void)
818 {
819 int i;
820 struct bpt *bp;
821 unsigned instr;
822
823 bp = bpts;
824 for (i = 0; i < NBPTS; ++i, ++bp) {
825 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
826 continue;
827 if (mread(bp->address, &instr, 4) == 4
828 && instr == bpinstr
829 && mwrite(bp->address, &bp->instr, 4) != 4)
830 printf("Couldn't remove breakpoint at %lx\n",
831 bp->address);
832 else
833 store_inst((void *)bp->address);
834 }
835 }
836
837 static void remove_cpu_bpts(void)
838 {
839 hw_breakpoint_disable();
840 write_ciabr(0);
841 }
842
843 /* Command interpreting routine */
844 static char *last_cmd;
845
846 static int
847 cmds(struct pt_regs *excp)
848 {
849 int cmd = 0;
850
851 last_cmd = NULL;
852 xmon_regs = excp;
853
854 if (!xmon_no_auto_backtrace) {
855 xmon_no_auto_backtrace = 1;
856 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
857 }
858
859 for(;;) {
860 #ifdef CONFIG_SMP
861 printf("%x:", smp_processor_id());
862 #endif /* CONFIG_SMP */
863 printf("mon> ");
864 flush_input();
865 termch = 0;
866 cmd = skipbl();
867 if( cmd == '\n' ) {
868 if (last_cmd == NULL)
869 continue;
870 take_input(last_cmd);
871 last_cmd = NULL;
872 cmd = inchar();
873 }
874 switch (cmd) {
875 case 'm':
876 cmd = inchar();
877 switch (cmd) {
878 case 'm':
879 case 's':
880 case 'd':
881 memops(cmd);
882 break;
883 case 'l':
884 memlocate();
885 break;
886 case 'z':
887 memzcan();
888 break;
889 case 'i':
890 show_mem(0);
891 break;
892 default:
893 termch = cmd;
894 memex();
895 }
896 break;
897 case 'd':
898 dump();
899 break;
900 case 'l':
901 symbol_lookup();
902 break;
903 case 'r':
904 prregs(excp); /* print regs */
905 break;
906 case 'e':
907 excprint(excp);
908 break;
909 case 'S':
910 super_regs();
911 break;
912 case 't':
913 backtrace(excp);
914 break;
915 case 'f':
916 cacheflush();
917 break;
918 case 's':
919 if (do_spu_cmd() == 0)
920 break;
921 if (do_step(excp))
922 return cmd;
923 break;
924 case 'x':
925 case 'X':
926 return cmd;
927 case EOF:
928 printf(" <no input ...>\n");
929 mdelay(2000);
930 return cmd;
931 case '?':
932 xmon_puts(help_string);
933 break;
934 case 'b':
935 bpt_cmds();
936 break;
937 case 'C':
938 csum();
939 break;
940 case 'c':
941 if (cpu_cmd())
942 return 0;
943 break;
944 case 'z':
945 bootcmds();
946 break;
947 case 'p':
948 proccall();
949 break;
950 #ifdef CONFIG_PPC_STD_MMU
951 case 'u':
952 dump_segments();
953 break;
954 #elif defined(CONFIG_44x)
955 case 'u':
956 dump_tlb_44x();
957 break;
958 #elif defined(CONFIG_PPC_BOOK3E)
959 case 'u':
960 dump_tlb_book3e();
961 break;
962 #endif
963 default:
964 printf("Unrecognized command: ");
965 do {
966 if (' ' < cmd && cmd <= '~')
967 putchar(cmd);
968 else
969 printf("\\x%x", cmd);
970 cmd = inchar();
971 } while (cmd != '\n');
972 printf(" (type ? for help)\n");
973 break;
974 }
975 }
976 }
977
978 #ifdef CONFIG_BOOKE
979 static int do_step(struct pt_regs *regs)
980 {
981 regs->msr |= MSR_DE;
982 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
983 return 1;
984 }
985 #else
986 /*
987 * Step a single instruction.
988 * Some instructions we emulate, others we execute with MSR_SE set.
989 */
990 static int do_step(struct pt_regs *regs)
991 {
992 unsigned int instr;
993 int stepped;
994
995 /* check we are in 64-bit kernel mode, translation enabled */
996 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
997 if (mread(regs->nip, &instr, 4) == 4) {
998 stepped = emulate_step(regs, instr);
999 if (stepped < 0) {
1000 printf("Couldn't single-step %s instruction\n",
1001 (IS_RFID(instr)? "rfid": "mtmsrd"));
1002 return 0;
1003 }
1004 if (stepped > 0) {
1005 regs->trap = 0xd00 | (regs->trap & 1);
1006 printf("stepped to ");
1007 xmon_print_symbol(regs->nip, " ", "\n");
1008 ppc_inst_dump(regs->nip, 1, 0);
1009 return 0;
1010 }
1011 }
1012 }
1013 regs->msr |= MSR_SE;
1014 return 1;
1015 }
1016 #endif
1017
1018 static void bootcmds(void)
1019 {
1020 int cmd;
1021
1022 cmd = inchar();
1023 if (cmd == 'r')
1024 ppc_md.restart(NULL);
1025 else if (cmd == 'h')
1026 ppc_md.halt();
1027 else if (cmd == 'p')
1028 if (pm_power_off)
1029 pm_power_off();
1030 }
1031
1032 static int cpu_cmd(void)
1033 {
1034 #ifdef CONFIG_SMP
1035 unsigned long cpu, first_cpu, last_cpu;
1036 int timeout;
1037
1038 if (!scanhex(&cpu)) {
1039 /* print cpus waiting or in xmon */
1040 printf("cpus stopped:");
1041 last_cpu = first_cpu = NR_CPUS;
1042 for_each_possible_cpu(cpu) {
1043 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1044 if (cpu == last_cpu + 1) {
1045 last_cpu = cpu;
1046 } else {
1047 if (last_cpu != first_cpu)
1048 printf("-0x%lx", last_cpu);
1049 last_cpu = first_cpu = cpu;
1050 printf(" 0x%lx", cpu);
1051 }
1052 }
1053 }
1054 if (last_cpu != first_cpu)
1055 printf("-0x%lx", last_cpu);
1056 printf("\n");
1057 return 0;
1058 }
1059 /* try to switch to cpu specified */
1060 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1061 printf("cpu 0x%x isn't in xmon\n", cpu);
1062 return 0;
1063 }
1064 xmon_taken = 0;
1065 mb();
1066 xmon_owner = cpu;
1067 timeout = 10000000;
1068 while (!xmon_taken) {
1069 if (--timeout == 0) {
1070 if (test_and_set_bit(0, &xmon_taken))
1071 break;
1072 /* take control back */
1073 mb();
1074 xmon_owner = smp_processor_id();
1075 printf("cpu 0x%x didn't take control\n", cpu);
1076 return 0;
1077 }
1078 barrier();
1079 }
1080 return 1;
1081 #else
1082 return 0;
1083 #endif /* CONFIG_SMP */
1084 }
1085
1086 static unsigned short fcstab[256] = {
1087 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1088 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1089 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1090 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1091 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1092 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1093 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1094 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1095 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1096 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1097 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1098 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1099 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1100 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1101 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1102 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1103 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1104 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1105 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1106 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1107 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1108 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1109 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1110 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1111 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1112 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1113 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1114 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1115 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1116 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1117 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1118 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1119 };
1120
1121 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1122
1123 static void
1124 csum(void)
1125 {
1126 unsigned int i;
1127 unsigned short fcs;
1128 unsigned char v;
1129
1130 if (!scanhex(&adrs))
1131 return;
1132 if (!scanhex(&ncsum))
1133 return;
1134 fcs = 0xffff;
1135 for (i = 0; i < ncsum; ++i) {
1136 if (mread(adrs+i, &v, 1) == 0) {
1137 printf("csum stopped at "REG"\n", adrs+i);
1138 break;
1139 }
1140 fcs = FCS(fcs, v);
1141 }
1142 printf("%x\n", fcs);
1143 }
1144
1145 /*
1146 * Check if this is a suitable place to put a breakpoint.
1147 */
1148 static long check_bp_loc(unsigned long addr)
1149 {
1150 unsigned int instr;
1151
1152 addr &= ~3;
1153 if (!is_kernel_addr(addr)) {
1154 printf("Breakpoints may only be placed at kernel addresses\n");
1155 return 0;
1156 }
1157 if (!mread(addr, &instr, sizeof(instr))) {
1158 printf("Can't read instruction at address %lx\n", addr);
1159 return 0;
1160 }
1161 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1162 printf("Breakpoints may not be placed on mtmsrd or rfid "
1163 "instructions\n");
1164 return 0;
1165 }
1166 return 1;
1167 }
1168
1169 static char *breakpoint_help_string =
1170 "Breakpoint command usage:\n"
1171 "b show breakpoints\n"
1172 "b <addr> [cnt] set breakpoint at given instr addr\n"
1173 "bc clear all breakpoints\n"
1174 "bc <n/addr> clear breakpoint number n or at addr\n"
1175 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1176 "bd <addr> [cnt] set hardware data breakpoint\n"
1177 "";
1178
1179 static void
1180 bpt_cmds(void)
1181 {
1182 int cmd;
1183 unsigned long a;
1184 int mode, i;
1185 struct bpt *bp;
1186 const char badaddr[] = "Only kernel addresses are permitted "
1187 "for breakpoints\n";
1188
1189 cmd = inchar();
1190 switch (cmd) {
1191 #ifndef CONFIG_8xx
1192 case 'd': /* bd - hardware data breakpoint */
1193 mode = 7;
1194 cmd = inchar();
1195 if (cmd == 'r')
1196 mode = 5;
1197 else if (cmd == 'w')
1198 mode = 6;
1199 else
1200 termch = cmd;
1201 dabr.address = 0;
1202 dabr.enabled = 0;
1203 if (scanhex(&dabr.address)) {
1204 if (!is_kernel_addr(dabr.address)) {
1205 printf(badaddr);
1206 break;
1207 }
1208 dabr.address &= ~HW_BRK_TYPE_DABR;
1209 dabr.enabled = mode | BP_DABR;
1210 }
1211 break;
1212
1213 case 'i': /* bi - hardware instr breakpoint */
1214 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1215 printf("Hardware instruction breakpoint "
1216 "not supported on this cpu\n");
1217 break;
1218 }
1219 if (iabr) {
1220 iabr->enabled &= ~BP_CIABR;
1221 iabr = NULL;
1222 }
1223 if (!scanhex(&a))
1224 break;
1225 if (!check_bp_loc(a))
1226 break;
1227 bp = new_breakpoint(a);
1228 if (bp != NULL) {
1229 bp->enabled |= BP_CIABR;
1230 iabr = bp;
1231 }
1232 break;
1233 #endif
1234
1235 case 'c':
1236 if (!scanhex(&a)) {
1237 /* clear all breakpoints */
1238 for (i = 0; i < NBPTS; ++i)
1239 bpts[i].enabled = 0;
1240 iabr = NULL;
1241 dabr.enabled = 0;
1242 printf("All breakpoints cleared\n");
1243 break;
1244 }
1245
1246 if (a <= NBPTS && a >= 1) {
1247 /* assume a breakpoint number */
1248 bp = &bpts[a-1]; /* bp nums are 1 based */
1249 } else {
1250 /* assume a breakpoint address */
1251 bp = at_breakpoint(a);
1252 if (bp == NULL) {
1253 printf("No breakpoint at %lx\n", a);
1254 break;
1255 }
1256 }
1257
1258 printf("Cleared breakpoint %lx (", BP_NUM(bp));
1259 xmon_print_symbol(bp->address, " ", ")\n");
1260 bp->enabled = 0;
1261 break;
1262
1263 default:
1264 termch = cmd;
1265 cmd = skipbl();
1266 if (cmd == '?') {
1267 printf(breakpoint_help_string);
1268 break;
1269 }
1270 termch = cmd;
1271 if (!scanhex(&a)) {
1272 /* print all breakpoints */
1273 printf(" type address\n");
1274 if (dabr.enabled) {
1275 printf(" data "REG" [", dabr.address);
1276 if (dabr.enabled & 1)
1277 printf("r");
1278 if (dabr.enabled & 2)
1279 printf("w");
1280 printf("]\n");
1281 }
1282 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1283 if (!bp->enabled)
1284 continue;
1285 printf("%2x %s ", BP_NUM(bp),
1286 (bp->enabled & BP_CIABR) ? "inst": "trap");
1287 xmon_print_symbol(bp->address, " ", "\n");
1288 }
1289 break;
1290 }
1291
1292 if (!check_bp_loc(a))
1293 break;
1294 bp = new_breakpoint(a);
1295 if (bp != NULL)
1296 bp->enabled |= BP_TRAP;
1297 break;
1298 }
1299 }
1300
1301 /* Very cheap human name for vector lookup. */
1302 static
1303 const char *getvecname(unsigned long vec)
1304 {
1305 char *ret;
1306
1307 switch (vec) {
1308 case 0x100: ret = "(System Reset)"; break;
1309 case 0x200: ret = "(Machine Check)"; break;
1310 case 0x300: ret = "(Data Access)"; break;
1311 case 0x380: ret = "(Data SLB Access)"; break;
1312 case 0x400: ret = "(Instruction Access)"; break;
1313 case 0x480: ret = "(Instruction SLB Access)"; break;
1314 case 0x500: ret = "(Hardware Interrupt)"; break;
1315 case 0x600: ret = "(Alignment)"; break;
1316 case 0x700: ret = "(Program Check)"; break;
1317 case 0x800: ret = "(FPU Unavailable)"; break;
1318 case 0x900: ret = "(Decrementer)"; break;
1319 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1320 case 0xa00: ret = "(Doorbell)"; break;
1321 case 0xc00: ret = "(System Call)"; break;
1322 case 0xd00: ret = "(Single Step)"; break;
1323 case 0xe40: ret = "(Emulation Assist)"; break;
1324 case 0xe60: ret = "(HMI)"; break;
1325 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1326 case 0xf00: ret = "(Performance Monitor)"; break;
1327 case 0xf20: ret = "(Altivec Unavailable)"; break;
1328 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1329 case 0x1500: ret = "(Denormalisation)"; break;
1330 case 0x1700: ret = "(Altivec Assist)"; break;
1331 default: ret = "";
1332 }
1333 return ret;
1334 }
1335
1336 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1337 unsigned long *endp)
1338 {
1339 unsigned long size, offset;
1340 const char *name;
1341
1342 *startp = *endp = 0;
1343 if (pc == 0)
1344 return;
1345 if (setjmp(bus_error_jmp) == 0) {
1346 catch_memory_errors = 1;
1347 sync();
1348 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1349 if (name != NULL) {
1350 *startp = pc - offset;
1351 *endp = pc - offset + size;
1352 }
1353 sync();
1354 }
1355 catch_memory_errors = 0;
1356 }
1357
1358 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1359 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1360
1361 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1362 unsigned long pc)
1363 {
1364 int max_to_print = 64;
1365 unsigned long ip;
1366 unsigned long newsp;
1367 unsigned long marker;
1368 struct pt_regs regs;
1369
1370 while (max_to_print--) {
1371 if (sp < PAGE_OFFSET) {
1372 if (sp != 0)
1373 printf("SP (%lx) is in userspace\n", sp);
1374 break;
1375 }
1376
1377 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1378 || !mread(sp, &newsp, sizeof(unsigned long))) {
1379 printf("Couldn't read stack frame at %lx\n", sp);
1380 break;
1381 }
1382
1383 /*
1384 * For the first stack frame, try to work out if
1385 * LR and/or the saved LR value in the bottommost
1386 * stack frame are valid.
1387 */
1388 if ((pc | lr) != 0) {
1389 unsigned long fnstart, fnend;
1390 unsigned long nextip;
1391 int printip = 1;
1392
1393 get_function_bounds(pc, &fnstart, &fnend);
1394 nextip = 0;
1395 if (newsp > sp)
1396 mread(newsp + LRSAVE_OFFSET, &nextip,
1397 sizeof(unsigned long));
1398 if (lr == ip) {
1399 if (lr < PAGE_OFFSET
1400 || (fnstart <= lr && lr < fnend))
1401 printip = 0;
1402 } else if (lr == nextip) {
1403 printip = 0;
1404 } else if (lr >= PAGE_OFFSET
1405 && !(fnstart <= lr && lr < fnend)) {
1406 printf("[link register ] ");
1407 xmon_print_symbol(lr, " ", "\n");
1408 }
1409 if (printip) {
1410 printf("["REG"] ", sp);
1411 xmon_print_symbol(ip, " ", " (unreliable)\n");
1412 }
1413 pc = lr = 0;
1414
1415 } else {
1416 printf("["REG"] ", sp);
1417 xmon_print_symbol(ip, " ", "\n");
1418 }
1419
1420 /* Look for "regshere" marker to see if this is
1421 an exception frame. */
1422 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1423 && marker == STACK_FRAME_REGS_MARKER) {
1424 if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
1425 != sizeof(regs)) {
1426 printf("Couldn't read registers at %lx\n",
1427 sp + STACK_FRAME_OVERHEAD);
1428 break;
1429 }
1430 printf("--- Exception: %lx %s at ", regs.trap,
1431 getvecname(TRAP(&regs)));
1432 pc = regs.nip;
1433 lr = regs.link;
1434 xmon_print_symbol(pc, " ", "\n");
1435 }
1436
1437 if (newsp == 0)
1438 break;
1439
1440 sp = newsp;
1441 }
1442 }
1443
1444 static void backtrace(struct pt_regs *excp)
1445 {
1446 unsigned long sp;
1447
1448 if (scanhex(&sp))
1449 xmon_show_stack(sp, 0, 0);
1450 else
1451 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1452 scannl();
1453 }
1454
1455 static void print_bug_trap(struct pt_regs *regs)
1456 {
1457 #ifdef CONFIG_BUG
1458 const struct bug_entry *bug;
1459 unsigned long addr;
1460
1461 if (regs->msr & MSR_PR)
1462 return; /* not in kernel */
1463 addr = regs->nip; /* address of trap instruction */
1464 if (addr < PAGE_OFFSET)
1465 return;
1466 bug = find_bug(regs->nip);
1467 if (bug == NULL)
1468 return;
1469 if (is_warning_bug(bug))
1470 return;
1471
1472 #ifdef CONFIG_DEBUG_BUGVERBOSE
1473 printf("kernel BUG at %s:%u!\n",
1474 bug->file, bug->line);
1475 #else
1476 printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
1477 #endif
1478 #endif /* CONFIG_BUG */
1479 }
1480
1481 static void excprint(struct pt_regs *fp)
1482 {
1483 unsigned long trap;
1484
1485 #ifdef CONFIG_SMP
1486 printf("cpu 0x%x: ", smp_processor_id());
1487 #endif /* CONFIG_SMP */
1488
1489 trap = TRAP(fp);
1490 printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1491 printf(" pc: ");
1492 xmon_print_symbol(fp->nip, ": ", "\n");
1493
1494 printf(" lr: ", fp->link);
1495 xmon_print_symbol(fp->link, ": ", "\n");
1496
1497 printf(" sp: %lx\n", fp->gpr[1]);
1498 printf(" msr: %lx\n", fp->msr);
1499
1500 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1501 printf(" dar: %lx\n", fp->dar);
1502 if (trap != 0x380)
1503 printf(" dsisr: %lx\n", fp->dsisr);
1504 }
1505
1506 printf(" current = 0x%lx\n", current);
1507 #ifdef CONFIG_PPC64
1508 printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1509 local_paca, local_paca->soft_enabled, local_paca->irq_happened);
1510 #endif
1511 if (current) {
1512 printf(" pid = %ld, comm = %s\n",
1513 current->pid, current->comm);
1514 }
1515
1516 if (trap == 0x700)
1517 print_bug_trap(fp);
1518 }
1519
1520 static void prregs(struct pt_regs *fp)
1521 {
1522 int n, trap;
1523 unsigned long base;
1524 struct pt_regs regs;
1525
1526 if (scanhex(&base)) {
1527 if (setjmp(bus_error_jmp) == 0) {
1528 catch_memory_errors = 1;
1529 sync();
1530 regs = *(struct pt_regs *)base;
1531 sync();
1532 __delay(200);
1533 } else {
1534 catch_memory_errors = 0;
1535 printf("*** Error reading registers from "REG"\n",
1536 base);
1537 return;
1538 }
1539 catch_memory_errors = 0;
1540 fp = &regs;
1541 }
1542
1543 #ifdef CONFIG_PPC64
1544 if (FULL_REGS(fp)) {
1545 for (n = 0; n < 16; ++n)
1546 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1547 n, fp->gpr[n], n+16, fp->gpr[n+16]);
1548 } else {
1549 for (n = 0; n < 7; ++n)
1550 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1551 n, fp->gpr[n], n+7, fp->gpr[n+7]);
1552 }
1553 #else
1554 for (n = 0; n < 32; ++n) {
1555 printf("R%.2d = %.8x%s", n, fp->gpr[n],
1556 (n & 3) == 3? "\n": " ");
1557 if (n == 12 && !FULL_REGS(fp)) {
1558 printf("\n");
1559 break;
1560 }
1561 }
1562 #endif
1563 printf("pc = ");
1564 xmon_print_symbol(fp->nip, " ", "\n");
1565 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1566 printf("cfar= ");
1567 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1568 }
1569 printf("lr = ");
1570 xmon_print_symbol(fp->link, " ", "\n");
1571 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1572 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1573 fp->ctr, fp->xer, fp->trap);
1574 trap = TRAP(fp);
1575 if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1576 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1577 }
1578
1579 static void cacheflush(void)
1580 {
1581 int cmd;
1582 unsigned long nflush;
1583
1584 cmd = inchar();
1585 if (cmd != 'i')
1586 termch = cmd;
1587 scanhex((void *)&adrs);
1588 if (termch != '\n')
1589 termch = 0;
1590 nflush = 1;
1591 scanhex(&nflush);
1592 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1593 if (setjmp(bus_error_jmp) == 0) {
1594 catch_memory_errors = 1;
1595 sync();
1596
1597 if (cmd != 'i') {
1598 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1599 cflush((void *) adrs);
1600 } else {
1601 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1602 cinval((void *) adrs);
1603 }
1604 sync();
1605 /* wait a little while to see if we get a machine check */
1606 __delay(200);
1607 }
1608 catch_memory_errors = 0;
1609 }
1610
1611 static unsigned long
1612 read_spr(int n)
1613 {
1614 unsigned int instrs[2];
1615 unsigned long (*code)(void);
1616 unsigned long ret = -1UL;
1617 #ifdef CONFIG_PPC64
1618 unsigned long opd[3];
1619
1620 opd[0] = (unsigned long)instrs;
1621 opd[1] = 0;
1622 opd[2] = 0;
1623 code = (unsigned long (*)(void)) opd;
1624 #else
1625 code = (unsigned long (*)(void)) instrs;
1626 #endif
1627
1628 /* mfspr r3,n; blr */
1629 instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
1630 instrs[1] = 0x4e800020;
1631 store_inst(instrs);
1632 store_inst(instrs+1);
1633
1634 if (setjmp(bus_error_jmp) == 0) {
1635 catch_memory_errors = 1;
1636 sync();
1637
1638 ret = code();
1639
1640 sync();
1641 /* wait a little while to see if we get a machine check */
1642 __delay(200);
1643 n = size;
1644 }
1645
1646 return ret;
1647 }
1648
1649 static void
1650 write_spr(int n, unsigned long val)
1651 {
1652 unsigned int instrs[2];
1653 unsigned long (*code)(unsigned long);
1654 #ifdef CONFIG_PPC64
1655 unsigned long opd[3];
1656
1657 opd[0] = (unsigned long)instrs;
1658 opd[1] = 0;
1659 opd[2] = 0;
1660 code = (unsigned long (*)(unsigned long)) opd;
1661 #else
1662 code = (unsigned long (*)(unsigned long)) instrs;
1663 #endif
1664
1665 instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
1666 instrs[1] = 0x4e800020;
1667 store_inst(instrs);
1668 store_inst(instrs+1);
1669
1670 if (setjmp(bus_error_jmp) == 0) {
1671 catch_memory_errors = 1;
1672 sync();
1673
1674 code(val);
1675
1676 sync();
1677 /* wait a little while to see if we get a machine check */
1678 __delay(200);
1679 n = size;
1680 }
1681 }
1682
1683 static unsigned long regno;
1684 extern char exc_prolog;
1685 extern char dec_exc;
1686
1687 static void super_regs(void)
1688 {
1689 int cmd;
1690 unsigned long val;
1691
1692 cmd = skipbl();
1693 if (cmd == '\n') {
1694 unsigned long sp, toc;
1695 asm("mr %0,1" : "=r" (sp) :);
1696 asm("mr %0,2" : "=r" (toc) :);
1697
1698 printf("msr = "REG" sprg0= "REG"\n",
1699 mfmsr(), mfspr(SPRN_SPRG0));
1700 printf("pvr = "REG" sprg1= "REG"\n",
1701 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1702 printf("dec = "REG" sprg2= "REG"\n",
1703 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1704 printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));
1705 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
1706
1707 return;
1708 }
1709
1710 scanhex(&regno);
1711 switch (cmd) {
1712 case 'w':
1713 val = read_spr(regno);
1714 scanhex(&val);
1715 write_spr(regno, val);
1716 /* fall through */
1717 case 'r':
1718 printf("spr %lx = %lx\n", regno, read_spr(regno));
1719 break;
1720 }
1721 scannl();
1722 }
1723
1724 /*
1725 * Stuff for reading and writing memory safely
1726 */
1727 static int
1728 mread(unsigned long adrs, void *buf, int size)
1729 {
1730 volatile int n;
1731 char *p, *q;
1732
1733 n = 0;
1734 if (setjmp(bus_error_jmp) == 0) {
1735 catch_memory_errors = 1;
1736 sync();
1737 p = (char *)adrs;
1738 q = (char *)buf;
1739 switch (size) {
1740 case 2:
1741 *(u16 *)q = *(u16 *)p;
1742 break;
1743 case 4:
1744 *(u32 *)q = *(u32 *)p;
1745 break;
1746 case 8:
1747 *(u64 *)q = *(u64 *)p;
1748 break;
1749 default:
1750 for( ; n < size; ++n) {
1751 *q++ = *p++;
1752 sync();
1753 }
1754 }
1755 sync();
1756 /* wait a little while to see if we get a machine check */
1757 __delay(200);
1758 n = size;
1759 }
1760 catch_memory_errors = 0;
1761 return n;
1762 }
1763
1764 static int
1765 mwrite(unsigned long adrs, void *buf, int size)
1766 {
1767 volatile int n;
1768 char *p, *q;
1769
1770 n = 0;
1771 if (setjmp(bus_error_jmp) == 0) {
1772 catch_memory_errors = 1;
1773 sync();
1774 p = (char *) adrs;
1775 q = (char *) buf;
1776 switch (size) {
1777 case 2:
1778 *(u16 *)p = *(u16 *)q;
1779 break;
1780 case 4:
1781 *(u32 *)p = *(u32 *)q;
1782 break;
1783 case 8:
1784 *(u64 *)p = *(u64 *)q;
1785 break;
1786 default:
1787 for ( ; n < size; ++n) {
1788 *p++ = *q++;
1789 sync();
1790 }
1791 }
1792 sync();
1793 /* wait a little while to see if we get a machine check */
1794 __delay(200);
1795 n = size;
1796 } else {
1797 printf("*** Error writing address "REG"\n", adrs + n);
1798 }
1799 catch_memory_errors = 0;
1800 return n;
1801 }
1802
1803 static int fault_type;
1804 static int fault_except;
1805 static char *fault_chars[] = { "--", "**", "##" };
1806
1807 static int handle_fault(struct pt_regs *regs)
1808 {
1809 fault_except = TRAP(regs);
1810 switch (TRAP(regs)) {
1811 case 0x200:
1812 fault_type = 0;
1813 break;
1814 case 0x300:
1815 case 0x380:
1816 fault_type = 1;
1817 break;
1818 default:
1819 fault_type = 2;
1820 }
1821
1822 longjmp(bus_error_jmp, 1);
1823
1824 return 0;
1825 }
1826
1827 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
1828
1829 static void
1830 byterev(unsigned char *val, int size)
1831 {
1832 int t;
1833
1834 switch (size) {
1835 case 2:
1836 SWAP(val[0], val[1], t);
1837 break;
1838 case 4:
1839 SWAP(val[0], val[3], t);
1840 SWAP(val[1], val[2], t);
1841 break;
1842 case 8: /* is there really any use for this? */
1843 SWAP(val[0], val[7], t);
1844 SWAP(val[1], val[6], t);
1845 SWAP(val[2], val[5], t);
1846 SWAP(val[3], val[4], t);
1847 break;
1848 }
1849 }
1850
1851 static int brev;
1852 static int mnoread;
1853
1854 static char *memex_help_string =
1855 "Memory examine command usage:\n"
1856 "m [addr] [flags] examine/change memory\n"
1857 " addr is optional. will start where left off.\n"
1858 " flags may include chars from this set:\n"
1859 " b modify by bytes (default)\n"
1860 " w modify by words (2 byte)\n"
1861 " l modify by longs (4 byte)\n"
1862 " d modify by doubleword (8 byte)\n"
1863 " r toggle reverse byte order mode\n"
1864 " n do not read memory (for i/o spaces)\n"
1865 " . ok to read (default)\n"
1866 "NOTE: flags are saved as defaults\n"
1867 "";
1868
1869 static char *memex_subcmd_help_string =
1870 "Memory examine subcommands:\n"
1871 " hexval write this val to current location\n"
1872 " 'string' write chars from string to this location\n"
1873 " ' increment address\n"
1874 " ^ decrement address\n"
1875 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
1876 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
1877 " ` clear no-read flag\n"
1878 " ; stay at this addr\n"
1879 " v change to byte mode\n"
1880 " w change to word (2 byte) mode\n"
1881 " l change to long (4 byte) mode\n"
1882 " u change to doubleword (8 byte) mode\n"
1883 " m addr change current addr\n"
1884 " n toggle no-read flag\n"
1885 " r toggle byte reverse flag\n"
1886 " < count back up count bytes\n"
1887 " > count skip forward count bytes\n"
1888 " x exit this mode\n"
1889 "";
1890
1891 static void
1892 memex(void)
1893 {
1894 int cmd, inc, i, nslash;
1895 unsigned long n;
1896 unsigned char val[16];
1897
1898 scanhex((void *)&adrs);
1899 cmd = skipbl();
1900 if (cmd == '?') {
1901 printf(memex_help_string);
1902 return;
1903 } else {
1904 termch = cmd;
1905 }
1906 last_cmd = "m\n";
1907 while ((cmd = skipbl()) != '\n') {
1908 switch( cmd ){
1909 case 'b': size = 1; break;
1910 case 'w': size = 2; break;
1911 case 'l': size = 4; break;
1912 case 'd': size = 8; break;
1913 case 'r': brev = !brev; break;
1914 case 'n': mnoread = 1; break;
1915 case '.': mnoread = 0; break;
1916 }
1917 }
1918 if( size <= 0 )
1919 size = 1;
1920 else if( size > 8 )
1921 size = 8;
1922 for(;;){
1923 if (!mnoread)
1924 n = mread(adrs, val, size);
1925 printf(REG"%c", adrs, brev? 'r': ' ');
1926 if (!mnoread) {
1927 if (brev)
1928 byterev(val, size);
1929 putchar(' ');
1930 for (i = 0; i < n; ++i)
1931 printf("%.2x", val[i]);
1932 for (; i < size; ++i)
1933 printf("%s", fault_chars[fault_type]);
1934 }
1935 putchar(' ');
1936 inc = size;
1937 nslash = 0;
1938 for(;;){
1939 if( scanhex(&n) ){
1940 for (i = 0; i < size; ++i)
1941 val[i] = n >> (i * 8);
1942 if (!brev)
1943 byterev(val, size);
1944 mwrite(adrs, val, size);
1945 inc = size;
1946 }
1947 cmd = skipbl();
1948 if (cmd == '\n')
1949 break;
1950 inc = 0;
1951 switch (cmd) {
1952 case '\'':
1953 for(;;){
1954 n = inchar();
1955 if( n == '\\' )
1956 n = bsesc();
1957 else if( n == '\'' )
1958 break;
1959 for (i = 0; i < size; ++i)
1960 val[i] = n >> (i * 8);
1961 if (!brev)
1962 byterev(val, size);
1963 mwrite(adrs, val, size);
1964 adrs += size;
1965 }
1966 adrs -= size;
1967 inc = size;
1968 break;
1969 case ',':
1970 adrs += size;
1971 break;
1972 case '.':
1973 mnoread = 0;
1974 break;
1975 case ';':
1976 break;
1977 case 'x':
1978 case EOF:
1979 scannl();
1980 return;
1981 case 'b':
1982 case 'v':
1983 size = 1;
1984 break;
1985 case 'w':
1986 size = 2;
1987 break;
1988 case 'l':
1989 size = 4;
1990 break;
1991 case 'u':
1992 size = 8;
1993 break;
1994 case '^':
1995 adrs -= size;
1996 break;
1997 break;
1998 case '/':
1999 if (nslash > 0)
2000 adrs -= 1 << nslash;
2001 else
2002 nslash = 0;
2003 nslash += 4;
2004 adrs += 1 << nslash;
2005 break;
2006 case '\\':
2007 if (nslash < 0)
2008 adrs += 1 << -nslash;
2009 else
2010 nslash = 0;
2011 nslash -= 4;
2012 adrs -= 1 << -nslash;
2013 break;
2014 case 'm':
2015 scanhex((void *)&adrs);
2016 break;
2017 case 'n':
2018 mnoread = 1;
2019 break;
2020 case 'r':
2021 brev = !brev;
2022 break;
2023 case '<':
2024 n = size;
2025 scanhex(&n);
2026 adrs -= n;
2027 break;
2028 case '>':
2029 n = size;
2030 scanhex(&n);
2031 adrs += n;
2032 break;
2033 case '?':
2034 printf(memex_subcmd_help_string);
2035 break;
2036 }
2037 }
2038 adrs += inc;
2039 }
2040 }
2041
2042 static int
2043 bsesc(void)
2044 {
2045 int c;
2046
2047 c = inchar();
2048 switch( c ){
2049 case 'n': c = '\n'; break;
2050 case 'r': c = '\r'; break;
2051 case 'b': c = '\b'; break;
2052 case 't': c = '\t'; break;
2053 }
2054 return c;
2055 }
2056
2057 static void xmon_rawdump (unsigned long adrs, long ndump)
2058 {
2059 long n, m, r, nr;
2060 unsigned char temp[16];
2061
2062 for (n = ndump; n > 0;) {
2063 r = n < 16? n: 16;
2064 nr = mread(adrs, temp, r);
2065 adrs += nr;
2066 for (m = 0; m < r; ++m) {
2067 if (m < nr)
2068 printf("%.2x", temp[m]);
2069 else
2070 printf("%s", fault_chars[fault_type]);
2071 }
2072 n -= r;
2073 if (nr < r)
2074 break;
2075 }
2076 printf("\n");
2077 }
2078
2079 #ifdef CONFIG_PPC64
2080 static void dump_one_paca(int cpu)
2081 {
2082 struct paca_struct *p;
2083
2084 if (setjmp(bus_error_jmp) != 0) {
2085 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2086 return;
2087 }
2088
2089 catch_memory_errors = 1;
2090 sync();
2091
2092 p = &paca[cpu];
2093
2094 printf("paca for cpu 0x%x @ %p:\n", cpu, p);
2095
2096 printf(" %-*s = %s\n", 16, "possible", cpu_possible(cpu) ? "yes" : "no");
2097 printf(" %-*s = %s\n", 16, "present", cpu_present(cpu) ? "yes" : "no");
2098 printf(" %-*s = %s\n", 16, "online", cpu_online(cpu) ? "yes" : "no");
2099
2100 #define DUMP(paca, name, format) \
2101 printf(" %-*s = %#-*"format"\t(0x%lx)\n", 16, #name, 18, paca->name, \
2102 offsetof(struct paca_struct, name));
2103
2104 DUMP(p, lock_token, "x");
2105 DUMP(p, paca_index, "x");
2106 DUMP(p, kernel_toc, "lx");
2107 DUMP(p, kernelbase, "lx");
2108 DUMP(p, kernel_msr, "lx");
2109 DUMP(p, emergency_sp, "p");
2110 #ifdef CONFIG_PPC_BOOK3S_64
2111 DUMP(p, mc_emergency_sp, "p");
2112 DUMP(p, in_mce, "x");
2113 #endif
2114 DUMP(p, data_offset, "lx");
2115 DUMP(p, hw_cpu_id, "x");
2116 DUMP(p, cpu_start, "x");
2117 DUMP(p, kexec_state, "x");
2118 DUMP(p, __current, "p");
2119 DUMP(p, kstack, "lx");
2120 DUMP(p, stab_rr, "lx");
2121 DUMP(p, saved_r1, "lx");
2122 DUMP(p, trap_save, "x");
2123 DUMP(p, soft_enabled, "x");
2124 DUMP(p, irq_happened, "x");
2125 DUMP(p, io_sync, "x");
2126 DUMP(p, irq_work_pending, "x");
2127 DUMP(p, nap_state_lost, "x");
2128
2129 #undef DUMP
2130
2131 catch_memory_errors = 0;
2132 sync();
2133 }
2134
2135 static void dump_all_pacas(void)
2136 {
2137 int cpu;
2138
2139 if (num_possible_cpus() == 0) {
2140 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2141 return;
2142 }
2143
2144 for_each_possible_cpu(cpu)
2145 dump_one_paca(cpu);
2146 }
2147
2148 static void dump_pacas(void)
2149 {
2150 unsigned long num;
2151 int c;
2152
2153 c = inchar();
2154 if (c == 'a') {
2155 dump_all_pacas();
2156 return;
2157 }
2158
2159 termch = c; /* Put c back, it wasn't 'a' */
2160
2161 if (scanhex(&num))
2162 dump_one_paca(num);
2163 else
2164 dump_one_paca(xmon_owner);
2165 }
2166 #endif
2167
2168 #define isxdigit(c) (('0' <= (c) && (c) <= '9') \
2169 || ('a' <= (c) && (c) <= 'f') \
2170 || ('A' <= (c) && (c) <= 'F'))
2171 static void
2172 dump(void)
2173 {
2174 int c;
2175
2176 c = inchar();
2177
2178 #ifdef CONFIG_PPC64
2179 if (c == 'p') {
2180 dump_pacas();
2181 return;
2182 }
2183 #endif
2184
2185 if ((isxdigit(c) && c != 'f' && c != 'd') || c == '\n')
2186 termch = c;
2187 scanhex((void *)&adrs);
2188 if (termch != '\n')
2189 termch = 0;
2190 if (c == 'i') {
2191 scanhex(&nidump);
2192 if (nidump == 0)
2193 nidump = 16;
2194 else if (nidump > MAX_DUMP)
2195 nidump = MAX_DUMP;
2196 adrs += ppc_inst_dump(adrs, nidump, 1);
2197 last_cmd = "di\n";
2198 } else if (c == 'l') {
2199 dump_log_buf();
2200 } else if (c == 'r') {
2201 scanhex(&ndump);
2202 if (ndump == 0)
2203 ndump = 64;
2204 xmon_rawdump(adrs, ndump);
2205 adrs += ndump;
2206 last_cmd = "dr\n";
2207 } else {
2208 scanhex(&ndump);
2209 if (ndump == 0)
2210 ndump = 64;
2211 else if (ndump > MAX_DUMP)
2212 ndump = MAX_DUMP;
2213 prdump(adrs, ndump);
2214 adrs += ndump;
2215 last_cmd = "d\n";
2216 }
2217 }
2218
2219 static void
2220 prdump(unsigned long adrs, long ndump)
2221 {
2222 long n, m, c, r, nr;
2223 unsigned char temp[16];
2224
2225 for (n = ndump; n > 0;) {
2226 printf(REG, adrs);
2227 putchar(' ');
2228 r = n < 16? n: 16;
2229 nr = mread(adrs, temp, r);
2230 adrs += nr;
2231 for (m = 0; m < r; ++m) {
2232 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2233 putchar(' ');
2234 if (m < nr)
2235 printf("%.2x", temp[m]);
2236 else
2237 printf("%s", fault_chars[fault_type]);
2238 }
2239 for (; m < 16; ++m) {
2240 if ((m & (sizeof(long) - 1)) == 0)
2241 putchar(' ');
2242 printf(" ");
2243 }
2244 printf(" |");
2245 for (m = 0; m < r; ++m) {
2246 if (m < nr) {
2247 c = temp[m];
2248 putchar(' ' <= c && c <= '~'? c: '.');
2249 } else
2250 putchar(' ');
2251 }
2252 n -= r;
2253 for (; m < 16; ++m)
2254 putchar(' ');
2255 printf("|\n");
2256 if (nr < r)
2257 break;
2258 }
2259 }
2260
2261 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2262
2263 static int
2264 generic_inst_dump(unsigned long adr, long count, int praddr,
2265 instruction_dump_func dump_func)
2266 {
2267 int nr, dotted;
2268 unsigned long first_adr;
2269 unsigned long inst, last_inst = 0;
2270 unsigned char val[4];
2271
2272 dotted = 0;
2273 for (first_adr = adr; count > 0; --count, adr += 4) {
2274 nr = mread(adr, val, 4);
2275 if (nr == 0) {
2276 if (praddr) {
2277 const char *x = fault_chars[fault_type];
2278 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
2279 }
2280 break;
2281 }
2282 inst = GETWORD(val);
2283 if (adr > first_adr && inst == last_inst) {
2284 if (!dotted) {
2285 printf(" ...\n");
2286 dotted = 1;
2287 }
2288 continue;
2289 }
2290 dotted = 0;
2291 last_inst = inst;
2292 if (praddr)
2293 printf(REG" %.8x", adr, inst);
2294 printf("\t");
2295 dump_func(inst, adr);
2296 printf("\n");
2297 }
2298 return adr - first_adr;
2299 }
2300
2301 static int
2302 ppc_inst_dump(unsigned long adr, long count, int praddr)
2303 {
2304 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2305 }
2306
2307 void
2308 print_address(unsigned long addr)
2309 {
2310 xmon_print_symbol(addr, "\t# ", "");
2311 }
2312
2313 void
2314 dump_log_buf(void)
2315 {
2316 struct kmsg_dumper dumper = { .active = 1 };
2317 unsigned char buf[128];
2318 size_t len;
2319
2320 if (setjmp(bus_error_jmp) != 0) {
2321 printf("Error dumping printk buffer!\n");
2322 return;
2323 }
2324
2325 catch_memory_errors = 1;
2326 sync();
2327
2328 kmsg_dump_rewind_nolock(&dumper);
2329 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2330 buf[len] = '\0';
2331 printf("%s", buf);
2332 }
2333
2334 sync();
2335 /* wait a little while to see if we get a machine check */
2336 __delay(200);
2337 catch_memory_errors = 0;
2338 }
2339
2340 /*
2341 * Memory operations - move, set, print differences
2342 */
2343 static unsigned long mdest; /* destination address */
2344 static unsigned long msrc; /* source address */
2345 static unsigned long mval; /* byte value to set memory to */
2346 static unsigned long mcount; /* # bytes to affect */
2347 static unsigned long mdiffs; /* max # differences to print */
2348
2349 static void
2350 memops(int cmd)
2351 {
2352 scanhex((void *)&mdest);
2353 if( termch != '\n' )
2354 termch = 0;
2355 scanhex((void *)(cmd == 's'? &mval: &msrc));
2356 if( termch != '\n' )
2357 termch = 0;
2358 scanhex((void *)&mcount);
2359 switch( cmd ){
2360 case 'm':
2361 memmove((void *)mdest, (void *)msrc, mcount);
2362 break;
2363 case 's':
2364 memset((void *)mdest, mval, mcount);
2365 break;
2366 case 'd':
2367 if( termch != '\n' )
2368 termch = 0;
2369 scanhex((void *)&mdiffs);
2370 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2371 break;
2372 }
2373 }
2374
2375 static void
2376 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2377 {
2378 unsigned n, prt;
2379
2380 prt = 0;
2381 for( n = nb; n > 0; --n )
2382 if( *p1++ != *p2++ )
2383 if( ++prt <= maxpr )
2384 printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2385 p1[-1], p2 - 1, p2[-1]);
2386 if( prt > maxpr )
2387 printf("Total of %d differences\n", prt);
2388 }
2389
2390 static unsigned mend;
2391 static unsigned mask;
2392
2393 static void
2394 memlocate(void)
2395 {
2396 unsigned a, n;
2397 unsigned char val[4];
2398
2399 last_cmd = "ml";
2400 scanhex((void *)&mdest);
2401 if (termch != '\n') {
2402 termch = 0;
2403 scanhex((void *)&mend);
2404 if (termch != '\n') {
2405 termch = 0;
2406 scanhex((void *)&mval);
2407 mask = ~0;
2408 if (termch != '\n') termch = 0;
2409 scanhex((void *)&mask);
2410 }
2411 }
2412 n = 0;
2413 for (a = mdest; a < mend; a += 4) {
2414 if (mread(a, val, 4) == 4
2415 && ((GETWORD(val) ^ mval) & mask) == 0) {
2416 printf("%.16x: %.16x\n", a, GETWORD(val));
2417 if (++n >= 10)
2418 break;
2419 }
2420 }
2421 }
2422
2423 static unsigned long mskip = 0x1000;
2424 static unsigned long mlim = 0xffffffff;
2425
2426 static void
2427 memzcan(void)
2428 {
2429 unsigned char v;
2430 unsigned a;
2431 int ok, ook;
2432
2433 scanhex(&mdest);
2434 if (termch != '\n') termch = 0;
2435 scanhex(&mskip);
2436 if (termch != '\n') termch = 0;
2437 scanhex(&mlim);
2438 ook = 0;
2439 for (a = mdest; a < mlim; a += mskip) {
2440 ok = mread(a, &v, 1);
2441 if (ok && !ook) {
2442 printf("%.8x .. ", a);
2443 } else if (!ok && ook)
2444 printf("%.8x\n", a - mskip);
2445 ook = ok;
2446 if (a + mskip < a)
2447 break;
2448 }
2449 if (ook)
2450 printf("%.8x\n", a - mskip);
2451 }
2452
2453 static void proccall(void)
2454 {
2455 unsigned long args[8];
2456 unsigned long ret;
2457 int i;
2458 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
2459 unsigned long, unsigned long, unsigned long,
2460 unsigned long, unsigned long, unsigned long);
2461 callfunc_t func;
2462
2463 if (!scanhex(&adrs))
2464 return;
2465 if (termch != '\n')
2466 termch = 0;
2467 for (i = 0; i < 8; ++i)
2468 args[i] = 0;
2469 for (i = 0; i < 8; ++i) {
2470 if (!scanhex(&args[i]) || termch == '\n')
2471 break;
2472 termch = 0;
2473 }
2474 func = (callfunc_t) adrs;
2475 ret = 0;
2476 if (setjmp(bus_error_jmp) == 0) {
2477 catch_memory_errors = 1;
2478 sync();
2479 ret = func(args[0], args[1], args[2], args[3],
2480 args[4], args[5], args[6], args[7]);
2481 sync();
2482 printf("return value is 0x%lx\n", ret);
2483 } else {
2484 printf("*** %x exception occurred\n", fault_except);
2485 }
2486 catch_memory_errors = 0;
2487 }
2488
2489 /* Input scanning routines */
2490 int
2491 skipbl(void)
2492 {
2493 int c;
2494
2495 if( termch != 0 ){
2496 c = termch;
2497 termch = 0;
2498 } else
2499 c = inchar();
2500 while( c == ' ' || c == '\t' )
2501 c = inchar();
2502 return c;
2503 }
2504
2505 #define N_PTREGS 44
2506 static char *regnames[N_PTREGS] = {
2507 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2508 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2509 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2510 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
2511 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
2512 #ifdef CONFIG_PPC64
2513 "softe",
2514 #else
2515 "mq",
2516 #endif
2517 "trap", "dar", "dsisr", "res"
2518 };
2519
2520 int
2521 scanhex(unsigned long *vp)
2522 {
2523 int c, d;
2524 unsigned long v;
2525
2526 c = skipbl();
2527 if (c == '%') {
2528 /* parse register name */
2529 char regname[8];
2530 int i;
2531
2532 for (i = 0; i < sizeof(regname) - 1; ++i) {
2533 c = inchar();
2534 if (!isalnum(c)) {
2535 termch = c;
2536 break;
2537 }
2538 regname[i] = c;
2539 }
2540 regname[i] = 0;
2541 for (i = 0; i < N_PTREGS; ++i) {
2542 if (strcmp(regnames[i], regname) == 0) {
2543 if (xmon_regs == NULL) {
2544 printf("regs not available\n");
2545 return 0;
2546 }
2547 *vp = ((unsigned long *)xmon_regs)[i];
2548 return 1;
2549 }
2550 }
2551 printf("invalid register name '%%%s'\n", regname);
2552 return 0;
2553 }
2554
2555 /* skip leading "0x" if any */
2556
2557 if (c == '0') {
2558 c = inchar();
2559 if (c == 'x') {
2560 c = inchar();
2561 } else {
2562 d = hexdigit(c);
2563 if (d == EOF) {
2564 termch = c;
2565 *vp = 0;
2566 return 1;
2567 }
2568 }
2569 } else if (c == '$') {
2570 int i;
2571 for (i=0; i<63; i++) {
2572 c = inchar();
2573 if (isspace(c)) {
2574 termch = c;
2575 break;
2576 }
2577 tmpstr[i] = c;
2578 }
2579 tmpstr[i++] = 0;
2580 *vp = 0;
2581 if (setjmp(bus_error_jmp) == 0) {
2582 catch_memory_errors = 1;
2583 sync();
2584 *vp = kallsyms_lookup_name(tmpstr);
2585 sync();
2586 }
2587 catch_memory_errors = 0;
2588 if (!(*vp)) {
2589 printf("unknown symbol '%s'\n", tmpstr);
2590 return 0;
2591 }
2592 return 1;
2593 }
2594
2595 d = hexdigit(c);
2596 if (d == EOF) {
2597 termch = c;
2598 return 0;
2599 }
2600 v = 0;
2601 do {
2602 v = (v << 4) + d;
2603 c = inchar();
2604 d = hexdigit(c);
2605 } while (d != EOF);
2606 termch = c;
2607 *vp = v;
2608 return 1;
2609 }
2610
2611 static void
2612 scannl(void)
2613 {
2614 int c;
2615
2616 c = termch;
2617 termch = 0;
2618 while( c != '\n' )
2619 c = inchar();
2620 }
2621
2622 static int hexdigit(int c)
2623 {
2624 if( '0' <= c && c <= '9' )
2625 return c - '0';
2626 if( 'A' <= c && c <= 'F' )
2627 return c - ('A' - 10);
2628 if( 'a' <= c && c <= 'f' )
2629 return c - ('a' - 10);
2630 return EOF;
2631 }
2632
2633 void
2634 getstring(char *s, int size)
2635 {
2636 int c;
2637
2638 c = skipbl();
2639 do {
2640 if( size > 1 ){
2641 *s++ = c;
2642 --size;
2643 }
2644 c = inchar();
2645 } while( c != ' ' && c != '\t' && c != '\n' );
2646 termch = c;
2647 *s = 0;
2648 }
2649
2650 static char line[256];
2651 static char *lineptr;
2652
2653 static void
2654 flush_input(void)
2655 {
2656 lineptr = NULL;
2657 }
2658
2659 static int
2660 inchar(void)
2661 {
2662 if (lineptr == NULL || *lineptr == 0) {
2663 if (xmon_gets(line, sizeof(line)) == NULL) {
2664 lineptr = NULL;
2665 return EOF;
2666 }
2667 lineptr = line;
2668 }
2669 return *lineptr++;
2670 }
2671
2672 static void
2673 take_input(char *str)
2674 {
2675 lineptr = str;
2676 }
2677
2678
2679 static void
2680 symbol_lookup(void)
2681 {
2682 int type = inchar();
2683 unsigned long addr;
2684 static char tmp[64];
2685
2686 switch (type) {
2687 case 'a':
2688 if (scanhex(&addr))
2689 xmon_print_symbol(addr, ": ", "\n");
2690 termch = 0;
2691 break;
2692 case 's':
2693 getstring(tmp, 64);
2694 if (setjmp(bus_error_jmp) == 0) {
2695 catch_memory_errors = 1;
2696 sync();
2697 addr = kallsyms_lookup_name(tmp);
2698 if (addr)
2699 printf("%s: %lx\n", tmp, addr);
2700 else
2701 printf("Symbol '%s' not found.\n", tmp);
2702 sync();
2703 }
2704 catch_memory_errors = 0;
2705 termch = 0;
2706 break;
2707 }
2708 }
2709
2710
2711 /* Print an address in numeric and symbolic form (if possible) */
2712 static void xmon_print_symbol(unsigned long address, const char *mid,
2713 const char *after)
2714 {
2715 char *modname;
2716 const char *name = NULL;
2717 unsigned long offset, size;
2718
2719 printf(REG, address);
2720 if (setjmp(bus_error_jmp) == 0) {
2721 catch_memory_errors = 1;
2722 sync();
2723 name = kallsyms_lookup(address, &size, &offset, &modname,
2724 tmpstr);
2725 sync();
2726 /* wait a little while to see if we get a machine check */
2727 __delay(200);
2728 }
2729
2730 catch_memory_errors = 0;
2731
2732 if (name) {
2733 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
2734 if (modname)
2735 printf(" [%s]", modname);
2736 }
2737 printf("%s", after);
2738 }
2739
2740 #ifdef CONFIG_PPC_BOOK3S_64
2741 void dump_segments(void)
2742 {
2743 int i;
2744 unsigned long esid,vsid,valid;
2745 unsigned long llp;
2746
2747 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
2748
2749 for (i = 0; i < mmu_slb_size; i++) {
2750 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
2751 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
2752 valid = (esid & SLB_ESID_V);
2753 if (valid | esid | vsid) {
2754 printf("%02d %016lx %016lx", i, esid, vsid);
2755 if (valid) {
2756 llp = vsid & SLB_VSID_LLP;
2757 if (vsid & SLB_VSID_B_1T) {
2758 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
2759 GET_ESID_1T(esid),
2760 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
2761 llp);
2762 } else {
2763 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
2764 GET_ESID(esid),
2765 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
2766 llp);
2767 }
2768 } else
2769 printf("\n");
2770 }
2771 }
2772 }
2773 #endif
2774
2775 #ifdef CONFIG_PPC_STD_MMU_32
2776 void dump_segments(void)
2777 {
2778 int i;
2779
2780 printf("sr0-15 =");
2781 for (i = 0; i < 16; ++i)
2782 printf(" %x", mfsrin(i));
2783 printf("\n");
2784 }
2785 #endif
2786
2787 #ifdef CONFIG_44x
2788 static void dump_tlb_44x(void)
2789 {
2790 int i;
2791
2792 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
2793 unsigned long w0,w1,w2;
2794 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
2795 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
2796 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
2797 printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
2798 if (w0 & PPC44x_TLB_VALID) {
2799 printf("V %08x -> %01x%08x %c%c%c%c%c",
2800 w0 & PPC44x_TLB_EPN_MASK,
2801 w1 & PPC44x_TLB_ERPN_MASK,
2802 w1 & PPC44x_TLB_RPN_MASK,
2803 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
2804 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
2805 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
2806 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
2807 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
2808 }
2809 printf("\n");
2810 }
2811 }
2812 #endif /* CONFIG_44x */
2813
2814 #ifdef CONFIG_PPC_BOOK3E
2815 static void dump_tlb_book3e(void)
2816 {
2817 u32 mmucfg, pidmask, lpidmask;
2818 u64 ramask;
2819 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
2820 int mmu_version;
2821 static const char *pgsz_names[] = {
2822 " 1K",
2823 " 2K",
2824 " 4K",
2825 " 8K",
2826 " 16K",
2827 " 32K",
2828 " 64K",
2829 "128K",
2830 "256K",
2831 "512K",
2832 " 1M",
2833 " 2M",
2834 " 4M",
2835 " 8M",
2836 " 16M",
2837 " 32M",
2838 " 64M",
2839 "128M",
2840 "256M",
2841 "512M",
2842 " 1G",
2843 " 2G",
2844 " 4G",
2845 " 8G",
2846 " 16G",
2847 " 32G",
2848 " 64G",
2849 "128G",
2850 "256G",
2851 "512G",
2852 " 1T",
2853 " 2T",
2854 };
2855
2856 /* Gather some infos about the MMU */
2857 mmucfg = mfspr(SPRN_MMUCFG);
2858 mmu_version = (mmucfg & 3) + 1;
2859 ntlbs = ((mmucfg >> 2) & 3) + 1;
2860 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
2861 lpidsz = (mmucfg >> 24) & 0xf;
2862 rasz = (mmucfg >> 16) & 0x7f;
2863 if ((mmu_version > 1) && (mmucfg & 0x10000))
2864 lrat = 1;
2865 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
2866 mmu_version, ntlbs, pidsz, lpidsz, rasz);
2867 pidmask = (1ul << pidsz) - 1;
2868 lpidmask = (1ul << lpidsz) - 1;
2869 ramask = (1ull << rasz) - 1;
2870
2871 for (tlb = 0; tlb < ntlbs; tlb++) {
2872 u32 tlbcfg;
2873 int nent, assoc, new_cc = 1;
2874 printf("TLB %d:\n------\n", tlb);
2875 switch(tlb) {
2876 case 0:
2877 tlbcfg = mfspr(SPRN_TLB0CFG);
2878 break;
2879 case 1:
2880 tlbcfg = mfspr(SPRN_TLB1CFG);
2881 break;
2882 case 2:
2883 tlbcfg = mfspr(SPRN_TLB2CFG);
2884 break;
2885 case 3:
2886 tlbcfg = mfspr(SPRN_TLB3CFG);
2887 break;
2888 default:
2889 printf("Unsupported TLB number !\n");
2890 continue;
2891 }
2892 nent = tlbcfg & 0xfff;
2893 assoc = (tlbcfg >> 24) & 0xff;
2894 for (i = 0; i < nent; i++) {
2895 u32 mas0 = MAS0_TLBSEL(tlb);
2896 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
2897 u64 mas2 = 0;
2898 u64 mas7_mas3;
2899 int esel = i, cc = i;
2900
2901 if (assoc != 0) {
2902 cc = i / assoc;
2903 esel = i % assoc;
2904 mas2 = cc * 0x1000;
2905 }
2906
2907 mas0 |= MAS0_ESEL(esel);
2908 mtspr(SPRN_MAS0, mas0);
2909 mtspr(SPRN_MAS1, mas1);
2910 mtspr(SPRN_MAS2, mas2);
2911 asm volatile("tlbre 0,0,0" : : : "memory");
2912 mas1 = mfspr(SPRN_MAS1);
2913 mas2 = mfspr(SPRN_MAS2);
2914 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
2915 if (assoc && (i % assoc) == 0)
2916 new_cc = 1;
2917 if (!(mas1 & MAS1_VALID))
2918 continue;
2919 if (assoc == 0)
2920 printf("%04x- ", i);
2921 else if (new_cc)
2922 printf("%04x-%c", cc, 'A' + esel);
2923 else
2924 printf(" |%c", 'A' + esel);
2925 new_cc = 0;
2926 printf(" %016llx %04x %s %c%c AS%c",
2927 mas2 & ~0x3ffull,
2928 (mas1 >> 16) & 0x3fff,
2929 pgsz_names[(mas1 >> 7) & 0x1f],
2930 mas1 & MAS1_IND ? 'I' : ' ',
2931 mas1 & MAS1_IPROT ? 'P' : ' ',
2932 mas1 & MAS1_TS ? '1' : '0');
2933 printf(" %c%c%c%c%c%c%c",
2934 mas2 & MAS2_X0 ? 'a' : ' ',
2935 mas2 & MAS2_X1 ? 'v' : ' ',
2936 mas2 & MAS2_W ? 'w' : ' ',
2937 mas2 & MAS2_I ? 'i' : ' ',
2938 mas2 & MAS2_M ? 'm' : ' ',
2939 mas2 & MAS2_G ? 'g' : ' ',
2940 mas2 & MAS2_E ? 'e' : ' ');
2941 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
2942 if (mas1 & MAS1_IND)
2943 printf(" %s\n",
2944 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
2945 else
2946 printf(" U%c%c%c S%c%c%c\n",
2947 mas7_mas3 & MAS3_UX ? 'x' : ' ',
2948 mas7_mas3 & MAS3_UW ? 'w' : ' ',
2949 mas7_mas3 & MAS3_UR ? 'r' : ' ',
2950 mas7_mas3 & MAS3_SX ? 'x' : ' ',
2951 mas7_mas3 & MAS3_SW ? 'w' : ' ',
2952 mas7_mas3 & MAS3_SR ? 'r' : ' ');
2953 }
2954 }
2955 }
2956 #endif /* CONFIG_PPC_BOOK3E */
2957
2958 static void xmon_init(int enable)
2959 {
2960 if (enable) {
2961 __debugger = xmon;
2962 __debugger_ipi = xmon_ipi;
2963 __debugger_bpt = xmon_bpt;
2964 __debugger_sstep = xmon_sstep;
2965 __debugger_iabr_match = xmon_iabr_match;
2966 __debugger_break_match = xmon_break_match;
2967 __debugger_fault_handler = xmon_fault_handler;
2968 } else {
2969 __debugger = NULL;
2970 __debugger_ipi = NULL;
2971 __debugger_bpt = NULL;
2972 __debugger_sstep = NULL;
2973 __debugger_iabr_match = NULL;
2974 __debugger_break_match = NULL;
2975 __debugger_fault_handler = NULL;
2976 }
2977 }
2978
2979 #ifdef CONFIG_MAGIC_SYSRQ
2980 static void sysrq_handle_xmon(int key)
2981 {
2982 /* ensure xmon is enabled */
2983 xmon_init(1);
2984 debugger(get_irq_regs());
2985 }
2986
2987 static struct sysrq_key_op sysrq_xmon_op = {
2988 .handler = sysrq_handle_xmon,
2989 .help_msg = "xmon(x)",
2990 .action_msg = "Entering xmon",
2991 };
2992
2993 static int __init setup_xmon_sysrq(void)
2994 {
2995 register_sysrq_key('x', &sysrq_xmon_op);
2996 return 0;
2997 }
2998 __initcall(setup_xmon_sysrq);
2999 #endif /* CONFIG_MAGIC_SYSRQ */
3000
3001 static int __initdata xmon_early, xmon_off;
3002
3003 static int __init early_parse_xmon(char *p)
3004 {
3005 if (!p || strncmp(p, "early", 5) == 0) {
3006 /* just "xmon" is equivalent to "xmon=early" */
3007 xmon_init(1);
3008 xmon_early = 1;
3009 } else if (strncmp(p, "on", 2) == 0)
3010 xmon_init(1);
3011 else if (strncmp(p, "off", 3) == 0)
3012 xmon_off = 1;
3013 else if (strncmp(p, "nobt", 4) == 0)
3014 xmon_no_auto_backtrace = 1;
3015 else
3016 return 1;
3017
3018 return 0;
3019 }
3020 early_param("xmon", early_parse_xmon);
3021
3022 void __init xmon_setup(void)
3023 {
3024 #ifdef CONFIG_XMON_DEFAULT
3025 if (!xmon_off)
3026 xmon_init(1);
3027 #endif
3028 if (xmon_early)
3029 debugger(NULL);
3030 }
3031
3032 #ifdef CONFIG_SPU_BASE
3033
3034 struct spu_info {
3035 struct spu *spu;
3036 u64 saved_mfc_sr1_RW;
3037 u32 saved_spu_runcntl_RW;
3038 unsigned long dump_addr;
3039 u8 stopped_ok;
3040 };
3041
3042 #define XMON_NUM_SPUS 16 /* Enough for current hardware */
3043
3044 static struct spu_info spu_info[XMON_NUM_SPUS];
3045
3046 void xmon_register_spus(struct list_head *list)
3047 {
3048 struct spu *spu;
3049
3050 list_for_each_entry(spu, list, full_list) {
3051 if (spu->number >= XMON_NUM_SPUS) {
3052 WARN_ON(1);
3053 continue;
3054 }
3055
3056 spu_info[spu->number].spu = spu;
3057 spu_info[spu->number].stopped_ok = 0;
3058 spu_info[spu->number].dump_addr = (unsigned long)
3059 spu_info[spu->number].spu->local_store;
3060 }
3061 }
3062
3063 static void stop_spus(void)
3064 {
3065 struct spu *spu;
3066 int i;
3067 u64 tmp;
3068
3069 for (i = 0; i < XMON_NUM_SPUS; i++) {
3070 if (!spu_info[i].spu)
3071 continue;
3072
3073 if (setjmp(bus_error_jmp) == 0) {
3074 catch_memory_errors = 1;
3075 sync();
3076
3077 spu = spu_info[i].spu;
3078
3079 spu_info[i].saved_spu_runcntl_RW =
3080 in_be32(&spu->problem->spu_runcntl_RW);
3081
3082 tmp = spu_mfc_sr1_get(spu);
3083 spu_info[i].saved_mfc_sr1_RW = tmp;
3084
3085 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3086 spu_mfc_sr1_set(spu, tmp);
3087
3088 sync();
3089 __delay(200);
3090
3091 spu_info[i].stopped_ok = 1;
3092
3093 printf("Stopped spu %.2d (was %s)\n", i,
3094 spu_info[i].saved_spu_runcntl_RW ?
3095 "running" : "stopped");
3096 } else {
3097 catch_memory_errors = 0;
3098 printf("*** Error stopping spu %.2d\n", i);
3099 }
3100 catch_memory_errors = 0;
3101 }
3102 }
3103
3104 static void restart_spus(void)
3105 {
3106 struct spu *spu;
3107 int i;
3108
3109 for (i = 0; i < XMON_NUM_SPUS; i++) {
3110 if (!spu_info[i].spu)
3111 continue;
3112
3113 if (!spu_info[i].stopped_ok) {
3114 printf("*** Error, spu %d was not successfully stopped"
3115 ", not restarting\n", i);
3116 continue;
3117 }
3118
3119 if (setjmp(bus_error_jmp) == 0) {
3120 catch_memory_errors = 1;
3121 sync();
3122
3123 spu = spu_info[i].spu;
3124 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3125 out_be32(&spu->problem->spu_runcntl_RW,
3126 spu_info[i].saved_spu_runcntl_RW);
3127
3128 sync();
3129 __delay(200);
3130
3131 printf("Restarted spu %.2d\n", i);
3132 } else {
3133 catch_memory_errors = 0;
3134 printf("*** Error restarting spu %.2d\n", i);
3135 }
3136 catch_memory_errors = 0;
3137 }
3138 }
3139
3140 #define DUMP_WIDTH 23
3141 #define DUMP_VALUE(format, field, value) \
3142 do { \
3143 if (setjmp(bus_error_jmp) == 0) { \
3144 catch_memory_errors = 1; \
3145 sync(); \
3146 printf(" %-*s = "format"\n", DUMP_WIDTH, \
3147 #field, value); \
3148 sync(); \
3149 __delay(200); \
3150 } else { \
3151 catch_memory_errors = 0; \
3152 printf(" %-*s = *** Error reading field.\n", \
3153 DUMP_WIDTH, #field); \
3154 } \
3155 catch_memory_errors = 0; \
3156 } while (0)
3157
3158 #define DUMP_FIELD(obj, format, field) \
3159 DUMP_VALUE(format, field, obj->field)
3160
3161 static void dump_spu_fields(struct spu *spu)
3162 {
3163 printf("Dumping spu fields at address %p:\n", spu);
3164
3165 DUMP_FIELD(spu, "0x%x", number);
3166 DUMP_FIELD(spu, "%s", name);
3167 DUMP_FIELD(spu, "0x%lx", local_store_phys);
3168 DUMP_FIELD(spu, "0x%p", local_store);
3169 DUMP_FIELD(spu, "0x%lx", ls_size);
3170 DUMP_FIELD(spu, "0x%x", node);
3171 DUMP_FIELD(spu, "0x%lx", flags);
3172 DUMP_FIELD(spu, "%d", class_0_pending);
3173 DUMP_FIELD(spu, "0x%lx", class_0_dar);
3174 DUMP_FIELD(spu, "0x%lx", class_1_dar);
3175 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3176 DUMP_FIELD(spu, "0x%lx", irqs[0]);
3177 DUMP_FIELD(spu, "0x%lx", irqs[1]);
3178 DUMP_FIELD(spu, "0x%lx", irqs[2]);
3179 DUMP_FIELD(spu, "0x%x", slb_replace);
3180 DUMP_FIELD(spu, "%d", pid);
3181 DUMP_FIELD(spu, "0x%p", mm);
3182 DUMP_FIELD(spu, "0x%p", ctx);
3183 DUMP_FIELD(spu, "0x%p", rq);
3184 DUMP_FIELD(spu, "0x%p", timestamp);
3185 DUMP_FIELD(spu, "0x%lx", problem_phys);
3186 DUMP_FIELD(spu, "0x%p", problem);
3187 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3188 in_be32(&spu->problem->spu_runcntl_RW));
3189 DUMP_VALUE("0x%x", problem->spu_status_R,
3190 in_be32(&spu->problem->spu_status_R));
3191 DUMP_VALUE("0x%x", problem->spu_npc_RW,
3192 in_be32(&spu->problem->spu_npc_RW));
3193 DUMP_FIELD(spu, "0x%p", priv2);
3194 DUMP_FIELD(spu, "0x%p", pdata);
3195 }
3196
3197 int
3198 spu_inst_dump(unsigned long adr, long count, int praddr)
3199 {
3200 return generic_inst_dump(adr, count, praddr, print_insn_spu);
3201 }
3202
3203 static void dump_spu_ls(unsigned long num, int subcmd)
3204 {
3205 unsigned long offset, addr, ls_addr;
3206
3207 if (setjmp(bus_error_jmp) == 0) {
3208 catch_memory_errors = 1;
3209 sync();
3210 ls_addr = (unsigned long)spu_info[num].spu->local_store;
3211 sync();
3212 __delay(200);
3213 } else {
3214 catch_memory_errors = 0;
3215 printf("*** Error: accessing spu info for spu %d\n", num);
3216 return;
3217 }
3218 catch_memory_errors = 0;
3219
3220 if (scanhex(&offset))
3221 addr = ls_addr + offset;
3222 else
3223 addr = spu_info[num].dump_addr;
3224
3225 if (addr >= ls_addr + LS_SIZE) {
3226 printf("*** Error: address outside of local store\n");
3227 return;
3228 }
3229
3230 switch (subcmd) {
3231 case 'i':
3232 addr += spu_inst_dump(addr, 16, 1);
3233 last_cmd = "sdi\n";
3234 break;
3235 default:
3236 prdump(addr, 64);
3237 addr += 64;
3238 last_cmd = "sd\n";
3239 break;
3240 }
3241
3242 spu_info[num].dump_addr = addr;
3243 }
3244
3245 static int do_spu_cmd(void)
3246 {
3247 static unsigned long num = 0;
3248 int cmd, subcmd = 0;
3249
3250 cmd = inchar();
3251 switch (cmd) {
3252 case 's':
3253 stop_spus();
3254 break;
3255 case 'r':
3256 restart_spus();
3257 break;
3258 case 'd':
3259 subcmd = inchar();
3260 if (isxdigit(subcmd) || subcmd == '\n')
3261 termch = subcmd;
3262 case 'f':
3263 scanhex(&num);
3264 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3265 printf("*** Error: invalid spu number\n");
3266 return 0;
3267 }
3268
3269 switch (cmd) {
3270 case 'f':
3271 dump_spu_fields(spu_info[num].spu);
3272 break;
3273 default:
3274 dump_spu_ls(num, subcmd);
3275 break;
3276 }
3277
3278 break;
3279 default:
3280 return -1;
3281 }
3282
3283 return 0;
3284 }
3285 #else /* ! CONFIG_SPU_BASE */
3286 static int do_spu_cmd(void)
3287 {
3288 return -1;
3289 }
3290 #endif
Linux kernel - Deliverables
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