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Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[deliverable/linux.git] / arch / ppc / platforms / prep_setup.c
1 /*
2 * arch/ppc/platforms/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 *
8 * Support for PReP (Motorola MTX/MVME)
9 * by Troy Benjegerdes (hozer@drgw.net)
10 */
11
12 /*
13 * bootup setup stuff..
14 */
15
16 #include <linux/config.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/errno.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/mm.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/user.h>
28 #include <linux/a.out.h>
29 #include <linux/tty.h>
30 #include <linux/major.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/init.h>
34 #include <linux/initrd.h>
35 #include <linux/ioport.h>
36 #include <linux/console.h>
37 #include <linux/timex.h>
38 #include <linux/pci.h>
39 #include <linux/ide.h>
40 #include <linux/seq_file.h>
41 #include <linux/root_dev.h>
42
43 #include <asm/sections.h>
44 #include <asm/mmu.h>
45 #include <asm/processor.h>
46 #include <asm/residual.h>
47 #include <asm/io.h>
48 #include <asm/pgtable.h>
49 #include <asm/cache.h>
50 #include <asm/dma.h>
51 #include <asm/machdep.h>
52 #include <asm/mc146818rtc.h>
53 #include <asm/mk48t59.h>
54 #include <asm/prep_nvram.h>
55 #include <asm/raven.h>
56 #include <asm/vga.h>
57 #include <asm/time.h>
58 #include <asm/mpc10x.h>
59 #include <asm/i8259.h>
60 #include <asm/open_pic.h>
61 #include <asm/pci-bridge.h>
62 #include <asm/todc.h>
63
64 TODC_ALLOC();
65
66 unsigned char ucSystemType;
67 unsigned char ucBoardRev;
68 unsigned char ucBoardRevMaj, ucBoardRevMin;
69
70 extern unsigned char prep_nvram_read_val(int addr);
71 extern void prep_nvram_write_val(int addr,
72 unsigned char val);
73 extern unsigned char rs_nvram_read_val(int addr);
74 extern void rs_nvram_write_val(int addr,
75 unsigned char val);
76 extern void ibm_prep_init(void);
77
78 extern void prep_find_bridges(void);
79
80 int _prep_type;
81
82 extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
83 extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
84 extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
85 extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
86 extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
87
88
89 #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
90 #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
91
92 #ifdef CONFIG_SOUND_CS4232
93 long ppc_cs4232_dma, ppc_cs4232_dma2;
94 #endif
95
96 extern PTE *Hash, *Hash_end;
97 extern unsigned long Hash_size, Hash_mask;
98 extern int probingmem;
99 extern unsigned long loops_per_jiffy;
100
101 #ifdef CONFIG_SOUND_CS4232
102 EXPORT_SYMBOL(ppc_cs4232_dma);
103 EXPORT_SYMBOL(ppc_cs4232_dma2);
104 #endif
105
106 /* useful ISA ports */
107 #define PREP_SYSCTL 0x81c
108 /* present in the IBM reference design; possibly identical in Mot boxes: */
109 #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
110 #define PREP_IBM_SIMM_PRESENCE 0x804
111 #define PREP_IBM_EQUIPMENT 0x80c
112 #define PREP_IBM_L2INFO 0x80d
113 #define PREP_IBM_PM1 0x82a /* power management register 1 */
114 #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
115 #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
116
117 /* Equipment Present Register masks: */
118 #define PREP_IBM_EQUIPMENT_RESERVED 0x80
119 #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
120 #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
121 #define PREP_IBM_EQUIPMENT_L2_256 0x04
122 #define PREP_IBM_EQUIPMENT_CPU 0x02
123 #define PREP_IBM_EQUIPMENT_L2 0x01
124
125 /* planar ID values: */
126 /* Sandalfoot/Sandalbow (6015/7020) */
127 #define PREP_IBM_SANDALFOOT 0xfc
128 /* Woodfield, Thinkpad 850/860 (6042/7249) */
129 #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
130 /* PowerSeries 830/850 (6050/6070) */
131 #define PREP_IBM_CAROLINA_IDE_0 0xf0
132 #define PREP_IBM_CAROLINA_IDE_1 0xf1
133 #define PREP_IBM_CAROLINA_IDE_2 0xf2
134 #define PREP_IBM_CAROLINA_IDE_3 0xf3
135 /* 7248-43P */
136 #define PREP_IBM_CAROLINA_SCSI_0 0xf4
137 #define PREP_IBM_CAROLINA_SCSI_1 0xf5
138 #define PREP_IBM_CAROLINA_SCSI_2 0xf6
139 #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
140 /* Tiger1 (7043-140) */
141 #define PREP_IBM_TIGER1_133 0xd1
142 #define PREP_IBM_TIGER1_166 0xd2
143 #define PREP_IBM_TIGER1_180 0xd3
144 #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
145 #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
146
147 /* setup_ibm_pci:
148 * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
149 * return 8259 edge/level masks.
150 */
151 void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
152
153 extern char *Motherboard_map_name; /* for use in *_cpuinfo */
154
155 /*
156 * As found in the PReP reference implementation.
157 * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
158 */
159 static void __init
160 prep_gen_enable_l2(void)
161 {
162 outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
163 }
164
165 /* Used by Carolina and Tiger1 */
166 static void __init
167 prep_carolina_enable_l2(void)
168 {
169 outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
170 }
171
172 /* cpuinfo code common to all IBM PReP */
173 static void
174 prep_ibm_cpuinfo(struct seq_file *m)
175 {
176 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
177
178 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
179
180 seq_printf(m, "upgrade cpu\t: ");
181 if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
182 seq_printf(m, "not ");
183 }
184 seq_printf(m, "present\n");
185
186 /* print info about the SCSI fuse */
187 seq_printf(m, "scsi fuse\t: ");
188 if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
189 seq_printf(m, "ok");
190 else
191 seq_printf(m, "bad");
192 seq_printf(m, "\n");
193
194 /* print info about SIMMs */
195 if (have_residual_data) {
196 int i;
197 seq_printf(m, "simms\t\t: ");
198 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
199 if (res->Memories[i].SIMMSize != 0)
200 seq_printf(m, "%d:%ldMiB ", i,
201 (res->Memories[i].SIMMSize > 1024) ?
202 res->Memories[i].SIMMSize>>20 :
203 res->Memories[i].SIMMSize);
204 }
205 seq_printf(m, "\n");
206 }
207 }
208
209 static int
210 prep_gen_cpuinfo(struct seq_file *m)
211 {
212 prep_ibm_cpuinfo(m);
213 return 0;
214 }
215
216 static int
217 prep_sandalfoot_cpuinfo(struct seq_file *m)
218 {
219 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
220
221 prep_ibm_cpuinfo(m);
222
223 /* report amount and type of L2 cache present */
224 seq_printf(m, "L2 cache\t: ");
225 if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
226 seq_printf(m, "not present");
227 } else {
228 if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
229 seq_printf(m, "256KiB");
230 else
231 seq_printf(m, "unknown size");
232
233 if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
234 seq_printf(m, ", copy-back");
235 else
236 seq_printf(m, ", write-through");
237 }
238 seq_printf(m, "\n");
239
240 return 0;
241 }
242
243 static int
244 prep_thinkpad_cpuinfo(struct seq_file *m)
245 {
246 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
247 char *cpubus_speed, *pci_speed;
248
249 prep_ibm_cpuinfo(m);
250
251 /* report amount and type of L2 cache present */
252 seq_printf(m, "l2 cache\t: ");
253 if ((equip_reg & 0x1) == 0) {
254 switch ((equip_reg & 0xc) >> 2) {
255 case 0x0:
256 seq_printf(m, "128KiB look-aside 2-way write-through\n");
257 break;
258 case 0x1:
259 seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
260 break;
261 case 0x2:
262 seq_printf(m, "256KiB look-aside 2-way write-through\n");
263 break;
264 case 0x3:
265 seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
266 break;
267 }
268 } else {
269 seq_printf(m, "not present\n");
270 }
271
272 /* report bus speeds because we can */
273 if ((equip_reg & 0x80) == 0) {
274 switch ((equip_reg & 0x30) >> 4) {
275 case 0x1:
276 cpubus_speed = "50";
277 pci_speed = "25";
278 break;
279 case 0x3:
280 cpubus_speed = "66";
281 pci_speed = "33";
282 break;
283 default:
284 cpubus_speed = "unknown";
285 pci_speed = "unknown";
286 break;
287 }
288 } else {
289 switch ((equip_reg & 0x30) >> 4) {
290 case 0x1:
291 cpubus_speed = "25";
292 pci_speed = "25";
293 break;
294 case 0x2:
295 cpubus_speed = "60";
296 pci_speed = "30";
297 break;
298 case 0x3:
299 cpubus_speed = "33";
300 pci_speed = "33";
301 break;
302 default:
303 cpubus_speed = "unknown";
304 pci_speed = "unknown";
305 break;
306 }
307 }
308 seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
309 seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
310
311 return 0;
312 }
313
314 static int
315 prep_carolina_cpuinfo(struct seq_file *m)
316 {
317 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
318
319 prep_ibm_cpuinfo(m);
320
321 /* report amount and type of L2 cache present */
322 seq_printf(m, "l2 cache\t: ");
323 if ((equip_reg & 0x1) == 0) {
324 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
325
326 /* L2 size */
327 if ((l2_reg & 0x60) == 0)
328 seq_printf(m, "256KiB");
329 else if ((l2_reg & 0x60) == 0x20)
330 seq_printf(m, "512KiB");
331 else
332 seq_printf(m, "unknown size");
333
334 /* L2 type */
335 if ((l2_reg & 0x3) == 0)
336 seq_printf(m, ", async");
337 else if ((l2_reg & 0x3) == 1)
338 seq_printf(m, ", sync");
339 else
340 seq_printf(m, ", unknown type");
341
342 seq_printf(m, "\n");
343 } else {
344 seq_printf(m, "not present\n");
345 }
346
347 return 0;
348 }
349
350 static int
351 prep_tiger1_cpuinfo(struct seq_file *m)
352 {
353 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
354
355 prep_ibm_cpuinfo(m);
356
357 /* report amount and type of L2 cache present */
358 seq_printf(m, "l2 cache\t: ");
359 if ((l2_reg & 0xf) == 0xf) {
360 seq_printf(m, "not present\n");
361 } else {
362 if (l2_reg & 0x8)
363 seq_printf(m, "async, ");
364 else
365 seq_printf(m, "sync burst, ");
366
367 if (l2_reg & 0x4)
368 seq_printf(m, "parity, ");
369 else
370 seq_printf(m, "no parity, ");
371
372 switch (l2_reg & 0x3) {
373 case 0x0:
374 seq_printf(m, "256KiB\n");
375 break;
376 case 0x1:
377 seq_printf(m, "512KiB\n");
378 break;
379 case 0x2:
380 seq_printf(m, "1MiB\n");
381 break;
382 default:
383 seq_printf(m, "unknown size\n");
384 break;
385 }
386 }
387
388 return 0;
389 }
390
391
392 /* Used by all Motorola PReP */
393 static int
394 prep_mot_cpuinfo(struct seq_file *m)
395 {
396 unsigned int cachew = *((unsigned char *)CACHECRBA);
397
398 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
399
400 /* report amount and type of L2 cache present */
401 seq_printf(m, "l2 cache\t: ");
402 switch (cachew & L2CACHE_MASK) {
403 case L2CACHE_512KB:
404 seq_printf(m, "512KiB");
405 break;
406 case L2CACHE_256KB:
407 seq_printf(m, "256KiB");
408 break;
409 case L2CACHE_1MB:
410 seq_printf(m, "1MiB");
411 break;
412 case L2CACHE_NONE:
413 seq_printf(m, "none\n");
414 goto no_l2;
415 break;
416 default:
417 seq_printf(m, "%x\n", cachew);
418 }
419
420 seq_printf(m, ", parity %s",
421 (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
422
423 seq_printf(m, " SRAM:");
424
425 switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
426 case 1: seq_printf(m, "synchronous, parity, flow-through\n");
427 break;
428 case 2: seq_printf(m, "asynchronous, no parity\n");
429 break;
430 case 3: seq_printf(m, "asynchronous, parity\n");
431 break;
432 default:seq_printf(m, "synchronous, pipelined, no parity\n");
433 break;
434 }
435
436 no_l2:
437 /* print info about SIMMs */
438 if (have_residual_data) {
439 int i;
440 seq_printf(m, "simms\t\t: ");
441 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
442 if (res->Memories[i].SIMMSize != 0)
443 seq_printf(m, "%d:%ldM ", i,
444 (res->Memories[i].SIMMSize > 1024) ?
445 res->Memories[i].SIMMSize>>20 :
446 res->Memories[i].SIMMSize);
447 }
448 seq_printf(m, "\n");
449 }
450
451 return 0;
452 }
453
454 static void
455 prep_restart(char *cmd)
456 {
457 #define PREP_SP92 0x92 /* Special Port 92 */
458 local_irq_disable(); /* no interrupts */
459
460 /* set exception prefix high - to the prom */
461 _nmask_and_or_msr(0, MSR_IP);
462
463 /* make sure bit 0 (reset) is a 0 */
464 outb( inb(PREP_SP92) & ~1L , PREP_SP92);
465 /* signal a reset to system control port A - soft reset */
466 outb( inb(PREP_SP92) | 1 , PREP_SP92);
467
468 while ( 1 ) ;
469 /* not reached */
470 #undef PREP_SP92
471 }
472
473 static void
474 prep_halt(void)
475 {
476 local_irq_disable(); /* no interrupts */
477
478 /* set exception prefix high - to the prom */
479 _nmask_and_or_msr(0, MSR_IP);
480
481 while ( 1 ) ;
482 /* not reached */
483 }
484
485 /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
486 * known about it, so we can't power down.
487 */
488 static void
489 prep_carrera_poweroff(void)
490 {
491 prep_halt();
492 }
493
494 /*
495 * On most IBM PReP's, power management is handled by a Signetics 87c750
496 * behind the Utah component on the ISA bus. To access the 750 you must write
497 * a series of nibbles to port 0x82a (decoded by the Utah). This is described
498 * somewhat in the IBM Carolina Technical Specification.
499 * -Hollis
500 */
501 static void
502 utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
503 {
504 /*
505 * byte1: 0 0 0 1 0 d a5 a4
506 * byte2: 0 0 0 1 a3 a2 a1 a0
507 *
508 * d = the bit's value, enabled or disabled
509 * (a5 a4 a3) = the byte number, minus 20
510 * (a2 a1 a0) = the bit number
511 *
512 * example: set the 5th bit of byte 21 (21.5)
513 * a5 a4 a3 = 001 (byte 1)
514 * a2 a1 a0 = 101 (bit 5)
515 *
516 * byte1 = 0001 0100 (0x14)
517 * byte2 = 0001 1101 (0x1d)
518 */
519 unsigned char byte1=0x10, byte2=0x10;
520
521 /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
522 bytenum -= 20;
523
524 byte1 |= (!!value) << 2; /* set d */
525 byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
526
527 byte2 |= (bytenum & 0x1) << 3; /* set a3 */
528 byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
529
530 outb(byte1, PREP_IBM_PM1); /* first nibble */
531 mb();
532 udelay(100); /* important: let controller recover */
533
534 outb(byte2, PREP_IBM_PM1); /* second nibble */
535 mb();
536 udelay(100); /* important: let controller recover */
537 }
538
539 static void
540 prep_sig750_poweroff(void)
541 {
542 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
543
544 local_irq_disable();
545 /* set exception prefix high - to the prom */
546 _nmask_and_or_msr(0, MSR_IP);
547
548 utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
549
550 while (1) ;
551 /* not reached */
552 }
553
554 static int
555 prep_show_percpuinfo(struct seq_file *m, int i)
556 {
557 /* PREP's without residual data will give incorrect values here */
558 seq_printf(m, "clock\t\t: ");
559 if (have_residual_data)
560 seq_printf(m, "%ldMHz\n",
561 (res->VitalProductData.ProcessorHz > 1024) ?
562 res->VitalProductData.ProcessorHz / 1000000 :
563 res->VitalProductData.ProcessorHz);
564 else
565 seq_printf(m, "???\n");
566
567 return 0;
568 }
569
570 #ifdef CONFIG_SOUND_CS4232
571 static long __init masktoint(unsigned int i)
572 {
573 int t = -1;
574 while (i >> ++t)
575 ;
576 return (t-1);
577 }
578
579 /*
580 * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
581 * to distinguish sound dma-channels from others. This is because
582 * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
583 * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
584 */
585
586 static void __init prep_init_sound(void)
587 {
588 PPC_DEVICE *audiodevice = NULL;
589
590 /*
591 * Get the needed resource informations from residual data.
592 *
593 */
594 if (have_residual_data)
595 audiodevice = residual_find_device(~0, NULL,
596 MultimediaController, AudioController, -1, 0);
597
598 if (audiodevice != NULL) {
599 PnP_TAG_PACKET *pkt;
600
601 pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
602 S5_Packet, 0);
603 if (pkt != NULL)
604 ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
605 pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
606 S5_Packet, 1);
607 if (pkt != NULL)
608 ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
609 }
610
611 /*
612 * These are the PReP specs' defaults for the cs4231. We use these
613 * as fallback incase we don't have residual data.
614 * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
615 * will use the other values.
616 */
617 if (audiodevice == NULL) {
618 switch (_prep_type) {
619 case _PREP_IBM:
620 ppc_cs4232_dma = 1;
621 ppc_cs4232_dma2 = -1;
622 break;
623 default:
624 ppc_cs4232_dma = 6;
625 ppc_cs4232_dma2 = 7;
626 }
627 }
628
629 /*
630 * Find a way to push these informations to the cs4232 driver
631 * Give it out with printk, when not in cmd_line?
632 * Append it to cmd_line and saved_command_line?
633 * Format is cs4232=io,irq,dma,dma2
634 */
635 }
636 #endif /* CONFIG_SOUND_CS4232 */
637
638 /*
639 * Fill out screen_info according to the residual data. This allows us to use
640 * at least vesafb.
641 */
642 static void __init
643 prep_init_vesa(void)
644 {
645 #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
646 defined(CONFIG_FB_VESA))
647 PPC_DEVICE *vgadev = NULL;
648
649 if (have_residual_data)
650 vgadev = residual_find_device(~0, NULL, DisplayController,
651 SVGAController, -1, 0);
652
653 if (vgadev != NULL) {
654 PnP_TAG_PACKET *pkt;
655
656 pkt = PnP_find_large_vendor_packet(
657 (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
658 0x04, 0); /* 0x04 = Display Tag */
659 if (pkt != NULL) {
660 unsigned char *ptr = (unsigned char *)pkt;
661
662 if (ptr[4]) {
663 /* graphics mode */
664 screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
665
666 screen_info.lfb_depth = ptr[4] * 8;
667
668 screen_info.lfb_width = swab16(*(short *)(ptr+6));
669 screen_info.lfb_height = swab16(*(short *)(ptr+8));
670 screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
671
672 screen_info.lfb_base = swab32(*(long *)(ptr+12));
673 screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
674 }
675 }
676 }
677 #endif
678 }
679
680 /*
681 * Set DBAT 2 to access 0x80000000 so early progress messages will work
682 */
683 static __inline__ void
684 prep_set_bat(void)
685 {
686 /* wait for all outstanding memory access to complete */
687 mb();
688
689 /* setup DBATs */
690 mtspr(SPRN_DBAT2U, 0x80001ffe);
691 mtspr(SPRN_DBAT2L, 0x8000002a);
692
693 /* wait for updates */
694 mb();
695 }
696
697 /*
698 * IBM 3-digit status LED
699 */
700 static unsigned int ibm_statusled_base;
701
702 static void
703 ibm_statusled_progress(char *s, unsigned short hex);
704
705 static int
706 ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
707 void * dummy3)
708 {
709 ibm_statusled_progress(NULL, 0x505); /* SOS */
710 return NOTIFY_DONE;
711 }
712
713 static struct notifier_block ibm_statusled_block = {
714 ibm_statusled_panic,
715 NULL,
716 INT_MAX /* try to do it first */
717 };
718
719 static void
720 ibm_statusled_progress(char *s, unsigned short hex)
721 {
722 static int notifier_installed;
723 /*
724 * Progress uses 4 digits and we have only 3. So, we map 0xffff to
725 * 0xfff for display switch off. Out of range values are mapped to
726 * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
727 * Install the panic notifier when the display is first switched off.
728 */
729 if (hex == 0xffff) {
730 hex = 0xfff;
731 if (!notifier_installed) {
732 ++notifier_installed;
733 notifier_chain_register(&panic_notifier_list,
734 &ibm_statusled_block);
735 }
736 }
737 else
738 if (hex > 0xfff)
739 hex = 0xeff;
740
741 mb();
742 outw(hex, ibm_statusled_base);
743 }
744
745 static void __init
746 ibm_statusled_init(void)
747 {
748 /*
749 * The IBM 3-digit LED display is specified in the residual data
750 * as an operator panel device, type "System Status LED". Find
751 * that device and determine its address. We validate all the
752 * other parameters on the off-chance another, similar device
753 * exists.
754 */
755 if (have_residual_data) {
756 PPC_DEVICE *led;
757 PnP_TAG_PACKET *pkt;
758
759 led = residual_find_device(~0, NULL, SystemPeripheral,
760 OperatorPanel, SystemStatusLED, 0);
761 if (!led)
762 return;
763
764 pkt = PnP_find_packet((unsigned char *)
765 &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
766 if (!pkt)
767 return;
768
769 if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
770 return;
771 if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
772 *(unsigned short *)pkt->S8_Pack.RangeMax)
773 return;
774 if (pkt->S8_Pack.IOAlign != 2)
775 return;
776 if (pkt->S8_Pack.IONum != 2)
777 return;
778
779 ibm_statusled_base = ld_le16((unsigned short *)
780 (pkt->S8_Pack.RangeMin));
781 ppc_md.progress = ibm_statusled_progress;
782 }
783 }
784
785 static void __init
786 prep_setup_arch(void)
787 {
788 unsigned char reg;
789 int is_ide=0;
790
791 /* init to some ~sane value until calibrate_delay() runs */
792 loops_per_jiffy = 50000000;
793
794 /* Lookup PCI host bridges */
795 prep_find_bridges();
796
797 /* Set up floppy in PS/2 mode */
798 outb(0x09, SIO_CONFIG_RA);
799 reg = inb(SIO_CONFIG_RD);
800 reg = (reg & 0x3F) | 0x40;
801 outb(reg, SIO_CONFIG_RD);
802 outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
803
804 switch ( _prep_type )
805 {
806 case _PREP_IBM:
807 reg = inb(PREP_IBM_PLANAR);
808 printk(KERN_INFO "IBM planar ID: %02x", reg);
809 switch (reg) {
810 case PREP_IBM_SANDALFOOT:
811 prep_gen_enable_l2();
812 setup_ibm_pci = prep_sandalfoot_setup_pci;
813 ppc_md.power_off = prep_sig750_poweroff;
814 ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
815 break;
816 case PREP_IBM_THINKPAD:
817 prep_gen_enable_l2();
818 setup_ibm_pci = prep_thinkpad_setup_pci;
819 ppc_md.power_off = prep_carrera_poweroff;
820 ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
821 break;
822 default:
823 if (have_residual_data) {
824 prep_gen_enable_l2();
825 setup_ibm_pci = prep_residual_setup_pci;
826 ppc_md.power_off = prep_halt;
827 ppc_md.show_cpuinfo = prep_gen_cpuinfo;
828 break;
829 }
830 else
831 printk(" - unknown! Assuming Carolina");
832 /* fall through */
833 case PREP_IBM_CAROLINA_IDE_0:
834 case PREP_IBM_CAROLINA_IDE_1:
835 case PREP_IBM_CAROLINA_IDE_2:
836 case PREP_IBM_CAROLINA_IDE_3:
837 is_ide = 1;
838 case PREP_IBM_CAROLINA_SCSI_0:
839 case PREP_IBM_CAROLINA_SCSI_1:
840 case PREP_IBM_CAROLINA_SCSI_2:
841 case PREP_IBM_CAROLINA_SCSI_3:
842 prep_carolina_enable_l2();
843 setup_ibm_pci = prep_carolina_setup_pci;
844 ppc_md.power_off = prep_sig750_poweroff;
845 ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
846 break;
847 case PREP_IBM_TIGER1_133:
848 case PREP_IBM_TIGER1_166:
849 case PREP_IBM_TIGER1_180:
850 case PREP_IBM_TIGER1_xxx:
851 case PREP_IBM_TIGER1_333:
852 prep_carolina_enable_l2();
853 setup_ibm_pci = prep_tiger1_setup_pci;
854 ppc_md.power_off = prep_sig750_poweroff;
855 ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
856 break;
857 }
858 printk("\n");
859
860 /* default root device */
861 if (is_ide)
862 ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
863 else
864 ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
865
866 break;
867 case _PREP_Motorola:
868 prep_gen_enable_l2();
869 ppc_md.power_off = prep_halt;
870 ppc_md.show_cpuinfo = prep_mot_cpuinfo;
871
872 #ifdef CONFIG_BLK_DEV_INITRD
873 if (initrd_start)
874 ROOT_DEV = Root_RAM0;
875 else
876 #endif
877 #ifdef CONFIG_ROOT_NFS
878 ROOT_DEV = Root_NFS;
879 #else
880 ROOT_DEV = Root_SDA2;
881 #endif
882 break;
883 }
884
885 /* Read in NVRAM data */
886 init_prep_nvram();
887
888 /* if no bootargs, look in NVRAM */
889 if ( cmd_line[0] == '\0' ) {
890 char *bootargs;
891 bootargs = prep_nvram_get_var("bootargs");
892 if (bootargs != NULL) {
893 strcpy(cmd_line, bootargs);
894 /* again.. */
895 strcpy(saved_command_line, cmd_line);
896 }
897 }
898
899 #ifdef CONFIG_SOUND_CS4232
900 prep_init_sound();
901 #endif /* CONFIG_SOUND_CS4232 */
902
903 prep_init_vesa();
904
905 switch (_prep_type) {
906 case _PREP_Motorola:
907 raven_init();
908 break;
909 case _PREP_IBM:
910 ibm_prep_init();
911 break;
912 }
913
914 #ifdef CONFIG_VGA_CONSOLE
915 /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
916 vgacon_remap_base = 0xf0000000;
917 conswitchp = &vga_con;
918 #endif
919 }
920
921 /*
922 * First, see if we can get this information from the residual data.
923 * This is important on some IBM PReP systems. If we cannot, we let the
924 * TODC code handle doing this.
925 */
926 static void __init
927 prep_calibrate_decr(void)
928 {
929 if (have_residual_data) {
930 unsigned long freq, divisor = 4;
931
932 if ( res->VitalProductData.ProcessorBusHz ) {
933 freq = res->VitalProductData.ProcessorBusHz;
934 printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
935 (freq/divisor)/1000000,
936 (freq/divisor)%1000000);
937 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
938 tb_ticks_per_jiffy = freq / HZ / divisor;
939 }
940 }
941 else
942 todc_calibrate_decr();
943 }
944
945 static void __init
946 prep_init_IRQ(void)
947 {
948 int i;
949 unsigned int pci_viddid, pci_did;
950
951 if (OpenPIC_Addr != NULL) {
952 openpic_init(NUM_8259_INTERRUPTS);
953 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
954 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
955 i8259_irq);
956 }
957
958 if (have_residual_data) {
959 i8259_init(residual_isapic_addr(), 0);
960 return;
961 }
962
963 /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
964 * controller, we poll (as they have a different int-ack address). */
965 early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
966 pci_did = (pci_viddid & 0xffff0000) >> 16;
967 if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
968 && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
969 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
970 i8259_init(0, 0);
971 else
972 /* PCI interrupt ack address given in section 6.1.8 of the
973 * PReP specification. */
974 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
975 }
976
977 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
978 /*
979 * IDE stuff.
980 */
981 static int
982 prep_ide_default_irq(unsigned long base)
983 {
984 switch (base) {
985 case 0x1f0: return 13;
986 case 0x170: return 13;
987 case 0x1e8: return 11;
988 case 0x168: return 10;
989 case 0xfff0: return 14; /* MCP(N)750 ide0 */
990 case 0xffe0: return 15; /* MCP(N)750 ide1 */
991 default: return 0;
992 }
993 }
994
995 static unsigned long
996 prep_ide_default_io_base(int index)
997 {
998 switch (index) {
999 case 0: return 0x1f0;
1000 case 1: return 0x170;
1001 case 2: return 0x1e8;
1002 case 3: return 0x168;
1003 default:
1004 return 0;
1005 }
1006 }
1007 #endif
1008
1009 #ifdef CONFIG_SMP
1010 /* PReP (MTX) support */
1011 static int __init
1012 smp_prep_probe(void)
1013 {
1014 extern int mot_multi;
1015
1016 if (mot_multi) {
1017 openpic_request_IPIs();
1018 smp_hw_index[1] = 1;
1019 return 2;
1020 }
1021
1022 return 1;
1023 }
1024
1025 static void __init
1026 smp_prep_kick_cpu(int nr)
1027 {
1028 *(unsigned long *)KERNELBASE = nr;
1029 asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
1030 printk("CPU1 released, waiting\n");
1031 }
1032
1033 static void __init
1034 smp_prep_setup_cpu(int cpu_nr)
1035 {
1036 if (OpenPIC_Addr)
1037 do_openpic_setup_cpu();
1038 }
1039
1040 static struct smp_ops_t prep_smp_ops = {
1041 smp_openpic_message_pass,
1042 smp_prep_probe,
1043 smp_prep_kick_cpu,
1044 smp_prep_setup_cpu,
1045 .give_timebase = smp_generic_give_timebase,
1046 .take_timebase = smp_generic_take_timebase,
1047 };
1048 #endif /* CONFIG_SMP */
1049
1050 /*
1051 * Setup the bat mappings we're going to load that cover
1052 * the io areas. RAM was mapped by mapin_ram().
1053 * -- Cort
1054 */
1055 static void __init
1056 prep_map_io(void)
1057 {
1058 io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
1059 io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
1060 }
1061
1062 static int __init
1063 prep_request_io(void)
1064 {
1065 if (_machine == _MACH_prep) {
1066 #ifdef CONFIG_NVRAM
1067 request_region(PREP_NVRAM_AS0, 0x8, "nvram");
1068 #endif
1069 request_region(0x00,0x20,"dma1");
1070 request_region(0x40,0x20,"timer");
1071 request_region(0x80,0x10,"dma page reg");
1072 request_region(0xc0,0x20,"dma2");
1073 }
1074
1075 return 0;
1076 }
1077
1078 device_initcall(prep_request_io);
1079
1080 void __init
1081 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1082 unsigned long r6, unsigned long r7)
1083 {
1084 #ifdef CONFIG_PREP_RESIDUAL
1085 /* make a copy of residual data */
1086 if ( r3 ) {
1087 memcpy((void *)res,(void *)(r3+KERNELBASE),
1088 sizeof(RESIDUAL));
1089 }
1090 #endif
1091
1092 isa_io_base = PREP_ISA_IO_BASE;
1093 isa_mem_base = PREP_ISA_MEM_BASE;
1094 pci_dram_offset = PREP_PCI_DRAM_OFFSET;
1095 ISA_DMA_THRESHOLD = 0x00ffffff;
1096 DMA_MODE_READ = 0x44;
1097 DMA_MODE_WRITE = 0x48;
1098 ppc_do_canonicalize_irqs = 1;
1099
1100 /* figure out what kind of prep workstation we are */
1101 if (have_residual_data) {
1102 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
1103 _prep_type = _PREP_IBM;
1104 else
1105 _prep_type = _PREP_Motorola;
1106 }
1107 else {
1108 /* assume motorola if no residual (netboot?) */
1109 _prep_type = _PREP_Motorola;
1110 }
1111
1112 #ifdef CONFIG_PREP_RESIDUAL
1113 /* Switch off all residual data processing if the user requests it */
1114 if (strstr(cmd_line, "noresidual") != NULL)
1115 res = NULL;
1116 #endif
1117
1118 /* Initialise progress early to get maximum benefit */
1119 prep_set_bat();
1120 ibm_statusled_init();
1121
1122 ppc_md.setup_arch = prep_setup_arch;
1123 ppc_md.show_percpuinfo = prep_show_percpuinfo;
1124 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
1125 ppc_md.init_IRQ = prep_init_IRQ;
1126 /* this gets changed later on if we have an OpenPIC -- Cort */
1127 ppc_md.get_irq = i8259_irq;
1128
1129 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
1130
1131 ppc_md.restart = prep_restart;
1132 ppc_md.power_off = NULL; /* set in prep_setup_arch() */
1133 ppc_md.halt = prep_halt;
1134
1135 ppc_md.nvram_read_val = prep_nvram_read_val;
1136 ppc_md.nvram_write_val = prep_nvram_write_val;
1137
1138 ppc_md.time_init = todc_time_init;
1139 if (_prep_type == _PREP_IBM) {
1140 ppc_md.rtc_read_val = todc_mc146818_read_val;
1141 ppc_md.rtc_write_val = todc_mc146818_write_val;
1142 TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
1143 8);
1144 } else {
1145 TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
1146 PREP_NVRAM_DATA, 8);
1147 }
1148
1149 ppc_md.calibrate_decr = prep_calibrate_decr;
1150 ppc_md.set_rtc_time = todc_set_rtc_time;
1151 ppc_md.get_rtc_time = todc_get_rtc_time;
1152
1153 ppc_md.setup_io_mappings = prep_map_io;
1154
1155 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
1156 ppc_ide_md.default_irq = prep_ide_default_irq;
1157 ppc_ide_md.default_io_base = prep_ide_default_io_base;
1158 #endif
1159
1160 #ifdef CONFIG_SMP
1161 smp_ops = &prep_smp_ops;
1162 #endif /* CONFIG_SMP */
1163 }
Linux kernel - Deliverables
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