2 * Copyright 2001 Mike Corrigan, IBM Corp
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 #include <linux/config.h>
10 #include <linux/types.h>
11 #include <linux/threads.h>
12 #include <linux/module.h>
13 #include <linux/bitops.h>
14 #include <asm/processor.h>
15 #include <asm/ptrace.h>
17 #include <asm/abs_addr.h>
18 #include <asm/iSeries/ItLpNaca.h>
19 #include <asm/lppaca.h>
20 #include <asm/iSeries/ItLpRegSave.h>
22 #include <asm/iSeries/HvReleaseData.h>
23 #include <asm/iSeries/LparMap.h>
24 #include <asm/iSeries/ItVpdAreas.h>
25 #include <asm/iSeries/ItIplParmsReal.h>
26 #include <asm/iSeries/ItExtVpdPanel.h>
27 #include <asm/iSeries/ItLpQueue.h>
28 #include <asm/iSeries/IoHriProcessorVpd.h>
29 #include <asm/iSeries/ItSpCommArea.h>
32 /* The HvReleaseData is the root of the information shared between
33 * the hypervisor and Linux.
36 struct HvReleaseData hvReleaseData
= {
37 .xDesc
= 0xc8a5d9c4, /* "HvRD" ebcdic */
38 .xSize
= sizeof(struct HvReleaseData
),
39 .xVpdAreasPtrOffset
= offsetof(struct naca_struct
, xItVpdAreas
),
40 .xSlicNacaAddr
= &naca
, /* 64-bit Naca address */
41 .xMsNucDataOffset
= 0x4800, /* offset of LparMap within loadarea (see head.S) */
42 .xTagsMode
= 1, /* tags inactive */
43 .xAddressSize
= 0, /* 64 bit */
44 .xNoSharedProcs
= 0, /* shared processors */
45 .xNoHMT
= 0, /* HMT allowed */
46 .xRsvd2
= 6, /* TEMP: This allows non-GA driver */
47 .xVrmIndex
= 4, /* We are v5r2m0 */
48 .xMinSupportedPlicVrmIndex
= 3, /* v5r1m0 */
49 .xMinCompatablePlicVrmIndex
= 3, /* v5r1m0 */
50 .xVrmName
= { 0xd3, 0x89, 0x95, 0xa4, /* "Linux 2.4.64" ebcdic */
51 0xa7, 0x40, 0xf2, 0x4b,
52 0xf4, 0x4b, 0xf6, 0xf4 },
55 extern void system_reset_iSeries(void);
56 extern void machine_check_iSeries(void);
57 extern void data_access_iSeries(void);
58 extern void instruction_access_iSeries(void);
59 extern void hardware_interrupt_iSeries(void);
60 extern void alignment_iSeries(void);
61 extern void program_check_iSeries(void);
62 extern void fp_unavailable_iSeries(void);
63 extern void decrementer_iSeries(void);
64 extern void trap_0a_iSeries(void);
65 extern void trap_0b_iSeries(void);
66 extern void system_call_iSeries(void);
67 extern void single_step_iSeries(void);
68 extern void trap_0e_iSeries(void);
69 extern void performance_monitor_iSeries(void);
70 extern void data_access_slb_iSeries(void);
71 extern void instruction_access_slb_iSeries(void);
73 struct ItLpNaca itLpNaca
= {
74 .xDesc
= 0xd397d581, /* "LpNa" ebcdic */
75 .xSize
= 0x0400, /* size of ItLpNaca */
76 .xIntHdlrOffset
= 0x0300, /* offset to int array */
77 .xMaxIntHdlrEntries
= 19, /* # ents */
78 .xPrimaryLpIndex
= 0, /* Part # of primary */
79 .xServiceLpIndex
= 0, /* Part # of serv */
80 .xLpIndex
= 0, /* Part # of me */
81 .xMaxLpQueues
= 0, /* # of LP queues */
82 .xLpQueueOffset
= 0x100, /* offset of start of LP queues */
83 .xPirEnvironMode
= 0, /* Piranha stuff */
92 .xPlicVrmIndex
= 0, /* VRM index of PLIC */
93 .xMinSupportedSlicVrmInd
= 0, /* min supported SLIC */
94 .xMinCompatableSlicVrmInd
= 0, /* min compat SLIC */
95 .xLoadAreaAddr
= 0, /* 64-bit addr of load area */
96 .xLoadAreaChunks
= 0, /* chunks for load area */
97 .xPaseSysCallCRMask
= 0, /* PASE mask */
98 .xSlicSegmentTablePtr
= 0, /* seg table */
99 .xOldLpQueue
= { 0 }, /* Old LP Queue */
101 (u64
)system_reset_iSeries
, /* 0x100 System Reset */
102 (u64
)machine_check_iSeries
, /* 0x200 Machine Check */
103 (u64
)data_access_iSeries
, /* 0x300 Data Access */
104 (u64
)instruction_access_iSeries
, /* 0x400 Instruction Access */
105 (u64
)hardware_interrupt_iSeries
, /* 0x500 External */
106 (u64
)alignment_iSeries
, /* 0x600 Alignment */
107 (u64
)program_check_iSeries
, /* 0x700 Program Check */
108 (u64
)fp_unavailable_iSeries
, /* 0x800 FP Unavailable */
109 (u64
)decrementer_iSeries
, /* 0x900 Decrementer */
110 (u64
)trap_0a_iSeries
, /* 0xa00 Trap 0A */
111 (u64
)trap_0b_iSeries
, /* 0xb00 Trap 0B */
112 (u64
)system_call_iSeries
, /* 0xc00 System Call */
113 (u64
)single_step_iSeries
, /* 0xd00 Single Step */
114 (u64
)trap_0e_iSeries
, /* 0xe00 Trap 0E */
115 (u64
)performance_monitor_iSeries
,/* 0xf00 Performance Monitor */
118 0, /* int 0x1020 CPU ctls */
119 (u64
)hardware_interrupt_iSeries
, /* SC Ret Hdlr */
120 (u64
)data_access_slb_iSeries
, /* 0x380 D-SLB */
121 (u64
)instruction_access_slb_iSeries
/* 0x480 I-SLB */
124 EXPORT_SYMBOL(itLpNaca
);
126 /* May be filled in by the hypervisor so cannot end up in the BSS */
127 struct ItIplParmsReal xItIplParmsReal
__attribute__((__section__(".data")));
129 /* May be filled in by the hypervisor so cannot end up in the BSS */
130 struct ItExtVpdPanel xItExtVpdPanel
__attribute__((__section__(".data")));
131 EXPORT_SYMBOL(xItExtVpdPanel
);
133 #define maxPhysicalProcessors 32
135 struct IoHriProcessorVpd xIoHriProcessorVpd
[maxPhysicalProcessors
] = {
137 .xInstCacheOperandSize
= 32,
138 .xDataCacheOperandSize
= 32,
139 .xProcFreq
= 50000000,
140 .xTimeBaseFreq
= 50000000,
145 /* Space for Main Store Vpd 27,200 bytes */
146 /* May be filled in by the hypervisor so cannot end up in the BSS */
147 u64 xMsVpd
[3400] __attribute__((__section__(".data")));
149 /* Space for Recovery Log Buffer */
150 /* May be filled in by the hypervisor so cannot end up in the BSS */
151 u64 xRecoveryLogBuffer
[32] __attribute__((__section__(".data")));
153 struct SpCommArea xSpCommArea
= {
158 /* The LparMap data is now located at offset 0x6000 in head.S
159 * It was put there so that the HvReleaseData could address it
160 * with a 32-bit offset as required by the iSeries hypervisor
162 * The Naca has a pointer to the ItVpdAreas. The hypervisor finds
163 * the Naca via the HvReleaseData area. The HvReleaseData has the
164 * offset into the Naca of the pointer to the ItVpdAreas.
166 struct ItVpdAreas itVpdAreas
= {
167 .xSlicDesc
= 0xc9a3e5c1, /* "ItVA" */
168 .xSlicSize
= sizeof(struct ItVpdAreas
),
169 .xSlicVpdEntries
= ItVpdMaxEntries
, /* # VPD array entries */
170 .xSlicDmaEntries
= ItDmaMaxEntries
, /* # DMA array entries */
171 .xSlicMaxLogicalProcs
= NR_CPUS
* 2, /* Max logical procs */
172 .xSlicMaxPhysicalProcs
= maxPhysicalProcessors
, /* Max physical procs */
173 .xSlicDmaToksOffset
= offsetof(struct ItVpdAreas
, xPlicDmaToks
),
174 .xSlicVpdAdrsOffset
= offsetof(struct ItVpdAreas
, xSlicVpdAdrs
),
175 .xSlicDmaLensOffset
= offsetof(struct ItVpdAreas
, xPlicDmaLens
),
176 .xSlicVpdLensOffset
= offsetof(struct ItVpdAreas
, xSlicVpdLens
),
177 .xSlicMaxSlotLabels
= 0, /* max slot labels */
178 .xSlicMaxLpQueues
= 1, /* max LP queues */
179 .xPlicDmaLens
= { 0 }, /* DMA lengths */
180 .xPlicDmaToks
= { 0 }, /* DMA tokens */
181 .xSlicVpdLens
= { /* VPD lengths */
183 sizeof(xItExtVpdPanel
), /* 3 Extended VPD */
184 sizeof(struct paca_struct
), /* 4 length of Paca */
186 sizeof(struct ItIplParmsReal
),/* 6 length of IPL parms */
187 26992, /* 7 length of MS VPD */
189 sizeof(struct ItLpNaca
),/* 9 length of LP Naca */
191 256, /* 11 length of Recovery Log Buf */
192 sizeof(struct SpCommArea
), /* 12 length of SP Comm Area */
194 sizeof(struct IoHriProcessorVpd
),/* 16 length of Proc Vpd */
195 0,0,0,0,0,0, /* 17 - 22 */
196 sizeof(struct ItLpQueue
),/* 23 length of Lp Queue */
199 .xSlicVpdAdrs
= { /* VPD addresses */
201 &xItExtVpdPanel
, /* 3 Extended VPD */
202 &paca
[0], /* 4 first Paca */
204 &xItIplParmsReal
, /* 6 IPL parms */
205 &xMsVpd
, /* 7 MS Vpd */
207 &itLpNaca
, /* 9 LpNaca */
209 &xRecoveryLogBuffer
, /* 11 Recovery Log Buffer */
210 &xSpCommArea
, /* 12 SP Comm Area */
212 &xIoHriProcessorVpd
, /* 16 Proc Vpd */
213 0,0,0,0,0,0, /* 17 - 22 */
214 &xItLpQueue
, /* 23 Lp Queue */
219 struct msChunks msChunks
;
220 EXPORT_SYMBOL(msChunks
);
222 /* Depending on whether this is called from iSeries or pSeries setup
223 * code, the location of the msChunks struct may or may not have
224 * to be reloc'd, so we force the caller to do that for us by passing
225 * in a pointer to the structure.
228 msChunks_alloc(unsigned long mem
, unsigned long num_chunks
, unsigned long chunk_size
)
230 unsigned long offset
= reloc_offset();
231 struct msChunks
*_msChunks
= PTRRELOC(&msChunks
);
233 _msChunks
->num_chunks
= num_chunks
;
234 _msChunks
->chunk_size
= chunk_size
;
235 _msChunks
->chunk_shift
= __ilog2(chunk_size
);
236 _msChunks
->chunk_mask
= (1UL<<_msChunks
->chunk_shift
)-1;
238 mem
= _ALIGN(mem
, sizeof(msChunks_entry
));
239 _msChunks
->abs
= (msChunks_entry
*)(mem
+ offset
);
240 mem
+= num_chunks
* sizeof(msChunks_entry
);