Linux-2.6.12-rc2
[deliverable/linux.git] / arch / ppc64 / kernel / iSeries_irq.c
1 /************************************************************************/
2 /* This module supports the iSeries PCI bus interrupt handling */
3 /* Copyright (C) 20yy <Robert L Holtorf> <IBM Corp> */
4 /* */
5 /* This program is free software; you can redistribute it and/or modify */
6 /* it under the terms of the GNU General Public License as published by */
7 /* the Free Software Foundation; either version 2 of the License, or */
8 /* (at your option) any later version. */
9 /* */
10 /* This program is distributed in the hope that it will be useful, */
11 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
12 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
13 /* GNU General Public License for more details. */
14 /* */
15 /* You should have received a copy of the GNU General Public License */
16 /* along with this program; if not, write to the: */
17 /* Free Software Foundation, Inc., */
18 /* 59 Temple Place, Suite 330, */
19 /* Boston, MA 02111-1307 USA */
20 /************************************************************************/
21 /* Change Activity: */
22 /* Created, December 13, 2000 by Wayne Holm */
23 /* End Change Activity */
24 /************************************************************************/
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/threads.h>
28 #include <linux/smp.h>
29 #include <linux/param.h>
30 #include <linux/string.h>
31 #include <linux/bootmem.h>
32 #include <linux/ide.h>
33
34 #include <linux/irq.h>
35 #include <linux/spinlock.h>
36 #include <asm/ppcdebug.h>
37
38 #include <asm/iSeries/HvCallPci.h>
39 #include <asm/iSeries/HvCallXm.h>
40 #include <asm/iSeries/iSeries_irq.h>
41 #include <asm/iSeries/XmPciLpEvent.h>
42
43 static unsigned int iSeries_startup_IRQ(unsigned int irq);
44 static void iSeries_shutdown_IRQ(unsigned int irq);
45 static void iSeries_enable_IRQ(unsigned int irq);
46 static void iSeries_disable_IRQ(unsigned int irq);
47 static void iSeries_end_IRQ(unsigned int irq);
48
49 static hw_irq_controller iSeries_IRQ_handler = {
50 .typename = "iSeries irq controller",
51 .startup = iSeries_startup_IRQ,
52 .shutdown = iSeries_shutdown_IRQ,
53 .enable = iSeries_enable_IRQ,
54 .disable = iSeries_disable_IRQ,
55 .end = iSeries_end_IRQ
56 };
57
58 /* This maps virtual irq numbers to real irqs */
59 unsigned int virt_irq_to_real_map[NR_IRQS];
60
61 /* The next available virtual irq number */
62 /* Note: the pcnet32 driver assumes irq numbers < 2 aren't valid. :( */
63 static int next_virtual_irq = 2;
64
65 /* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c */
66 void __init iSeries_init_IRQ(void)
67 {
68 /* Register PCI event handler and open an event path */
69 XmPciLpEvent_init();
70 }
71
72 /*
73 * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
74 * It calculates the irq value for the slot.
75 * Note that subBusNumber is always 0 (at the moment at least).
76 */
77 int __init iSeries_allocate_IRQ(HvBusNumber busNumber,
78 HvSubBusNumber subBusNumber, HvAgentId deviceId)
79 {
80 unsigned int realirq, virtirq;
81 u8 idsel = (deviceId >> 4);
82 u8 function = deviceId & 7;
83
84 virtirq = next_virtual_irq++;
85 realirq = ((busNumber - 1) << 6) + ((idsel - 1) << 3) + function;
86 virt_irq_to_real_map[virtirq] = realirq;
87
88 irq_desc[virtirq].handler = &iSeries_IRQ_handler;
89 return virtirq;
90 }
91
92 #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
93 #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
94 #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
95
96 /* This is called by iSeries_activate_IRQs */
97 static unsigned int iSeries_startup_IRQ(unsigned int irq)
98 {
99 u32 bus, deviceId, function, mask;
100 const u32 subBus = 0;
101 unsigned int rirq = virt_irq_to_real_map[irq];
102
103 bus = REAL_IRQ_TO_BUS(rirq);
104 function = REAL_IRQ_TO_FUNC(rirq);
105 deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
106
107 /* Link the IRQ number to the bridge */
108 HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
109
110 /* Unmask bridge interrupts in the FISR */
111 mask = 0x01010000 << function;
112 HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
113 iSeries_enable_IRQ(irq);
114 return 0;
115 }
116
117 /*
118 * This is called out of iSeries_fixup to activate interrupt
119 * generation for usable slots
120 */
121 void __init iSeries_activate_IRQs()
122 {
123 int irq;
124 unsigned long flags;
125
126 for_each_irq (irq) {
127 irq_desc_t *desc = get_irq_desc(irq);
128
129 if (desc && desc->handler && desc->handler->startup) {
130 spin_lock_irqsave(&desc->lock, flags);
131 desc->handler->startup(irq);
132 spin_unlock_irqrestore(&desc->lock, flags);
133 }
134 }
135 }
136
137 /* this is not called anywhere currently */
138 static void iSeries_shutdown_IRQ(unsigned int irq)
139 {
140 u32 bus, deviceId, function, mask;
141 const u32 subBus = 0;
142 unsigned int rirq = virt_irq_to_real_map[irq];
143
144 /* irq should be locked by the caller */
145 bus = REAL_IRQ_TO_BUS(rirq);
146 function = REAL_IRQ_TO_FUNC(rirq);
147 deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
148
149 /* Invalidate the IRQ number in the bridge */
150 HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
151
152 /* Mask bridge interrupts in the FISR */
153 mask = 0x01010000 << function;
154 HvCallPci_maskFisr(bus, subBus, deviceId, mask);
155 }
156
157 /*
158 * This will be called by device drivers (via disable_IRQ)
159 * to disable INTA in the bridge interrupt status register.
160 */
161 static void iSeries_disable_IRQ(unsigned int irq)
162 {
163 u32 bus, deviceId, function, mask;
164 const u32 subBus = 0;
165 unsigned int rirq = virt_irq_to_real_map[irq];
166
167 /* The IRQ has already been locked by the caller */
168 bus = REAL_IRQ_TO_BUS(rirq);
169 function = REAL_IRQ_TO_FUNC(rirq);
170 deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
171
172 /* Mask secondary INTA */
173 mask = 0x80000000;
174 HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
175 PPCDBG(PPCDBG_BUSWALK, "iSeries_disable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
176 bus, subBus, deviceId, irq);
177 }
178
179 /*
180 * This will be called by device drivers (via enable_IRQ)
181 * to enable INTA in the bridge interrupt status register.
182 */
183 static void iSeries_enable_IRQ(unsigned int irq)
184 {
185 u32 bus, deviceId, function, mask;
186 const u32 subBus = 0;
187 unsigned int rirq = virt_irq_to_real_map[irq];
188
189 /* The IRQ has already been locked by the caller */
190 bus = REAL_IRQ_TO_BUS(rirq);
191 function = REAL_IRQ_TO_FUNC(rirq);
192 deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
193
194 /* Unmask secondary INTA */
195 mask = 0x80000000;
196 HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
197 PPCDBG(PPCDBG_BUSWALK, "iSeries_enable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
198 bus, subBus, deviceId, irq);
199 }
200
201 /*
202 * Need to define this so ppc_irq_dispatch_handler will NOT call
203 * enable_IRQ at the end of interrupt handling. However, this does
204 * nothing because there is not enough information provided to do
205 * the EOI HvCall. This is done by XmPciLpEvent.c
206 */
207 static void iSeries_end_IRQ(unsigned int irq)
208 {
209 }
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