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Merge branches 'pm-domains' and 'pm-cpuidle' into linux-next
[deliverable/linux.git] / arch / s390 / kernel / entry.S
1 /*
2 * S390 low-level entry points.
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
20 #include <asm/page.h>
21 #include <asm/sigp.h>
22 #include <asm/irq.h>
23 #include <asm/vx-insn.h>
24 #include <asm/setup.h>
25 #include <asm/nmi.h>
26
27 __PT_R0 = __PT_GPRS
28 __PT_R1 = __PT_GPRS + 8
29 __PT_R2 = __PT_GPRS + 16
30 __PT_R3 = __PT_GPRS + 24
31 __PT_R4 = __PT_GPRS + 32
32 __PT_R5 = __PT_GPRS + 40
33 __PT_R6 = __PT_GPRS + 48
34 __PT_R7 = __PT_GPRS + 56
35 __PT_R8 = __PT_GPRS + 64
36 __PT_R9 = __PT_GPRS + 72
37 __PT_R10 = __PT_GPRS + 80
38 __PT_R11 = __PT_GPRS + 88
39 __PT_R12 = __PT_GPRS + 96
40 __PT_R13 = __PT_GPRS + 104
41 __PT_R14 = __PT_GPRS + 112
42 __PT_R15 = __PT_GPRS + 120
43
44 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
45 STACK_SIZE = 1 << STACK_SHIFT
46 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
47
48 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
49 _TIF_UPROBE)
50 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
51 _TIF_SYSCALL_TRACEPOINT)
52 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU)
53 _PIF_WORK = (_PIF_PER_TRAP)
54
55 #define BASED(name) name-cleanup_critical(%r13)
56
57 .macro TRACE_IRQS_ON
58 #ifdef CONFIG_TRACE_IRQFLAGS
59 basr %r2,%r0
60 brasl %r14,trace_hardirqs_on_caller
61 #endif
62 .endm
63
64 .macro TRACE_IRQS_OFF
65 #ifdef CONFIG_TRACE_IRQFLAGS
66 basr %r2,%r0
67 brasl %r14,trace_hardirqs_off_caller
68 #endif
69 .endm
70
71 .macro LOCKDEP_SYS_EXIT
72 #ifdef CONFIG_LOCKDEP
73 tm __PT_PSW+1(%r11),0x01 # returning to user ?
74 jz .+10
75 brasl %r14,lockdep_sys_exit
76 #endif
77 .endm
78
79 .macro CHECK_STACK stacksize,savearea
80 #ifdef CONFIG_CHECK_STACK
81 tml %r15,\stacksize - CONFIG_STACK_GUARD
82 lghi %r14,\savearea
83 jz stack_overflow
84 #endif
85 .endm
86
87 .macro SWITCH_ASYNC savearea,timer
88 tmhh %r8,0x0001 # interrupting from user ?
89 jnz 1f
90 lgr %r14,%r9
91 slg %r14,BASED(.Lcritical_start)
92 clg %r14,BASED(.Lcritical_length)
93 jhe 0f
94 lghi %r11,\savearea # inside critical section, do cleanup
95 brasl %r14,cleanup_critical
96 tmhh %r8,0x0001 # retest problem state after cleanup
97 jnz 1f
98 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
99 slgr %r14,%r15
100 srag %r14,%r14,STACK_SHIFT
101 jnz 2f
102 CHECK_STACK 1<<STACK_SHIFT,\savearea
103 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
104 j 3f
105 1: LAST_BREAK %r14
106 UPDATE_VTIME %r14,%r15,\timer
107 2: lg %r15,__LC_ASYNC_STACK # load async stack
108 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
109 .endm
110
111 .macro UPDATE_VTIME w1,w2,enter_timer
112 lg \w1,__LC_EXIT_TIMER
113 lg \w2,__LC_LAST_UPDATE_TIMER
114 slg \w1,\enter_timer
115 slg \w2,__LC_EXIT_TIMER
116 alg \w1,__LC_USER_TIMER
117 alg \w2,__LC_SYSTEM_TIMER
118 stg \w1,__LC_USER_TIMER
119 stg \w2,__LC_SYSTEM_TIMER
120 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
121 .endm
122
123 .macro LAST_BREAK scratch
124 srag \scratch,%r10,23
125 jz .+10
126 stg %r10,__TI_last_break(%r12)
127 .endm
128
129 .macro REENABLE_IRQS
130 stg %r8,__LC_RETURN_PSW
131 ni __LC_RETURN_PSW,0xbf
132 ssm __LC_RETURN_PSW
133 .endm
134
135 .macro STCK savearea
136 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
137 .insn s,0xb27c0000,\savearea # store clock fast
138 #else
139 .insn s,0xb2050000,\savearea # store clock
140 #endif
141 .endm
142
143 /*
144 * The TSTMSK macro generates a test-under-mask instruction by
145 * calculating the memory offset for the specified mask value.
146 * Mask value can be any constant. The macro shifts the mask
147 * value to calculate the memory offset for the test-under-mask
148 * instruction.
149 */
150 .macro TSTMSK addr, mask, size=8, bytepos=0
151 .if (\bytepos < \size) && (\mask >> 8)
152 .if (\mask & 0xff)
153 .error "Mask exceeds byte boundary"
154 .endif
155 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
156 .exitm
157 .endif
158 .ifeq \mask
159 .error "Mask must not be zero"
160 .endif
161 off = \size - \bytepos - 1
162 tm off+\addr, \mask
163 .endm
164
165 .section .kprobes.text, "ax"
166 .Ldummy:
167 /*
168 * This nop exists only in order to avoid that __switch_to starts at
169 * the beginning of the kprobes text section. In that case we would
170 * have several symbols at the same address. E.g. objdump would take
171 * an arbitrary symbol name when disassembling this code.
172 * With the added nop in between the __switch_to symbol is unique
173 * again.
174 */
175 nop 0
176
177 /*
178 * Scheduler resume function, called by switch_to
179 * gpr2 = (task_struct *) prev
180 * gpr3 = (task_struct *) next
181 * Returns:
182 * gpr2 = prev
183 */
184 ENTRY(__switch_to)
185 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
186 lgr %r1,%r2
187 aghi %r1,__TASK_thread # thread_struct of prev task
188 lg %r5,__TASK_thread_info(%r3) # get thread_info of next
189 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
190 lgr %r1,%r3
191 aghi %r1,__TASK_thread # thread_struct of next task
192 lgr %r15,%r5
193 aghi %r15,STACK_INIT # end of kernel stack of next
194 stg %r3,__LC_CURRENT # store task struct of next
195 stg %r5,__LC_THREAD_INFO # store thread info of next
196 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
197 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
198 /* c4 is used in guest detection: arch/s390/kernel/perf_cpum_sf.c */
199 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
200 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
201 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
202 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
203 bzr %r14
204 .insn s,0xb2800000,__LC_LPP # set program parameter
205 br %r14
206
207 .L__critical_start:
208
209 #if IS_ENABLED(CONFIG_KVM)
210 /*
211 * sie64a calling convention:
212 * %r2 pointer to sie control block
213 * %r3 guest register save area
214 */
215 ENTRY(sie64a)
216 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
217 stg %r2,__SF_EMPTY(%r15) # save control block pointer
218 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
219 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
220 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
221 jno .Lsie_load_guest_gprs
222 brasl %r14,load_fpu_regs # load guest fp/vx regs
223 .Lsie_load_guest_gprs:
224 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
225 lg %r14,__LC_GMAP # get gmap pointer
226 ltgr %r14,%r14
227 jz .Lsie_gmap
228 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
229 .Lsie_gmap:
230 lg %r14,__SF_EMPTY(%r15) # get control block pointer
231 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
232 tm __SIE_PROG20+3(%r14),3 # last exit...
233 jnz .Lsie_skip
234 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
235 jo .Lsie_skip # exit if fp/vx regs changed
236 sie 0(%r14)
237 .Lsie_skip:
238 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
239 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
240 .Lsie_done:
241 # some program checks are suppressing. C code (e.g. do_protection_exception)
242 # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
243 # instructions between sie64a and .Lsie_done should not cause program
244 # interrupts. So lets use a nop (47 00 00 00) as a landing pad.
245 # See also .Lcleanup_sie
246 .Lrewind_pad:
247 nop 0
248 .globl sie_exit
249 sie_exit:
250 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
251 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
252 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
253 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
254 br %r14
255 .Lsie_fault:
256 lghi %r14,-EFAULT
257 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
258 j sie_exit
259
260 EX_TABLE(.Lrewind_pad,.Lsie_fault)
261 EX_TABLE(sie_exit,.Lsie_fault)
262 #endif
263
264 /*
265 * SVC interrupt handler routine. System calls are synchronous events and
266 * are executed with interrupts enabled.
267 */
268
269 ENTRY(system_call)
270 stpt __LC_SYNC_ENTER_TIMER
271 .Lsysc_stmg:
272 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
273 lg %r10,__LC_LAST_BREAK
274 lg %r12,__LC_THREAD_INFO
275 lghi %r14,_PIF_SYSCALL
276 .Lsysc_per:
277 lg %r15,__LC_KERNEL_STACK
278 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
279 LAST_BREAK %r13
280 .Lsysc_vtime:
281 UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER
282 stmg %r0,%r7,__PT_R0(%r11)
283 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
284 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
285 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
286 stg %r14,__PT_FLAGS(%r11)
287 .Lsysc_do_svc:
288 lg %r10,__TI_sysc_table(%r12) # address of system call table
289 llgh %r8,__PT_INT_CODE+2(%r11)
290 slag %r8,%r8,2 # shift and test for svc 0
291 jnz .Lsysc_nr_ok
292 # svc 0: system call number in %r1
293 llgfr %r1,%r1 # clear high word in r1
294 cghi %r1,NR_syscalls
295 jnl .Lsysc_nr_ok
296 sth %r1,__PT_INT_CODE+2(%r11)
297 slag %r8,%r1,2
298 .Lsysc_nr_ok:
299 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
300 stg %r2,__PT_ORIG_GPR2(%r11)
301 stg %r7,STACK_FRAME_OVERHEAD(%r15)
302 lgf %r9,0(%r8,%r10) # get system call add.
303 TSTMSK __TI_flags(%r12),_TIF_TRACE
304 jnz .Lsysc_tracesys
305 basr %r14,%r9 # call sys_xxxx
306 stg %r2,__PT_R2(%r11) # store return value
307
308 .Lsysc_return:
309 LOCKDEP_SYS_EXIT
310 .Lsysc_tif:
311 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
312 jnz .Lsysc_work
313 TSTMSK __TI_flags(%r12),_TIF_WORK
314 jnz .Lsysc_work # check for work
315 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
316 jnz .Lsysc_work
317 .Lsysc_restore:
318 lg %r14,__LC_VDSO_PER_CPU
319 lmg %r0,%r10,__PT_R0(%r11)
320 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
321 stpt __LC_EXIT_TIMER
322 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
323 lmg %r11,%r15,__PT_R11(%r11)
324 lpswe __LC_RETURN_PSW
325 .Lsysc_done:
326
327 #
328 # One of the work bits is on. Find out which one.
329 #
330 .Lsysc_work:
331 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
332 jo .Lsysc_mcck_pending
333 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
334 jo .Lsysc_reschedule
335 #ifdef CONFIG_UPROBES
336 TSTMSK __TI_flags(%r12),_TIF_UPROBE
337 jo .Lsysc_uprobe_notify
338 #endif
339 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
340 jo .Lsysc_singlestep
341 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
342 jo .Lsysc_sigpending
343 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
344 jo .Lsysc_notify_resume
345 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
346 jo .Lsysc_vxrs
347 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
348 jo .Lsysc_uaccess
349 j .Lsysc_return # beware of critical section cleanup
350
351 #
352 # _TIF_NEED_RESCHED is set, call schedule
353 #
354 .Lsysc_reschedule:
355 larl %r14,.Lsysc_return
356 jg schedule
357
358 #
359 # _CIF_MCCK_PENDING is set, call handler
360 #
361 .Lsysc_mcck_pending:
362 larl %r14,.Lsysc_return
363 jg s390_handle_mcck # TIF bit will be cleared by handler
364
365 #
366 # _CIF_ASCE is set, load user space asce
367 #
368 .Lsysc_uaccess:
369 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
370 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
371 j .Lsysc_return
372
373 #
374 # CIF_FPU is set, restore floating-point controls and floating-point registers.
375 #
376 .Lsysc_vxrs:
377 larl %r14,.Lsysc_return
378 jg load_fpu_regs
379
380 #
381 # _TIF_SIGPENDING is set, call do_signal
382 #
383 .Lsysc_sigpending:
384 lgr %r2,%r11 # pass pointer to pt_regs
385 brasl %r14,do_signal
386 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
387 jno .Lsysc_return
388 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
389 lg %r10,__TI_sysc_table(%r12) # address of system call table
390 lghi %r8,0 # svc 0 returns -ENOSYS
391 llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number
392 cghi %r1,NR_syscalls
393 jnl .Lsysc_nr_ok # invalid svc number -> do svc 0
394 slag %r8,%r1,2
395 j .Lsysc_nr_ok # restart svc
396
397 #
398 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
399 #
400 .Lsysc_notify_resume:
401 lgr %r2,%r11 # pass pointer to pt_regs
402 larl %r14,.Lsysc_return
403 jg do_notify_resume
404
405 #
406 # _TIF_UPROBE is set, call uprobe_notify_resume
407 #
408 #ifdef CONFIG_UPROBES
409 .Lsysc_uprobe_notify:
410 lgr %r2,%r11 # pass pointer to pt_regs
411 larl %r14,.Lsysc_return
412 jg uprobe_notify_resume
413 #endif
414
415 #
416 # _PIF_PER_TRAP is set, call do_per_trap
417 #
418 .Lsysc_singlestep:
419 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
420 lgr %r2,%r11 # pass pointer to pt_regs
421 larl %r14,.Lsysc_return
422 jg do_per_trap
423
424 #
425 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
426 # and after the system call
427 #
428 .Lsysc_tracesys:
429 lgr %r2,%r11 # pass pointer to pt_regs
430 la %r3,0
431 llgh %r0,__PT_INT_CODE+2(%r11)
432 stg %r0,__PT_R2(%r11)
433 brasl %r14,do_syscall_trace_enter
434 lghi %r0,NR_syscalls
435 clgr %r0,%r2
436 jnh .Lsysc_tracenogo
437 sllg %r8,%r2,2
438 lgf %r9,0(%r8,%r10)
439 .Lsysc_tracego:
440 lmg %r3,%r7,__PT_R3(%r11)
441 stg %r7,STACK_FRAME_OVERHEAD(%r15)
442 lg %r2,__PT_ORIG_GPR2(%r11)
443 basr %r14,%r9 # call sys_xxx
444 stg %r2,__PT_R2(%r11) # store return value
445 .Lsysc_tracenogo:
446 TSTMSK __TI_flags(%r12),_TIF_TRACE
447 jz .Lsysc_return
448 lgr %r2,%r11 # pass pointer to pt_regs
449 larl %r14,.Lsysc_return
450 jg do_syscall_trace_exit
451
452 #
453 # a new process exits the kernel with ret_from_fork
454 #
455 ENTRY(ret_from_fork)
456 la %r11,STACK_FRAME_OVERHEAD(%r15)
457 lg %r12,__LC_THREAD_INFO
458 brasl %r14,schedule_tail
459 TRACE_IRQS_ON
460 ssm __LC_SVC_NEW_PSW # reenable interrupts
461 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
462 jne .Lsysc_tracenogo
463 # it's a kernel thread
464 lmg %r9,%r10,__PT_R9(%r11) # load gprs
465 ENTRY(kernel_thread_starter)
466 la %r2,0(%r10)
467 basr %r14,%r9
468 j .Lsysc_tracenogo
469
470 /*
471 * Program check handler routine
472 */
473
474 ENTRY(pgm_check_handler)
475 stpt __LC_SYNC_ENTER_TIMER
476 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
477 lg %r10,__LC_LAST_BREAK
478 lg %r12,__LC_THREAD_INFO
479 larl %r13,cleanup_critical
480 lmg %r8,%r9,__LC_PGM_OLD_PSW
481 tmhh %r8,0x0001 # test problem state bit
482 jnz 2f # -> fault in user space
483 #if IS_ENABLED(CONFIG_KVM)
484 # cleanup critical section for sie64a
485 lgr %r14,%r9
486 slg %r14,BASED(.Lsie_critical_start)
487 clg %r14,BASED(.Lsie_critical_length)
488 jhe 0f
489 brasl %r14,.Lcleanup_sie
490 #endif
491 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
492 jnz 1f # -> enabled, can't be a double fault
493 tm __LC_PGM_ILC+3,0x80 # check for per exception
494 jnz .Lpgm_svcper # -> single stepped svc
495 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
496 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
497 j 3f
498 2: LAST_BREAK %r14
499 UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
500 lg %r15,__LC_KERNEL_STACK
501 lg %r14,__TI_task(%r12)
502 aghi %r14,__TASK_thread # pointer to thread_struct
503 lghi %r13,__LC_PGM_TDB
504 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
505 jz 3f
506 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
507 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
508 stmg %r0,%r7,__PT_R0(%r11)
509 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
510 stmg %r8,%r9,__PT_PSW(%r11)
511 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
512 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
513 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
514 stg %r10,__PT_ARGS(%r11)
515 tm __LC_PGM_ILC+3,0x80 # check for per exception
516 jz 4f
517 tmhh %r8,0x0001 # kernel per event ?
518 jz .Lpgm_kprobe
519 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
520 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
521 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
522 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
523 4: REENABLE_IRQS
524 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
525 larl %r1,pgm_check_table
526 llgh %r10,__PT_INT_CODE+2(%r11)
527 nill %r10,0x007f
528 sll %r10,2
529 je .Lpgm_return
530 lgf %r1,0(%r10,%r1) # load address of handler routine
531 lgr %r2,%r11 # pass pointer to pt_regs
532 basr %r14,%r1 # branch to interrupt-handler
533 .Lpgm_return:
534 LOCKDEP_SYS_EXIT
535 tm __PT_PSW+1(%r11),0x01 # returning to user ?
536 jno .Lsysc_restore
537 j .Lsysc_tif
538
539 #
540 # PER event in supervisor state, must be kprobes
541 #
542 .Lpgm_kprobe:
543 REENABLE_IRQS
544 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
545 lgr %r2,%r11 # pass pointer to pt_regs
546 brasl %r14,do_per_trap
547 j .Lpgm_return
548
549 #
550 # single stepped system call
551 #
552 .Lpgm_svcper:
553 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
554 larl %r14,.Lsysc_per
555 stg %r14,__LC_RETURN_PSW+8
556 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
557 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
558
559 /*
560 * IO interrupt handler routine
561 */
562 ENTRY(io_int_handler)
563 STCK __LC_INT_CLOCK
564 stpt __LC_ASYNC_ENTER_TIMER
565 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
566 lg %r10,__LC_LAST_BREAK
567 lg %r12,__LC_THREAD_INFO
568 larl %r13,cleanup_critical
569 lmg %r8,%r9,__LC_IO_OLD_PSW
570 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
571 stmg %r0,%r7,__PT_R0(%r11)
572 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
573 stmg %r8,%r9,__PT_PSW(%r11)
574 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
575 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
576 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
577 jo .Lio_restore
578 TRACE_IRQS_OFF
579 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
580 .Lio_loop:
581 lgr %r2,%r11 # pass pointer to pt_regs
582 lghi %r3,IO_INTERRUPT
583 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
584 jz .Lio_call
585 lghi %r3,THIN_INTERRUPT
586 .Lio_call:
587 brasl %r14,do_IRQ
588 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
589 jz .Lio_return
590 tpi 0
591 jz .Lio_return
592 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
593 j .Lio_loop
594 .Lio_return:
595 LOCKDEP_SYS_EXIT
596 TRACE_IRQS_ON
597 .Lio_tif:
598 TSTMSK __TI_flags(%r12),_TIF_WORK
599 jnz .Lio_work # there is work to do (signals etc.)
600 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
601 jnz .Lio_work
602 .Lio_restore:
603 lg %r14,__LC_VDSO_PER_CPU
604 lmg %r0,%r10,__PT_R0(%r11)
605 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
606 stpt __LC_EXIT_TIMER
607 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
608 lmg %r11,%r15,__PT_R11(%r11)
609 lpswe __LC_RETURN_PSW
610 .Lio_done:
611
612 #
613 # There is work todo, find out in which context we have been interrupted:
614 # 1) if we return to user space we can do all _TIF_WORK work
615 # 2) if we return to kernel code and kvm is enabled check if we need to
616 # modify the psw to leave SIE
617 # 3) if we return to kernel code and preemptive scheduling is enabled check
618 # the preemption counter and if it is zero call preempt_schedule_irq
619 # Before any work can be done, a switch to the kernel stack is required.
620 #
621 .Lio_work:
622 tm __PT_PSW+1(%r11),0x01 # returning to user ?
623 jo .Lio_work_user # yes -> do resched & signal
624 #ifdef CONFIG_PREEMPT
625 # check for preemptive scheduling
626 icm %r0,15,__TI_precount(%r12)
627 jnz .Lio_restore # preemption is disabled
628 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
629 jno .Lio_restore
630 # switch to kernel stack
631 lg %r1,__PT_R15(%r11)
632 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
633 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
634 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
635 la %r11,STACK_FRAME_OVERHEAD(%r1)
636 lgr %r15,%r1
637 # TRACE_IRQS_ON already done at .Lio_return, call
638 # TRACE_IRQS_OFF to keep things symmetrical
639 TRACE_IRQS_OFF
640 brasl %r14,preempt_schedule_irq
641 j .Lio_return
642 #else
643 j .Lio_restore
644 #endif
645
646 #
647 # Need to do work before returning to userspace, switch to kernel stack
648 #
649 .Lio_work_user:
650 lg %r1,__LC_KERNEL_STACK
651 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
652 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
653 la %r11,STACK_FRAME_OVERHEAD(%r1)
654 lgr %r15,%r1
655
656 #
657 # One of the work bits is on. Find out which one.
658 #
659 .Lio_work_tif:
660 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
661 jo .Lio_mcck_pending
662 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
663 jo .Lio_reschedule
664 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
665 jo .Lio_sigpending
666 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
667 jo .Lio_notify_resume
668 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
669 jo .Lio_vxrs
670 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE
671 jo .Lio_uaccess
672 j .Lio_return # beware of critical section cleanup
673
674 #
675 # _CIF_MCCK_PENDING is set, call handler
676 #
677 .Lio_mcck_pending:
678 # TRACE_IRQS_ON already done at .Lio_return
679 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
680 TRACE_IRQS_OFF
681 j .Lio_return
682
683 #
684 # _CIF_ASCE is set, load user space asce
685 #
686 .Lio_uaccess:
687 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE
688 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
689 j .Lio_return
690
691 #
692 # CIF_FPU is set, restore floating-point controls and floating-point registers.
693 #
694 .Lio_vxrs:
695 larl %r14,.Lio_return
696 jg load_fpu_regs
697
698 #
699 # _TIF_NEED_RESCHED is set, call schedule
700 #
701 .Lio_reschedule:
702 # TRACE_IRQS_ON already done at .Lio_return
703 ssm __LC_SVC_NEW_PSW # reenable interrupts
704 brasl %r14,schedule # call scheduler
705 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
706 TRACE_IRQS_OFF
707 j .Lio_return
708
709 #
710 # _TIF_SIGPENDING or is set, call do_signal
711 #
712 .Lio_sigpending:
713 # TRACE_IRQS_ON already done at .Lio_return
714 ssm __LC_SVC_NEW_PSW # reenable interrupts
715 lgr %r2,%r11 # pass pointer to pt_regs
716 brasl %r14,do_signal
717 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
718 TRACE_IRQS_OFF
719 j .Lio_return
720
721 #
722 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
723 #
724 .Lio_notify_resume:
725 # TRACE_IRQS_ON already done at .Lio_return
726 ssm __LC_SVC_NEW_PSW # reenable interrupts
727 lgr %r2,%r11 # pass pointer to pt_regs
728 brasl %r14,do_notify_resume
729 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
730 TRACE_IRQS_OFF
731 j .Lio_return
732
733 /*
734 * External interrupt handler routine
735 */
736 ENTRY(ext_int_handler)
737 STCK __LC_INT_CLOCK
738 stpt __LC_ASYNC_ENTER_TIMER
739 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
740 lg %r10,__LC_LAST_BREAK
741 lg %r12,__LC_THREAD_INFO
742 larl %r13,cleanup_critical
743 lmg %r8,%r9,__LC_EXT_OLD_PSW
744 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
745 stmg %r0,%r7,__PT_R0(%r11)
746 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
747 stmg %r8,%r9,__PT_PSW(%r11)
748 lghi %r1,__LC_EXT_PARAMS2
749 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
750 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
751 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
752 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
753 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
754 jo .Lio_restore
755 TRACE_IRQS_OFF
756 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
757 lgr %r2,%r11 # pass pointer to pt_regs
758 lghi %r3,EXT_INTERRUPT
759 brasl %r14,do_IRQ
760 j .Lio_return
761
762 /*
763 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
764 */
765 ENTRY(psw_idle)
766 stg %r3,__SF_EMPTY(%r15)
767 larl %r1,.Lpsw_idle_lpsw+4
768 stg %r1,__SF_EMPTY+8(%r15)
769 #ifdef CONFIG_SMP
770 larl %r1,smp_cpu_mtid
771 llgf %r1,0(%r1)
772 ltgr %r1,%r1
773 jz .Lpsw_idle_stcctm
774 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
775 .Lpsw_idle_stcctm:
776 #endif
777 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
778 STCK __CLOCK_IDLE_ENTER(%r2)
779 stpt __TIMER_IDLE_ENTER(%r2)
780 .Lpsw_idle_lpsw:
781 lpswe __SF_EMPTY(%r15)
782 br %r14
783 .Lpsw_idle_end:
784
785 /*
786 * Store floating-point controls and floating-point or vector register
787 * depending whether the vector facility is available. A critical section
788 * cleanup assures that the registers are stored even if interrupted for
789 * some other work. The CIF_FPU flag is set to trigger a lazy restore
790 * of the register contents at return from io or a system call.
791 */
792 ENTRY(save_fpu_regs)
793 lg %r2,__LC_CURRENT
794 aghi %r2,__TASK_thread
795 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
796 bor %r14
797 stfpc __THREAD_FPU_fpc(%r2)
798 .Lsave_fpu_regs_fpc_end:
799 lg %r3,__THREAD_FPU_regs(%r2)
800 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
801 jz .Lsave_fpu_regs_fp # no -> store FP regs
802 .Lsave_fpu_regs_vx_low:
803 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
804 .Lsave_fpu_regs_vx_high:
805 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
806 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
807 .Lsave_fpu_regs_fp:
808 std 0,0(%r3)
809 std 1,8(%r3)
810 std 2,16(%r3)
811 std 3,24(%r3)
812 std 4,32(%r3)
813 std 5,40(%r3)
814 std 6,48(%r3)
815 std 7,56(%r3)
816 std 8,64(%r3)
817 std 9,72(%r3)
818 std 10,80(%r3)
819 std 11,88(%r3)
820 std 12,96(%r3)
821 std 13,104(%r3)
822 std 14,112(%r3)
823 std 15,120(%r3)
824 .Lsave_fpu_regs_done:
825 oi __LC_CPU_FLAGS+7,_CIF_FPU
826 br %r14
827 .Lsave_fpu_regs_end:
828
829 /*
830 * Load floating-point controls and floating-point or vector registers.
831 * A critical section cleanup assures that the register contents are
832 * loaded even if interrupted for some other work.
833 *
834 * There are special calling conventions to fit into sysc and io return work:
835 * %r15: <kernel stack>
836 * The function requires:
837 * %r4
838 */
839 load_fpu_regs:
840 lg %r4,__LC_CURRENT
841 aghi %r4,__TASK_thread
842 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
843 bnor %r14
844 lfpc __THREAD_FPU_fpc(%r4)
845 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
846 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
847 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
848 .Lload_fpu_regs_vx:
849 VLM %v0,%v15,0,%r4
850 .Lload_fpu_regs_vx_high:
851 VLM %v16,%v31,256,%r4
852 j .Lload_fpu_regs_done
853 .Lload_fpu_regs_fp:
854 ld 0,0(%r4)
855 ld 1,8(%r4)
856 ld 2,16(%r4)
857 ld 3,24(%r4)
858 ld 4,32(%r4)
859 ld 5,40(%r4)
860 ld 6,48(%r4)
861 ld 7,56(%r4)
862 ld 8,64(%r4)
863 ld 9,72(%r4)
864 ld 10,80(%r4)
865 ld 11,88(%r4)
866 ld 12,96(%r4)
867 ld 13,104(%r4)
868 ld 14,112(%r4)
869 ld 15,120(%r4)
870 .Lload_fpu_regs_done:
871 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
872 br %r14
873 .Lload_fpu_regs_end:
874
875 .L__critical_end:
876
877 /*
878 * Machine check handler routines
879 */
880 ENTRY(mcck_int_handler)
881 STCK __LC_MCCK_CLOCK
882 la %r1,4095 # revalidate r1
883 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
884 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
885 lg %r10,__LC_LAST_BREAK
886 lg %r12,__LC_THREAD_INFO
887 larl %r13,cleanup_critical
888 lmg %r8,%r9,__LC_MCK_OLD_PSW
889 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
890 jo .Lmcck_panic # yes -> rest of mcck code invalid
891 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
892 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
893 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
894 jo 3f
895 la %r14,__LC_SYNC_ENTER_TIMER
896 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
897 jl 0f
898 la %r14,__LC_ASYNC_ENTER_TIMER
899 0: clc 0(8,%r14),__LC_EXIT_TIMER
900 jl 1f
901 la %r14,__LC_EXIT_TIMER
902 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
903 jl 2f
904 la %r14,__LC_LAST_UPDATE_TIMER
905 2: spt 0(%r14)
906 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
907 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
908 jno .Lmcck_panic # no -> skip cleanup critical
909 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
910 .Lmcck_skip:
911 lghi %r14,__LC_GPREGS_SAVE_AREA+64
912 stmg %r0,%r7,__PT_R0(%r11)
913 mvc __PT_R8(64,%r11),0(%r14)
914 stmg %r8,%r9,__PT_PSW(%r11)
915 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
916 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
917 lgr %r2,%r11 # pass pointer to pt_regs
918 brasl %r14,s390_do_machine_check
919 tm __PT_PSW+1(%r11),0x01 # returning to user ?
920 jno .Lmcck_return
921 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
922 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
923 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
924 la %r11,STACK_FRAME_OVERHEAD(%r1)
925 lgr %r15,%r1
926 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
927 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
928 jno .Lmcck_return
929 TRACE_IRQS_OFF
930 brasl %r14,s390_handle_mcck
931 TRACE_IRQS_ON
932 .Lmcck_return:
933 lg %r14,__LC_VDSO_PER_CPU
934 lmg %r0,%r10,__PT_R0(%r11)
935 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
936 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
937 jno 0f
938 stpt __LC_EXIT_TIMER
939 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
940 0: lmg %r11,%r15,__PT_R11(%r11)
941 lpswe __LC_RETURN_MCCK_PSW
942
943 .Lmcck_panic:
944 lg %r15,__LC_PANIC_STACK
945 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
946 j .Lmcck_skip
947
948 #
949 # PSW restart interrupt handler
950 #
951 ENTRY(restart_int_handler)
952 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
953 jz 0f
954 .insn s,0xb2800000,__LC_LPP
955 0: stg %r15,__LC_SAVE_AREA_RESTART
956 lg %r15,__LC_RESTART_STACK
957 aghi %r15,-__PT_SIZE # create pt_regs on stack
958 xc 0(__PT_SIZE,%r15),0(%r15)
959 stmg %r0,%r14,__PT_R0(%r15)
960 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
961 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
962 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
963 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
964 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
965 lg %r2,__LC_RESTART_DATA
966 lg %r3,__LC_RESTART_SOURCE
967 ltgr %r3,%r3 # test source cpu address
968 jm 1f # negative -> skip source stop
969 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
970 brc 10,0b # wait for status stored
971 1: basr %r14,%r1 # call function
972 stap __SF_EMPTY(%r15) # store cpu address
973 llgh %r3,__SF_EMPTY(%r15)
974 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
975 brc 2,2b
976 3: j 3b
977
978 .section .kprobes.text, "ax"
979
980 #ifdef CONFIG_CHECK_STACK
981 /*
982 * The synchronous or the asynchronous stack overflowed. We are dead.
983 * No need to properly save the registers, we are going to panic anyway.
984 * Setup a pt_regs so that show_trace can provide a good call trace.
985 */
986 stack_overflow:
987 lg %r15,__LC_PANIC_STACK # change to panic stack
988 la %r11,STACK_FRAME_OVERHEAD(%r15)
989 stmg %r0,%r7,__PT_R0(%r11)
990 stmg %r8,%r9,__PT_PSW(%r11)
991 mvc __PT_R8(64,%r11),0(%r14)
992 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
993 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
994 lgr %r2,%r11 # pass pointer to pt_regs
995 jg kernel_stack_overflow
996 #endif
997
998 cleanup_critical:
999 #if IS_ENABLED(CONFIG_KVM)
1000 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1001 jl 0f
1002 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1003 jl .Lcleanup_sie
1004 #endif
1005 clg %r9,BASED(.Lcleanup_table) # system_call
1006 jl 0f
1007 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1008 jl .Lcleanup_system_call
1009 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1010 jl 0f
1011 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1012 jl .Lcleanup_sysc_tif
1013 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1014 jl .Lcleanup_sysc_restore
1015 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1016 jl 0f
1017 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1018 jl .Lcleanup_io_tif
1019 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1020 jl .Lcleanup_io_restore
1021 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1022 jl 0f
1023 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1024 jl .Lcleanup_idle
1025 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1026 jl 0f
1027 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1028 jl .Lcleanup_save_fpu_regs
1029 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1030 jl 0f
1031 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1032 jl .Lcleanup_load_fpu_regs
1033 0: br %r14
1034
1035 .align 8
1036 .Lcleanup_table:
1037 .quad system_call
1038 .quad .Lsysc_do_svc
1039 .quad .Lsysc_tif
1040 .quad .Lsysc_restore
1041 .quad .Lsysc_done
1042 .quad .Lio_tif
1043 .quad .Lio_restore
1044 .quad .Lio_done
1045 .quad psw_idle
1046 .quad .Lpsw_idle_end
1047 .quad save_fpu_regs
1048 .quad .Lsave_fpu_regs_end
1049 .quad load_fpu_regs
1050 .quad .Lload_fpu_regs_end
1051
1052 #if IS_ENABLED(CONFIG_KVM)
1053 .Lcleanup_table_sie:
1054 .quad .Lsie_gmap
1055 .quad .Lsie_done
1056
1057 .Lcleanup_sie:
1058 lg %r9,__SF_EMPTY(%r15) # get control block pointer
1059 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1060 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1061 larl %r9,sie_exit # skip forward to sie_exit
1062 br %r14
1063 #endif
1064
1065 .Lcleanup_system_call:
1066 # check if stpt has been executed
1067 clg %r9,BASED(.Lcleanup_system_call_insn)
1068 jh 0f
1069 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1070 cghi %r11,__LC_SAVE_AREA_ASYNC
1071 je 0f
1072 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1073 0: # check if stmg has been executed
1074 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1075 jh 0f
1076 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1077 0: # check if base register setup + TIF bit load has been done
1078 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1079 jhe 0f
1080 # set up saved registers r10 and r12
1081 stg %r10,16(%r11) # r10 last break
1082 stg %r12,32(%r11) # r12 thread-info pointer
1083 0: # check if the user time update has been done
1084 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1085 jh 0f
1086 lg %r15,__LC_EXIT_TIMER
1087 slg %r15,__LC_SYNC_ENTER_TIMER
1088 alg %r15,__LC_USER_TIMER
1089 stg %r15,__LC_USER_TIMER
1090 0: # check if the system time update has been done
1091 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1092 jh 0f
1093 lg %r15,__LC_LAST_UPDATE_TIMER
1094 slg %r15,__LC_EXIT_TIMER
1095 alg %r15,__LC_SYSTEM_TIMER
1096 stg %r15,__LC_SYSTEM_TIMER
1097 0: # update accounting time stamp
1098 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1099 # do LAST_BREAK
1100 lg %r9,16(%r11)
1101 srag %r9,%r9,23
1102 jz 0f
1103 mvc __TI_last_break(8,%r12),16(%r11)
1104 0: # set up saved register r11
1105 lg %r15,__LC_KERNEL_STACK
1106 la %r9,STACK_FRAME_OVERHEAD(%r15)
1107 stg %r9,24(%r11) # r11 pt_regs pointer
1108 # fill pt_regs
1109 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1110 stmg %r0,%r7,__PT_R0(%r9)
1111 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1112 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1113 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1114 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1115 # setup saved register r15
1116 stg %r15,56(%r11) # r15 stack pointer
1117 # set new psw address and exit
1118 larl %r9,.Lsysc_do_svc
1119 br %r14
1120 .Lcleanup_system_call_insn:
1121 .quad system_call
1122 .quad .Lsysc_stmg
1123 .quad .Lsysc_per
1124 .quad .Lsysc_vtime+36
1125 .quad .Lsysc_vtime+42
1126
1127 .Lcleanup_sysc_tif:
1128 larl %r9,.Lsysc_tif
1129 br %r14
1130
1131 .Lcleanup_sysc_restore:
1132 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1133 je 0f
1134 lg %r9,24(%r11) # get saved pointer to pt_regs
1135 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1136 mvc 0(64,%r11),__PT_R8(%r9)
1137 lmg %r0,%r7,__PT_R0(%r9)
1138 0: lmg %r8,%r9,__LC_RETURN_PSW
1139 br %r14
1140 .Lcleanup_sysc_restore_insn:
1141 .quad .Lsysc_done - 4
1142
1143 .Lcleanup_io_tif:
1144 larl %r9,.Lio_tif
1145 br %r14
1146
1147 .Lcleanup_io_restore:
1148 clg %r9,BASED(.Lcleanup_io_restore_insn)
1149 je 0f
1150 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1151 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1152 mvc 0(64,%r11),__PT_R8(%r9)
1153 lmg %r0,%r7,__PT_R0(%r9)
1154 0: lmg %r8,%r9,__LC_RETURN_PSW
1155 br %r14
1156 .Lcleanup_io_restore_insn:
1157 .quad .Lio_done - 4
1158
1159 .Lcleanup_idle:
1160 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1161 # copy interrupt clock & cpu timer
1162 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1163 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1164 cghi %r11,__LC_SAVE_AREA_ASYNC
1165 je 0f
1166 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1167 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1168 0: # check if stck & stpt have been executed
1169 clg %r9,BASED(.Lcleanup_idle_insn)
1170 jhe 1f
1171 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1172 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1173 1: # calculate idle cycles
1174 #ifdef CONFIG_SMP
1175 clg %r9,BASED(.Lcleanup_idle_insn)
1176 jl 3f
1177 larl %r1,smp_cpu_mtid
1178 llgf %r1,0(%r1)
1179 ltgr %r1,%r1
1180 jz 3f
1181 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1182 larl %r3,mt_cycles
1183 ag %r3,__LC_PERCPU_OFFSET
1184 la %r4,__SF_EMPTY+16(%r15)
1185 2: lg %r0,0(%r3)
1186 slg %r0,0(%r4)
1187 alg %r0,64(%r4)
1188 stg %r0,0(%r3)
1189 la %r3,8(%r3)
1190 la %r4,8(%r4)
1191 brct %r1,2b
1192 #endif
1193 3: # account system time going idle
1194 lg %r9,__LC_STEAL_TIMER
1195 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1196 slg %r9,__LC_LAST_UPDATE_CLOCK
1197 stg %r9,__LC_STEAL_TIMER
1198 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1199 lg %r9,__LC_SYSTEM_TIMER
1200 alg %r9,__LC_LAST_UPDATE_TIMER
1201 slg %r9,__TIMER_IDLE_ENTER(%r2)
1202 stg %r9,__LC_SYSTEM_TIMER
1203 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1204 # prepare return psw
1205 nihh %r8,0xfcfd # clear irq & wait state bits
1206 lg %r9,48(%r11) # return from psw_idle
1207 br %r14
1208 .Lcleanup_idle_insn:
1209 .quad .Lpsw_idle_lpsw
1210
1211 .Lcleanup_save_fpu_regs:
1212 larl %r9,save_fpu_regs
1213 br %r14
1214
1215 .Lcleanup_load_fpu_regs:
1216 larl %r9,load_fpu_regs
1217 br %r14
1218
1219 /*
1220 * Integer constants
1221 */
1222 .align 8
1223 .Lcritical_start:
1224 .quad .L__critical_start
1225 .Lcritical_length:
1226 .quad .L__critical_end - .L__critical_start
1227 #if IS_ENABLED(CONFIG_KVM)
1228 .Lsie_critical_start:
1229 .quad .Lsie_gmap
1230 .Lsie_critical_length:
1231 .quad .Lsie_done - .Lsie_gmap
1232 #endif
1233
1234 .section .rodata, "a"
1235 #define SYSCALL(esame,emu) .long esame
1236 .globl sys_call_table
1237 sys_call_table:
1238 #include "syscalls.S"
1239 #undef SYSCALL
1240
1241 #ifdef CONFIG_COMPAT
1242
1243 #define SYSCALL(esame,emu) .long emu
1244 .globl sys_call_table_emu
1245 sys_call_table_emu:
1246 #include "syscalls.S"
1247 #undef SYSCALL
1248 #endif
Linux kernel - Deliverables
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