sh: Check return value of clk_get on ecovec24
[deliverable/linux.git] / arch / sh / boards / mach-ecovec24 / setup.c
1 /*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11 #include <linux/init.h>
12 #include <linux/device.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/io.h>
18 #include <linux/delay.h>
19 #include <linux/usb/r8a66597.h>
20 #include <linux/i2c.h>
21 #include <linux/i2c/tsc2007.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/sh_msiof.h>
24 #include <linux/spi/mmc_spi.h>
25 #include <linux/mmc/host.h>
26 #include <linux/input.h>
27 #include <linux/input/sh_keysc.h>
28 #include <linux/mfd/sh_mobile_sdhi.h>
29 #include <video/sh_mobile_lcdc.h>
30 #include <sound/sh_fsi.h>
31 #include <media/sh_mobile_ceu.h>
32 #include <media/tw9910.h>
33 #include <media/mt9t112.h>
34 #include <asm/heartbeat.h>
35 #include <asm/sh_eth.h>
36 #include <asm/clock.h>
37 #include <asm/suspend.h>
38 #include <cpu/sh7724.h>
39
40 /*
41 * Address Interface BusWidth
42 *-----------------------------------------
43 * 0x0000_0000 uboot 16bit
44 * 0x0004_0000 Linux romImage 16bit
45 * 0x0014_0000 MTD for Linux 16bit
46 * 0x0400_0000 Internal I/O 16/32bit
47 * 0x0800_0000 DRAM 32bit
48 * 0x1800_0000 MFI 16bit
49 */
50
51 /* SWITCH
52 *------------------------------
53 * DS2[1] = FlashROM write protect ON : write protect
54 * OFF : No write protect
55 * DS2[2] = RMII / TS, SCIF ON : RMII
56 * OFF : TS, SCIF3
57 * DS2[3] = Camera / Video ON : Camera
58 * OFF : NTSC/PAL (IN)
59 * DS2[5] = NTSC_OUT Clock ON : On board OSC
60 * OFF : SH7724 DV_CLK
61 * DS2[6-7] = MMC / SD ON-OFF : SD
62 * OFF-ON : MMC
63 */
64
65 /* Heartbeat */
66 static unsigned char led_pos[] = { 0, 1, 2, 3 };
67
68 static struct heartbeat_data heartbeat_data = {
69 .nr_bits = 4,
70 .bit_pos = led_pos,
71 };
72
73 static struct resource heartbeat_resource = {
74 .start = 0xA405012C, /* PTG */
75 .end = 0xA405012E - 1,
76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
77 };
78
79 static struct platform_device heartbeat_device = {
80 .name = "heartbeat",
81 .id = -1,
82 .dev = {
83 .platform_data = &heartbeat_data,
84 },
85 .num_resources = 1,
86 .resource = &heartbeat_resource,
87 };
88
89 /* MTD */
90 static struct mtd_partition nor_flash_partitions[] = {
91 {
92 .name = "boot loader",
93 .offset = 0,
94 .size = (5 * 1024 * 1024),
95 .mask_flags = MTD_WRITEABLE, /* force read-only */
96 }, {
97 .name = "free-area",
98 .offset = MTDPART_OFS_APPEND,
99 .size = MTDPART_SIZ_FULL,
100 },
101 };
102
103 static struct physmap_flash_data nor_flash_data = {
104 .width = 2,
105 .parts = nor_flash_partitions,
106 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
107 };
108
109 static struct resource nor_flash_resources[] = {
110 [0] = {
111 .name = "NOR Flash",
112 .start = 0x00000000,
113 .end = 0x03ffffff,
114 .flags = IORESOURCE_MEM,
115 }
116 };
117
118 static struct platform_device nor_flash_device = {
119 .name = "physmap-flash",
120 .resource = nor_flash_resources,
121 .num_resources = ARRAY_SIZE(nor_flash_resources),
122 .dev = {
123 .platform_data = &nor_flash_data,
124 },
125 };
126
127 /* SH Eth */
128 #define SH_ETH_ADDR (0xA4600000)
129 static struct resource sh_eth_resources[] = {
130 [0] = {
131 .start = SH_ETH_ADDR,
132 .end = SH_ETH_ADDR + 0x1FC,
133 .flags = IORESOURCE_MEM,
134 },
135 [1] = {
136 .start = 91,
137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
138 },
139 };
140
141 struct sh_eth_plat_data sh_eth_plat = {
142 .phy = 0x1f, /* SMSC LAN8700 */
143 .edmac_endian = EDMAC_LITTLE_ENDIAN,
144 .ether_link_active_low = 1
145 };
146
147 static struct platform_device sh_eth_device = {
148 .name = "sh-eth",
149 .id = 0,
150 .dev = {
151 .platform_data = &sh_eth_plat,
152 },
153 .num_resources = ARRAY_SIZE(sh_eth_resources),
154 .resource = sh_eth_resources,
155 .archdata = {
156 .hwblk_id = HWBLK_ETHER,
157 },
158 };
159
160 /* USB0 host */
161 void usb0_port_power(int port, int power)
162 {
163 gpio_set_value(GPIO_PTB4, power);
164 }
165
166 static struct r8a66597_platdata usb0_host_data = {
167 .on_chip = 1,
168 .port_power = usb0_port_power,
169 };
170
171 static struct resource usb0_host_resources[] = {
172 [0] = {
173 .start = 0xa4d80000,
174 .end = 0xa4d80124 - 1,
175 .flags = IORESOURCE_MEM,
176 },
177 [1] = {
178 .start = 65,
179 .end = 65,
180 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
181 },
182 };
183
184 static struct platform_device usb0_host_device = {
185 .name = "r8a66597_hcd",
186 .id = 0,
187 .dev = {
188 .dma_mask = NULL, /* not use dma */
189 .coherent_dma_mask = 0xffffffff,
190 .platform_data = &usb0_host_data,
191 },
192 .num_resources = ARRAY_SIZE(usb0_host_resources),
193 .resource = usb0_host_resources,
194 };
195
196 /* USB1 host/function */
197 void usb1_port_power(int port, int power)
198 {
199 gpio_set_value(GPIO_PTB5, power);
200 }
201
202 static struct r8a66597_platdata usb1_common_data = {
203 .on_chip = 1,
204 .port_power = usb1_port_power,
205 };
206
207 static struct resource usb1_common_resources[] = {
208 [0] = {
209 .start = 0xa4d90000,
210 .end = 0xa4d90124 - 1,
211 .flags = IORESOURCE_MEM,
212 },
213 [1] = {
214 .start = 66,
215 .end = 66,
216 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
217 },
218 };
219
220 static struct platform_device usb1_common_device = {
221 /* .name will be added in arch_setup */
222 .id = 1,
223 .dev = {
224 .dma_mask = NULL, /* not use dma */
225 .coherent_dma_mask = 0xffffffff,
226 .platform_data = &usb1_common_data,
227 },
228 .num_resources = ARRAY_SIZE(usb1_common_resources),
229 .resource = usb1_common_resources,
230 };
231
232 /* LCDC */
233 static struct sh_mobile_lcdc_info lcdc_info = {
234 .ch[0] = {
235 .interface_type = RGB18,
236 .chan = LCDC_CHAN_MAINLCD,
237 .bpp = 16,
238 .lcd_cfg = {
239 .sync = 0, /* hsync and vsync are active low */
240 },
241 .lcd_size_cfg = { /* 7.0 inch */
242 .width = 152,
243 .height = 91,
244 },
245 .board_cfg = {
246 },
247 }
248 };
249
250 static struct resource lcdc_resources[] = {
251 [0] = {
252 .name = "LCDC",
253 .start = 0xfe940000,
254 .end = 0xfe942fff,
255 .flags = IORESOURCE_MEM,
256 },
257 [1] = {
258 .start = 106,
259 .flags = IORESOURCE_IRQ,
260 },
261 };
262
263 static struct platform_device lcdc_device = {
264 .name = "sh_mobile_lcdc_fb",
265 .num_resources = ARRAY_SIZE(lcdc_resources),
266 .resource = lcdc_resources,
267 .dev = {
268 .platform_data = &lcdc_info,
269 },
270 .archdata = {
271 .hwblk_id = HWBLK_LCDC,
272 },
273 };
274
275 /* CEU0 */
276 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
277 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
278 };
279
280 static struct resource ceu0_resources[] = {
281 [0] = {
282 .name = "CEU0",
283 .start = 0xfe910000,
284 .end = 0xfe91009f,
285 .flags = IORESOURCE_MEM,
286 },
287 [1] = {
288 .start = 52,
289 .flags = IORESOURCE_IRQ,
290 },
291 [2] = {
292 /* place holder for contiguous memory */
293 },
294 };
295
296 static struct platform_device ceu0_device = {
297 .name = "sh_mobile_ceu",
298 .id = 0, /* "ceu0" clock */
299 .num_resources = ARRAY_SIZE(ceu0_resources),
300 .resource = ceu0_resources,
301 .dev = {
302 .platform_data = &sh_mobile_ceu0_info,
303 },
304 .archdata = {
305 .hwblk_id = HWBLK_CEU0,
306 },
307 };
308
309 /* CEU1 */
310 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
311 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
312 };
313
314 static struct resource ceu1_resources[] = {
315 [0] = {
316 .name = "CEU1",
317 .start = 0xfe914000,
318 .end = 0xfe91409f,
319 .flags = IORESOURCE_MEM,
320 },
321 [1] = {
322 .start = 63,
323 .flags = IORESOURCE_IRQ,
324 },
325 [2] = {
326 /* place holder for contiguous memory */
327 },
328 };
329
330 static struct platform_device ceu1_device = {
331 .name = "sh_mobile_ceu",
332 .id = 1, /* "ceu1" clock */
333 .num_resources = ARRAY_SIZE(ceu1_resources),
334 .resource = ceu1_resources,
335 .dev = {
336 .platform_data = &sh_mobile_ceu1_info,
337 },
338 .archdata = {
339 .hwblk_id = HWBLK_CEU1,
340 },
341 };
342
343 /* I2C device */
344 static struct i2c_board_info i2c0_devices[] = {
345 {
346 I2C_BOARD_INFO("da7210", 0x1a),
347 },
348 };
349
350 static struct i2c_board_info i2c1_devices[] = {
351 {
352 I2C_BOARD_INFO("r2025sd", 0x32),
353 },
354 {
355 I2C_BOARD_INFO("lis3lv02d", 0x1c),
356 .irq = 33,
357 }
358 };
359
360 /* KEYSC */
361 static struct sh_keysc_info keysc_info = {
362 .mode = SH_KEYSC_MODE_1,
363 .scan_timing = 3,
364 .delay = 50,
365 .kycr2_delay = 100,
366 .keycodes = { KEY_1, 0, 0, 0, 0,
367 KEY_2, 0, 0, 0, 0,
368 KEY_3, 0, 0, 0, 0,
369 KEY_4, 0, 0, 0, 0,
370 KEY_5, 0, 0, 0, 0,
371 KEY_6, 0, 0, 0, 0, },
372 };
373
374 static struct resource keysc_resources[] = {
375 [0] = {
376 .name = "KEYSC",
377 .start = 0x044b0000,
378 .end = 0x044b000f,
379 .flags = IORESOURCE_MEM,
380 },
381 [1] = {
382 .start = 79,
383 .flags = IORESOURCE_IRQ,
384 },
385 };
386
387 static struct platform_device keysc_device = {
388 .name = "sh_keysc",
389 .id = 0, /* keysc0 clock */
390 .num_resources = ARRAY_SIZE(keysc_resources),
391 .resource = keysc_resources,
392 .dev = {
393 .platform_data = &keysc_info,
394 },
395 .archdata = {
396 .hwblk_id = HWBLK_KEYSC,
397 },
398 };
399
400 /* TouchScreen */
401 #define IRQ0 32
402 static int ts_get_pendown_state(void)
403 {
404 int val = 0;
405 gpio_free(GPIO_FN_INTC_IRQ0);
406 gpio_request(GPIO_PTZ0, NULL);
407 gpio_direction_input(GPIO_PTZ0);
408
409 val = gpio_get_value(GPIO_PTZ0);
410
411 gpio_free(GPIO_PTZ0);
412 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
413
414 return val ? 0 : 1;
415 }
416
417 static int ts_init(void)
418 {
419 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
420 return 0;
421 }
422
423 struct tsc2007_platform_data tsc2007_info = {
424 .model = 2007,
425 .x_plate_ohms = 180,
426 .get_pendown_state = ts_get_pendown_state,
427 .init_platform_hw = ts_init,
428 };
429
430 static struct i2c_board_info ts_i2c_clients = {
431 I2C_BOARD_INFO("tsc2007", 0x48),
432 .type = "tsc2007",
433 .platform_data = &tsc2007_info,
434 .irq = IRQ0,
435 };
436
437 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
438 /* SHDI0 */
439 static void sdhi0_set_pwr(struct platform_device *pdev, int state)
440 {
441 gpio_set_value(GPIO_PTB6, state);
442 }
443
444 static struct sh_mobile_sdhi_info sdhi0_info = {
445 .set_pwr = sdhi0_set_pwr,
446 };
447
448 static struct resource sdhi0_resources[] = {
449 [0] = {
450 .name = "SDHI0",
451 .start = 0x04ce0000,
452 .end = 0x04ce01ff,
453 .flags = IORESOURCE_MEM,
454 },
455 [1] = {
456 .start = 100,
457 .flags = IORESOURCE_IRQ,
458 },
459 };
460
461 static struct platform_device sdhi0_device = {
462 .name = "sh_mobile_sdhi",
463 .num_resources = ARRAY_SIZE(sdhi0_resources),
464 .resource = sdhi0_resources,
465 .id = 0,
466 .dev = {
467 .platform_data = &sdhi0_info,
468 },
469 .archdata = {
470 .hwblk_id = HWBLK_SDHI0,
471 },
472 };
473
474 /* SHDI1 */
475 static void sdhi1_set_pwr(struct platform_device *pdev, int state)
476 {
477 gpio_set_value(GPIO_PTB7, state);
478 }
479
480 static struct sh_mobile_sdhi_info sdhi1_info = {
481 .set_pwr = sdhi1_set_pwr,
482 };
483
484 static struct resource sdhi1_resources[] = {
485 [0] = {
486 .name = "SDHI1",
487 .start = 0x04cf0000,
488 .end = 0x04cf01ff,
489 .flags = IORESOURCE_MEM,
490 },
491 [1] = {
492 .start = 23,
493 .flags = IORESOURCE_IRQ,
494 },
495 };
496
497 static struct platform_device sdhi1_device = {
498 .name = "sh_mobile_sdhi",
499 .num_resources = ARRAY_SIZE(sdhi1_resources),
500 .resource = sdhi1_resources,
501 .id = 1,
502 .dev = {
503 .platform_data = &sdhi1_info,
504 },
505 .archdata = {
506 .hwblk_id = HWBLK_SDHI1,
507 },
508 };
509
510 #else
511
512 /* MMC SPI */
513 static int mmc_spi_get_ro(struct device *dev)
514 {
515 return gpio_get_value(GPIO_PTY6);
516 }
517
518 static int mmc_spi_get_cd(struct device *dev)
519 {
520 return !gpio_get_value(GPIO_PTY7);
521 }
522
523 static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
524 {
525 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
526 }
527
528 static struct mmc_spi_platform_data mmc_spi_info = {
529 .get_ro = mmc_spi_get_ro,
530 .get_cd = mmc_spi_get_cd,
531 .caps = MMC_CAP_NEEDS_POLL,
532 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
533 .setpower = mmc_spi_setpower,
534 };
535
536 static struct spi_board_info spi_bus[] = {
537 {
538 .modalias = "mmc_spi",
539 .platform_data = &mmc_spi_info,
540 .max_speed_hz = 5000000,
541 .mode = SPI_MODE_0,
542 .controller_data = (void *) GPIO_PTM4,
543 },
544 };
545
546 /* MSIOF0 */
547 static struct sh_msiof_spi_info msiof0_data = {
548 .num_chipselect = 1,
549 };
550
551 static struct resource msiof0_resources[] = {
552 [0] = {
553 .name = "MSIOF0",
554 .start = 0xa4c40000,
555 .end = 0xa4c40063,
556 .flags = IORESOURCE_MEM,
557 },
558 [1] = {
559 .start = 84,
560 .flags = IORESOURCE_IRQ,
561 },
562 };
563
564 static struct platform_device msiof0_device = {
565 .name = "spi_sh_msiof",
566 .id = 0, /* MSIOF0 */
567 .dev = {
568 .platform_data = &msiof0_data,
569 },
570 .num_resources = ARRAY_SIZE(msiof0_resources),
571 .resource = msiof0_resources,
572 .archdata = {
573 .hwblk_id = HWBLK_MSIOF0,
574 },
575 };
576
577 #endif
578
579 /* I2C Video/Camera */
580 static struct i2c_board_info i2c_camera[] = {
581 {
582 I2C_BOARD_INFO("tw9910", 0x45),
583 },
584 {
585 /* 1st camera */
586 I2C_BOARD_INFO("mt9t112", 0x3c),
587 },
588 {
589 /* 2nd camera */
590 I2C_BOARD_INFO("mt9t112", 0x3c),
591 },
592 };
593
594 /* tw9910 */
595 static int tw9910_power(struct device *dev, int mode)
596 {
597 int val = mode ? 0 : 1;
598
599 gpio_set_value(GPIO_PTU2, val);
600 if (mode)
601 mdelay(100);
602
603 return 0;
604 }
605
606 static struct tw9910_video_info tw9910_info = {
607 .buswidth = SOCAM_DATAWIDTH_8,
608 .mpout = TW9910_MPO_FIELD,
609 };
610
611 static struct soc_camera_link tw9910_link = {
612 .i2c_adapter_id = 0,
613 .bus_id = 1,
614 .power = tw9910_power,
615 .board_info = &i2c_camera[0],
616 .module_name = "tw9910",
617 .priv = &tw9910_info,
618 };
619
620 /* mt9t112 */
621 static int mt9t112_power1(struct device *dev, int mode)
622 {
623 gpio_set_value(GPIO_PTA3, mode);
624 if (mode)
625 mdelay(100);
626
627 return 0;
628 }
629
630 static struct mt9t112_camera_info mt9t112_info1 = {
631 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
632 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
633 };
634
635 static struct soc_camera_link mt9t112_link1 = {
636 .i2c_adapter_id = 0,
637 .power = mt9t112_power1,
638 .bus_id = 0,
639 .board_info = &i2c_camera[1],
640 .module_name = "mt9t112",
641 .priv = &mt9t112_info1,
642 };
643
644 static int mt9t112_power2(struct device *dev, int mode)
645 {
646 gpio_set_value(GPIO_PTA4, mode);
647 if (mode)
648 mdelay(100);
649
650 return 0;
651 }
652
653 static struct mt9t112_camera_info mt9t112_info2 = {
654 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
655 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
656 };
657
658 static struct soc_camera_link mt9t112_link2 = {
659 .i2c_adapter_id = 1,
660 .power = mt9t112_power2,
661 .bus_id = 1,
662 .board_info = &i2c_camera[2],
663 .module_name = "mt9t112",
664 .priv = &mt9t112_info2,
665 };
666
667 static struct platform_device camera_devices[] = {
668 {
669 .name = "soc-camera-pdrv",
670 .id = 0,
671 .dev = {
672 .platform_data = &tw9910_link,
673 },
674 },
675 {
676 .name = "soc-camera-pdrv",
677 .id = 1,
678 .dev = {
679 .platform_data = &mt9t112_link1,
680 },
681 },
682 {
683 .name = "soc-camera-pdrv",
684 .id = 2,
685 .dev = {
686 .platform_data = &mt9t112_link2,
687 },
688 },
689 };
690
691 /* FSI */
692 /*
693 * FSI-B use external clock which came from da7210.
694 * So, we should change parent of fsi
695 */
696 #define FCLKBCR 0xa415000c
697 static void fsimck_init(struct clk *clk)
698 {
699 u32 status = __raw_readl(clk->enable_reg);
700
701 /* use external clock */
702 status &= ~0x000000ff;
703 status |= 0x00000080;
704
705 __raw_writel(status, clk->enable_reg);
706 }
707
708 static struct clk_ops fsimck_clk_ops = {
709 .init = fsimck_init,
710 };
711
712 static struct clk fsimckb_clk = {
713 .ops = &fsimck_clk_ops,
714 .enable_reg = (void __iomem *)FCLKBCR,
715 .rate = 0, /* unknown */
716 };
717
718 struct sh_fsi_platform_info fsi_info = {
719 .portb_flags = SH_FSI_BRS_INV |
720 SH_FSI_OUT_SLAVE_MODE |
721 SH_FSI_IN_SLAVE_MODE |
722 SH_FSI_OFMT(I2S) |
723 SH_FSI_IFMT(I2S),
724 };
725
726 static struct resource fsi_resources[] = {
727 [0] = {
728 .name = "FSI",
729 .start = 0xFE3C0000,
730 .end = 0xFE3C021d,
731 .flags = IORESOURCE_MEM,
732 },
733 [1] = {
734 .start = 108,
735 .flags = IORESOURCE_IRQ,
736 },
737 };
738
739 static struct platform_device fsi_device = {
740 .name = "sh_fsi",
741 .id = 0,
742 .num_resources = ARRAY_SIZE(fsi_resources),
743 .resource = fsi_resources,
744 .dev = {
745 .platform_data = &fsi_info,
746 },
747 .archdata = {
748 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
749 },
750 };
751
752 /* IrDA */
753 static struct resource irda_resources[] = {
754 [0] = {
755 .name = "IrDA",
756 .start = 0xA45D0000,
757 .end = 0xA45D0049,
758 .flags = IORESOURCE_MEM,
759 },
760 [1] = {
761 .start = 20,
762 .flags = IORESOURCE_IRQ,
763 },
764 };
765
766 static struct platform_device irda_device = {
767 .name = "sh_sir",
768 .num_resources = ARRAY_SIZE(irda_resources),
769 .resource = irda_resources,
770 };
771
772 static struct platform_device *ecovec_devices[] __initdata = {
773 &heartbeat_device,
774 &nor_flash_device,
775 &sh_eth_device,
776 &usb0_host_device,
777 &usb1_common_device,
778 &lcdc_device,
779 &ceu0_device,
780 &ceu1_device,
781 &keysc_device,
782 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
783 &sdhi0_device,
784 &sdhi1_device,
785 #else
786 &msiof0_device,
787 #endif
788 &camera_devices[0],
789 &camera_devices[1],
790 &camera_devices[2],
791 &fsi_device,
792 &irda_device,
793 };
794
795 #ifdef CONFIG_I2C
796 #define EEPROM_ADDR 0x50
797 static u8 mac_read(struct i2c_adapter *a, u8 command)
798 {
799 struct i2c_msg msg[2];
800 u8 buf;
801 int ret;
802
803 msg[0].addr = EEPROM_ADDR;
804 msg[0].flags = 0;
805 msg[0].len = 1;
806 msg[0].buf = &command;
807
808 msg[1].addr = EEPROM_ADDR;
809 msg[1].flags = I2C_M_RD;
810 msg[1].len = 1;
811 msg[1].buf = &buf;
812
813 ret = i2c_transfer(a, msg, 2);
814 if (ret < 0) {
815 printk(KERN_ERR "error %d\n", ret);
816 buf = 0xff;
817 }
818
819 return buf;
820 }
821
822 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
823 {
824 struct i2c_adapter *a = i2c_get_adapter(1);
825 int i;
826
827 if (!a) {
828 pr_err("can not get I2C 1\n");
829 return;
830 }
831
832 /* read MAC address frome EEPROM */
833 for (i = 0; i < sizeof(pd->mac_addr); i++) {
834 pd->mac_addr[i] = mac_read(a, 0x10 + i);
835 msleep(10);
836 }
837
838 i2c_put_adapter(a);
839 }
840 #else
841 static void __init sh_eth_init(struct sh_eth_plat_data *pd)
842 {
843 pr_err("unable to read sh_eth MAC address\n");
844 }
845 #endif
846
847 #define PORT_HIZA 0xA4050158
848 #define IODRIVEA 0xA405018A
849
850 extern char ecovec24_sdram_enter_start;
851 extern char ecovec24_sdram_enter_end;
852 extern char ecovec24_sdram_leave_start;
853 extern char ecovec24_sdram_leave_end;
854
855 static int __init arch_setup(void)
856 {
857 struct clk *clk;
858
859 /* register board specific self-refresh code */
860 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
861 SUSP_SH_RSTANDBY,
862 &ecovec24_sdram_enter_start,
863 &ecovec24_sdram_enter_end,
864 &ecovec24_sdram_leave_start,
865 &ecovec24_sdram_leave_end);
866
867 /* enable STATUS0, STATUS2 and PDSTATUS */
868 gpio_request(GPIO_FN_STATUS0, NULL);
869 gpio_request(GPIO_FN_STATUS2, NULL);
870 gpio_request(GPIO_FN_PDSTATUS, NULL);
871
872 /* enable SCIFA0 */
873 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
874 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
875
876 /* enable debug LED */
877 gpio_request(GPIO_PTG0, NULL);
878 gpio_request(GPIO_PTG1, NULL);
879 gpio_request(GPIO_PTG2, NULL);
880 gpio_request(GPIO_PTG3, NULL);
881 gpio_direction_output(GPIO_PTG0, 0);
882 gpio_direction_output(GPIO_PTG1, 0);
883 gpio_direction_output(GPIO_PTG2, 0);
884 gpio_direction_output(GPIO_PTG3, 0);
885 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
886
887 /* enable SH-Eth */
888 gpio_request(GPIO_PTA1, NULL);
889 gpio_direction_output(GPIO_PTA1, 1);
890 mdelay(20);
891
892 gpio_request(GPIO_FN_RMII_RXD0, NULL);
893 gpio_request(GPIO_FN_RMII_RXD1, NULL);
894 gpio_request(GPIO_FN_RMII_TXD0, NULL);
895 gpio_request(GPIO_FN_RMII_TXD1, NULL);
896 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
897 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
898 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
899 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
900 gpio_request(GPIO_FN_MDIO, NULL);
901 gpio_request(GPIO_FN_MDC, NULL);
902 gpio_request(GPIO_FN_LNKSTA, NULL);
903
904 /* enable USB */
905 __raw_writew(0x0000, 0xA4D80000);
906 __raw_writew(0x0000, 0xA4D90000);
907 gpio_request(GPIO_PTB3, NULL);
908 gpio_request(GPIO_PTB4, NULL);
909 gpio_request(GPIO_PTB5, NULL);
910 gpio_direction_input(GPIO_PTB3);
911 gpio_direction_output(GPIO_PTB4, 0);
912 gpio_direction_output(GPIO_PTB5, 0);
913 __raw_writew(0x0600, 0xa40501d4);
914 __raw_writew(0x0600, 0xa4050192);
915
916 if (gpio_get_value(GPIO_PTB3)) {
917 printk(KERN_INFO "USB1 function is selected\n");
918 usb1_common_device.name = "r8a66597_udc";
919 } else {
920 printk(KERN_INFO "USB1 host is selected\n");
921 usb1_common_device.name = "r8a66597_hcd";
922 }
923
924 /* enable LCDC */
925 gpio_request(GPIO_FN_LCDD23, NULL);
926 gpio_request(GPIO_FN_LCDD22, NULL);
927 gpio_request(GPIO_FN_LCDD21, NULL);
928 gpio_request(GPIO_FN_LCDD20, NULL);
929 gpio_request(GPIO_FN_LCDD19, NULL);
930 gpio_request(GPIO_FN_LCDD18, NULL);
931 gpio_request(GPIO_FN_LCDD17, NULL);
932 gpio_request(GPIO_FN_LCDD16, NULL);
933 gpio_request(GPIO_FN_LCDD15, NULL);
934 gpio_request(GPIO_FN_LCDD14, NULL);
935 gpio_request(GPIO_FN_LCDD13, NULL);
936 gpio_request(GPIO_FN_LCDD12, NULL);
937 gpio_request(GPIO_FN_LCDD11, NULL);
938 gpio_request(GPIO_FN_LCDD10, NULL);
939 gpio_request(GPIO_FN_LCDD9, NULL);
940 gpio_request(GPIO_FN_LCDD8, NULL);
941 gpio_request(GPIO_FN_LCDD7, NULL);
942 gpio_request(GPIO_FN_LCDD6, NULL);
943 gpio_request(GPIO_FN_LCDD5, NULL);
944 gpio_request(GPIO_FN_LCDD4, NULL);
945 gpio_request(GPIO_FN_LCDD3, NULL);
946 gpio_request(GPIO_FN_LCDD2, NULL);
947 gpio_request(GPIO_FN_LCDD1, NULL);
948 gpio_request(GPIO_FN_LCDD0, NULL);
949 gpio_request(GPIO_FN_LCDDISP, NULL);
950 gpio_request(GPIO_FN_LCDHSYN, NULL);
951 gpio_request(GPIO_FN_LCDDCK, NULL);
952 gpio_request(GPIO_FN_LCDVSYN, NULL);
953 gpio_request(GPIO_FN_LCDDON, NULL);
954 gpio_request(GPIO_FN_LCDLCLK, NULL);
955 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
956
957 gpio_request(GPIO_PTE6, NULL);
958 gpio_request(GPIO_PTU1, NULL);
959 gpio_request(GPIO_PTR1, NULL);
960 gpio_request(GPIO_PTA2, NULL);
961 gpio_direction_input(GPIO_PTE6);
962 gpio_direction_output(GPIO_PTU1, 0);
963 gpio_direction_output(GPIO_PTR1, 0);
964 gpio_direction_output(GPIO_PTA2, 0);
965
966 /* I/O buffer drive ability is high */
967 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
968
969 if (gpio_get_value(GPIO_PTE6)) {
970 /* DVI */
971 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
972 lcdc_info.ch[0].clock_divider = 1,
973 lcdc_info.ch[0].lcd_cfg.name = "DVI";
974 lcdc_info.ch[0].lcd_cfg.xres = 1280;
975 lcdc_info.ch[0].lcd_cfg.yres = 720;
976 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
977 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
978 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
979 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
980 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
981 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
982
983 gpio_set_value(GPIO_PTA2, 1);
984 gpio_set_value(GPIO_PTU1, 1);
985 } else {
986 /* Panel */
987
988 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
989 lcdc_info.ch[0].clock_divider = 2,
990 lcdc_info.ch[0].lcd_cfg.name = "Panel";
991 lcdc_info.ch[0].lcd_cfg.xres = 800;
992 lcdc_info.ch[0].lcd_cfg.yres = 480;
993 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
994 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
995 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
996 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
997 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
998 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
999
1000 gpio_set_value(GPIO_PTR1, 1);
1001
1002 /* FIXME
1003 *
1004 * LCDDON control is needed for Panel,
1005 * but current sh_mobile_lcdc driver doesn't control it.
1006 * It is temporary correspondence
1007 */
1008 gpio_request(GPIO_PTF4, NULL);
1009 gpio_direction_output(GPIO_PTF4, 1);
1010
1011 /* enable TouchScreen */
1012 i2c_register_board_info(0, &ts_i2c_clients, 1);
1013 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
1014 }
1015
1016 /* enable CEU0 */
1017 gpio_request(GPIO_FN_VIO0_D15, NULL);
1018 gpio_request(GPIO_FN_VIO0_D14, NULL);
1019 gpio_request(GPIO_FN_VIO0_D13, NULL);
1020 gpio_request(GPIO_FN_VIO0_D12, NULL);
1021 gpio_request(GPIO_FN_VIO0_D11, NULL);
1022 gpio_request(GPIO_FN_VIO0_D10, NULL);
1023 gpio_request(GPIO_FN_VIO0_D9, NULL);
1024 gpio_request(GPIO_FN_VIO0_D8, NULL);
1025 gpio_request(GPIO_FN_VIO0_D7, NULL);
1026 gpio_request(GPIO_FN_VIO0_D6, NULL);
1027 gpio_request(GPIO_FN_VIO0_D5, NULL);
1028 gpio_request(GPIO_FN_VIO0_D4, NULL);
1029 gpio_request(GPIO_FN_VIO0_D3, NULL);
1030 gpio_request(GPIO_FN_VIO0_D2, NULL);
1031 gpio_request(GPIO_FN_VIO0_D1, NULL);
1032 gpio_request(GPIO_FN_VIO0_D0, NULL);
1033 gpio_request(GPIO_FN_VIO0_VD, NULL);
1034 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1035 gpio_request(GPIO_FN_VIO0_FLD, NULL);
1036 gpio_request(GPIO_FN_VIO0_HD, NULL);
1037 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
1038
1039 /* enable CEU1 */
1040 gpio_request(GPIO_FN_VIO1_D7, NULL);
1041 gpio_request(GPIO_FN_VIO1_D6, NULL);
1042 gpio_request(GPIO_FN_VIO1_D5, NULL);
1043 gpio_request(GPIO_FN_VIO1_D4, NULL);
1044 gpio_request(GPIO_FN_VIO1_D3, NULL);
1045 gpio_request(GPIO_FN_VIO1_D2, NULL);
1046 gpio_request(GPIO_FN_VIO1_D1, NULL);
1047 gpio_request(GPIO_FN_VIO1_D0, NULL);
1048 gpio_request(GPIO_FN_VIO1_FLD, NULL);
1049 gpio_request(GPIO_FN_VIO1_HD, NULL);
1050 gpio_request(GPIO_FN_VIO1_VD, NULL);
1051 gpio_request(GPIO_FN_VIO1_CLK, NULL);
1052 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
1053
1054 /* enable KEYSC */
1055 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
1056 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
1057 gpio_request(GPIO_FN_KEYOUT3, NULL);
1058 gpio_request(GPIO_FN_KEYOUT2, NULL);
1059 gpio_request(GPIO_FN_KEYOUT1, NULL);
1060 gpio_request(GPIO_FN_KEYOUT0, NULL);
1061 gpio_request(GPIO_FN_KEYIN0, NULL);
1062
1063 /* enable user debug switch */
1064 gpio_request(GPIO_PTR0, NULL);
1065 gpio_request(GPIO_PTR4, NULL);
1066 gpio_request(GPIO_PTR5, NULL);
1067 gpio_request(GPIO_PTR6, NULL);
1068 gpio_direction_input(GPIO_PTR0);
1069 gpio_direction_input(GPIO_PTR4);
1070 gpio_direction_input(GPIO_PTR5);
1071 gpio_direction_input(GPIO_PTR6);
1072
1073 #ifdef CONFIG_MFD_SH_MOBILE_SDHI
1074 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
1075 gpio_request(GPIO_FN_SDHI0CD, NULL);
1076 gpio_request(GPIO_FN_SDHI0WP, NULL);
1077 gpio_request(GPIO_FN_SDHI0CMD, NULL);
1078 gpio_request(GPIO_FN_SDHI0CLK, NULL);
1079 gpio_request(GPIO_FN_SDHI0D3, NULL);
1080 gpio_request(GPIO_FN_SDHI0D2, NULL);
1081 gpio_request(GPIO_FN_SDHI0D1, NULL);
1082 gpio_request(GPIO_FN_SDHI0D0, NULL);
1083 gpio_request(GPIO_PTB6, NULL);
1084 gpio_direction_output(GPIO_PTB6, 0);
1085
1086 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
1087 gpio_request(GPIO_FN_SDHI1CD, NULL);
1088 gpio_request(GPIO_FN_SDHI1WP, NULL);
1089 gpio_request(GPIO_FN_SDHI1CMD, NULL);
1090 gpio_request(GPIO_FN_SDHI1CLK, NULL);
1091 gpio_request(GPIO_FN_SDHI1D3, NULL);
1092 gpio_request(GPIO_FN_SDHI1D2, NULL);
1093 gpio_request(GPIO_FN_SDHI1D1, NULL);
1094 gpio_request(GPIO_FN_SDHI1D0, NULL);
1095 gpio_request(GPIO_PTB7, NULL);
1096 gpio_direction_output(GPIO_PTB7, 0);
1097
1098 /* I/O buffer drive ability is high for SDHI1 */
1099 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1100 #else
1101 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1102 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
1103 gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
1104 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
1105 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
1106 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
1107 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
1108 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
1109 gpio_request(GPIO_PTY6, NULL); /* write protect */
1110 gpio_direction_input(GPIO_PTY6);
1111 gpio_request(GPIO_PTY7, NULL); /* card detect */
1112 gpio_direction_input(GPIO_PTY7);
1113
1114 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
1115 #endif
1116
1117 /* enable Video */
1118 gpio_request(GPIO_PTU2, NULL);
1119 gpio_direction_output(GPIO_PTU2, 1);
1120
1121 /* enable Camera */
1122 gpio_request(GPIO_PTA3, NULL);
1123 gpio_request(GPIO_PTA4, NULL);
1124 gpio_direction_output(GPIO_PTA3, 0);
1125 gpio_direction_output(GPIO_PTA4, 0);
1126
1127 /* enable FSI */
1128 gpio_request(GPIO_FN_FSIMCKB, NULL);
1129 gpio_request(GPIO_FN_FSIIBSD, NULL);
1130 gpio_request(GPIO_FN_FSIOBSD, NULL);
1131 gpio_request(GPIO_FN_FSIIBBCK, NULL);
1132 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
1133 gpio_request(GPIO_FN_FSIOBBCK, NULL);
1134 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1135 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1136
1137 /* set SPU2 clock to 83.4 MHz */
1138 clk = clk_get(NULL, "spu_clk");
1139 if (clk) {
1140 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1141 clk_put(clk);
1142 }
1143
1144 /* change parent of FSI B */
1145 clk = clk_get(NULL, "fsib_clk");
1146 if (clk) {
1147 clk_register(&fsimckb_clk);
1148 clk_set_parent(clk, &fsimckb_clk);
1149 clk_set_rate(clk, 11000);
1150 clk_set_rate(&fsimckb_clk, 11000);
1151 clk_put(clk);
1152 }
1153
1154 gpio_request(GPIO_PTU0, NULL);
1155 gpio_direction_output(GPIO_PTU0, 0);
1156 mdelay(20);
1157
1158 /* enable motion sensor */
1159 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1160 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1161
1162 /* set VPU clock to 166 MHz */
1163 clk = clk_get(NULL, "vpu_clk");
1164 if (clk) {
1165 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1166 clk_put(clk);
1167 }
1168
1169 /* enable IrDA */
1170 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1171 gpio_request(GPIO_FN_IRDA_IN, NULL);
1172 gpio_request(GPIO_PTU5, NULL);
1173 gpio_direction_output(GPIO_PTU5, 0);
1174
1175 /* enable I2C device */
1176 i2c_register_board_info(0, i2c0_devices,
1177 ARRAY_SIZE(i2c0_devices));
1178
1179 i2c_register_board_info(1, i2c1_devices,
1180 ARRAY_SIZE(i2c1_devices));
1181
1182 return platform_add_devices(ecovec_devices,
1183 ARRAY_SIZE(ecovec_devices));
1184 }
1185 arch_initcall(arch_setup);
1186
1187 static int __init devices_setup(void)
1188 {
1189 sh_eth_init(&sh_eth_plat);
1190 return 0;
1191 }
1192 device_initcall(devices_setup);
1193
1194 static struct sh_machine_vector mv_ecovec __initmv = {
1195 .mv_name = "R0P7724 (EcoVec)",
1196 };
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