sh: pass through ioremap() for non-mmu processors.
[deliverable/linux.git] / arch / sh / include / asm / clock.h
1 #ifndef __ASM_SH_CLOCK_H
2 #define __ASM_SH_CLOCK_H
3
4 #include <linux/kref.h>
5 #include <linux/list.h>
6 #include <linux/seq_file.h>
7 #include <linux/clk.h>
8 #include <linux/err.h>
9
10 struct clk;
11
12 struct clk_ops {
13 void (*init)(struct clk *clk);
14 void (*enable)(struct clk *clk);
15 void (*disable)(struct clk *clk);
16 void (*recalc)(struct clk *clk);
17 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 int (*set_parent)(struct clk *clk, struct clk *parent);
19 long (*round_rate)(struct clk *clk, unsigned long rate);
20 };
21
22 struct clk {
23 struct list_head node;
24 const char *name;
25 int id;
26 struct module *owner;
27
28 struct clk *parent;
29 struct clk_ops *ops;
30
31 struct kref kref;
32
33 unsigned long rate;
34 unsigned long flags;
35 unsigned long arch_flags;
36 };
37
38 #define CLK_ALWAYS_ENABLED (1 << 0)
39 #define CLK_RATE_PROPAGATES (1 << 1)
40
41 /* Should be defined by processor-specific code */
42 void arch_init_clk_ops(struct clk_ops **, int type);
43 int __init arch_clk_init(void);
44
45 /* arch/sh/kernel/cpu/clock.c */
46 int clk_init(void);
47
48 void clk_recalc_rate(struct clk *);
49
50 int clk_register(struct clk *);
51 void clk_unregister(struct clk *);
52
53 static inline int clk_always_enable(const char *id)
54 {
55 struct clk *clk;
56 int ret;
57
58 clk = clk_get(NULL, id);
59 if (IS_ERR(clk))
60 return PTR_ERR(clk);
61
62 ret = clk_enable(clk);
63 if (ret)
64 clk_put(clk);
65
66 return ret;
67 }
68
69 /* the exported API, in addition to clk_set_rate */
70 /**
71 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
72 * @clk: clock source
73 * @rate: desired clock rate in Hz
74 * @algo_id: algorithm id to be passed down to ops->set_rate
75 *
76 * Returns success (0) or negative errno.
77 */
78 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
79
80 enum clk_sh_algo_id {
81 NO_CHANGE = 0,
82
83 IUS_N1_N1,
84 IUS_322,
85 IUS_522,
86 IUS_N11,
87
88 SB_N1,
89
90 SB3_N1,
91 SB3_32,
92 SB3_43,
93 SB3_54,
94
95 BP_N1,
96
97 IP_N1,
98 };
99 #endif /* __ASM_SH_CLOCK_H */
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