4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 #ifndef __ASM_SH_UBC_H
12 #define __ASM_SH_UBC_H
17 /* User Break Controller */
18 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19 #define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
21 #define UBC_TYPE_SH7729 0
24 #define BAMR_ASID (1 << 2)
32 #define BBR_INST (1 << 4)
33 #define BBR_DATA (2 << 4)
34 #define BBR_READ (1 << 2)
35 #define BBR_WRITE (2 << 2)
39 #define BBR_QUAD (1 << 6) /* SH7750 */
40 #define BBR_CPU (1 << 6) /* SH7709A,SH7729 */
41 #define BBR_DMA (2 << 6) /* SH7709A,SH7729 */
43 #define BRCR_CMFA (1 << 15)
44 #define BRCR_CMFB (1 << 14)
46 #if defined CONFIG_CPU_SH2A
47 #define BRCR_CMFCA (1 << 15)
48 #define BRCR_CMFCB (1 << 14)
49 #define BRCR_CMFDA (1 << 13)
50 #define BRCR_CMFDB (1 << 12)
51 #define BRCR_PCBB (1 << 6) /* 1: after execution */
52 #define BRCR_PCBA (1 << 5) /* 1: after execution */
55 #define BRCR_PCTE (1 << 11)
56 #define BRCR_PCBA (1 << 10) /* 1: after execution */
57 #define BRCR_DBEB (1 << 7)
58 #define BRCR_PCBB (1 << 6)
59 #define BRCR_SEQ (1 << 3)
60 #define BRCR_UBDE (1 << 0)
63 #endif /* __KERNEL__ */
64 #endif /* __ASM_SH_UBC_H */
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