arch/sparc/mm/viking.S

   1 /*
   2  * viking.S: High speed Viking cache/mmu operations
   3  *
   4  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   5  * Copyright (C) 1997,1998,1999  Jakub Jelinek  (jj@ultra.linux.cz)
   6  * Copyright (C) 1999  Pavel Semerad  (semerad@ss1000.ms.mff.cuni.cz)
   7  */
   8
   9 #include <asm/ptrace.h>
  10 #include <asm/psr.h>
  11 #include <asm/asm-offsets.h>
  12 #include <asm/asi.h>
  13 #include <asm/mxcc.h>
  14 #include <asm/page.h>
  15 #include <asm/pgtsrmmu.h>
  16 #include <asm/viking.h>
  17
  18 #ifdef CONFIG_SMP
  19         .data
  20         .align  4
  21 sun4dsmp_flush_tlb_spin:
  22         .word   0
  23 #endif
  24
  25         .text
  26         .align  4
  27
  28         .globl  viking_flush_cache_all, viking_flush_cache_mm
  29         .globl  viking_flush_cache_range, viking_flush_cache_page
  30         .globl  viking_flush_page, viking_mxcc_flush_page
  31         .globl  viking_flush_page_for_dma, viking_flush_page_to_ram
  32         .globl  viking_flush_sig_insns
  33         .globl  viking_flush_tlb_all, viking_flush_tlb_mm
  34         .globl  viking_flush_tlb_range, viking_flush_tlb_page
  35
  36 viking_flush_page:
  37         sethi   %hi(PAGE_OFFSET), %g2
  38         sub     %o0, %g2, %g3
  39         srl     %g3, 12, %g1            ! ppage >> 12
  40
  41         clr     %o1                     ! set counter, 0 - 127
  42         sethi   %hi(PAGE_OFFSET + PAGE_SIZE - 0x80000000), %o3
  43         sethi   %hi(0x80000000), %o4
  44         sethi   %hi(VIKING_PTAG_VALID), %o5
  45         sethi   %hi(2*PAGE_SIZE), %o0
  46         sethi   %hi(PAGE_SIZE), %g7
  47         clr     %o2                     ! block counter, 0 - 3
  48 5:
  49         sll     %o1, 5, %g4
  50         or      %g4, %o4, %g4           ! 0x80000000 | (set << 5)
  51
  52         sll     %o2, 26, %g5            ! block << 26
  53 6:
  54         or      %g5, %g4, %g5
  55         ldda    [%g5] ASI_M_DATAC_TAG, %g2
  56         cmp     %g3, %g1                ! ptag == ppage?
  57         bne     7f
  58          inc    %o2
  59
  60         andcc   %g2, %o5, %g0           ! ptag VALID?
  61         be      7f
  62          add    %g4, %o3, %g2           ! (PAGE_OFFSET + PAGE_SIZE) | (set << 5)
  63         ld      [%g2], %g3
  64         ld      [%g2 + %g7], %g3
  65         add     %g2, %o0, %g2
  66         ld      [%g2], %g3
  67         ld      [%g2 + %g7], %g3
  68         add     %g2, %o0, %g2
  69         ld      [%g2], %g3
  70         ld      [%g2 + %g7], %g3
  71         add     %g2, %o0, %g2
  72         ld      [%g2], %g3
  73         b       8f
  74          ld     [%g2 + %g7], %g3
  75
  76 7:
  77         cmp     %o2, 3
  78         ble     6b
  79          sll    %o2, 26, %g5                    ! block << 26
  80
  81 8:      inc     %o1
  82         cmp     %o1, 0x7f
  83         ble     5b
  84          clr    %o2
  85
  86 9:      retl
  87          nop
  88
  89 viking_mxcc_flush_page:
  90         sethi   %hi(PAGE_OFFSET), %g2
  91         sub     %o0, %g2, %g3
  92         sub     %g3, -PAGE_SIZE, %g3            ! ppage + PAGE_SIZE
  93         sethi   %hi(MXCC_SRCSTREAM), %o3        ! assume %hi(MXCC_SRCSTREAM) == %hi(MXCC_DESTSTREAM)
  94         mov     0x10, %g2                       ! set cacheable bit
  95         or      %o3, %lo(MXCC_SRCSTREAM), %o2
  96         or      %o3, %lo(MXCC_DESSTREAM), %o3
  97         sub     %g3, MXCC_STREAM_SIZE, %g3
  98 6:
  99         stda    %g2, [%o2] ASI_M_MXCC
 100         stda    %g2, [%o3] ASI_M_MXCC
 101         andncc  %g3, PAGE_MASK, %g0
 102         bne     6b
 103          sub    %g3, MXCC_STREAM_SIZE, %g3
 104
 105 9:      retl
 106          nop
 107
 108 viking_flush_cache_page:
 109 viking_flush_cache_range:
 110 #ifndef CONFIG_SMP
 111         ld      [%o0 + VMA_VM_MM], %o0
 112 #endif
 113 viking_flush_cache_mm:
 114 #ifndef CONFIG_SMP
 115         ld      [%o0 + AOFF_mm_context], %g1
 116         cmp     %g1, -1
 117         bne     viking_flush_cache_all
 118          nop
 119         b,a     viking_flush_cache_out
 120 #endif
 121 viking_flush_cache_all:
 122         WINDOW_FLUSH(%g4, %g5)
 123 viking_flush_cache_out:
 124         retl
 125          nop
 126
 127 viking_flush_tlb_all:
 128         mov     0x400, %g1
 129         retl
 130          sta    %g0, [%g1] ASI_M_FLUSH_PROBE
 131
 132 viking_flush_tlb_mm:
 133         mov     SRMMU_CTX_REG, %g1
 134         ld      [%o0 + AOFF_mm_context], %o1
 135         lda     [%g1] ASI_M_MMUREGS, %g5
 136 #ifndef CONFIG_SMP
 137         cmp     %o1, -1
 138         be      1f
 139 #endif
 140         mov     0x300, %g2
 141         sta     %o1, [%g1] ASI_M_MMUREGS
 142         sta     %g0, [%g2] ASI_M_FLUSH_PROBE
 143         retl
 144          sta    %g5, [%g1] ASI_M_MMUREGS
 145 #ifndef CONFIG_SMP
 146 1:      retl
 147          nop
 148 #endif
 149
 150 viking_flush_tlb_range:
 151         ld      [%o0 + VMA_VM_MM], %o0
 152         mov     SRMMU_CTX_REG, %g1
 153         ld      [%o0 + AOFF_mm_context], %o3
 154         lda     [%g1] ASI_M_MMUREGS, %g5
 155 #ifndef CONFIG_SMP
 156         cmp     %o3, -1
 157         be      2f
 158 #endif
 159         sethi   %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
 160         sta     %o3, [%g1] ASI_M_MMUREGS
 161         and     %o1, %o4, %o1
 162         add     %o1, 0x200, %o1
 163         sta     %g0, [%o1] ASI_M_FLUSH_PROBE
 164 1:      sub     %o1, %o4, %o1
 165         cmp     %o1, %o2
 166         blu,a   1b
 167          sta    %g0, [%o1] ASI_M_FLUSH_PROBE
 168         retl
 169          sta    %g5, [%g1] ASI_M_MMUREGS
 170 #ifndef CONFIG_SMP
 171 2:      retl
 172          nop
 173 #endif
 174
 175 viking_flush_tlb_page:
 176         ld      [%o0 + VMA_VM_MM], %o0
 177         mov     SRMMU_CTX_REG, %g1
 178         ld      [%o0 + AOFF_mm_context], %o3
 179         lda     [%g1] ASI_M_MMUREGS, %g5
 180 #ifndef CONFIG_SMP
 181         cmp     %o3, -1
 182         be      1f
 183 #endif
 184         and     %o1, PAGE_MASK, %o1
 185         sta     %o3, [%g1] ASI_M_MMUREGS
 186         sta     %g0, [%o1] ASI_M_FLUSH_PROBE
 187         retl
 188          sta    %g5, [%g1] ASI_M_MMUREGS
 189 #ifndef CONFIG_SMP
 190 1:      retl
 191          nop
 192 #endif
 193
 194 viking_flush_page_to_ram:
 195 viking_flush_page_for_dma:
 196 viking_flush_sig_insns:
 197         retl
 198          nop
 199
 200 #ifdef CONFIG_SMP
 201         .globl  sun4dsmp_flush_tlb_all, sun4dsmp_flush_tlb_mm
 202         .globl  sun4dsmp_flush_tlb_range, sun4dsmp_flush_tlb_page
 203 sun4dsmp_flush_tlb_all:
 204         sethi   %hi(sun4dsmp_flush_tlb_spin), %g3
 205 1:      ldstub  [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 206         tst     %g5
 207         bne     2f
 208          mov    0x400, %g1
 209         sta     %g0, [%g1] ASI_M_FLUSH_PROBE
 210         retl
 211          stb    %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
 212 2:      tst     %g5
 213         bne,a   2b
 214          ldub   [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 215         b,a     1b
 216
 217 sun4dsmp_flush_tlb_mm:
 218         sethi   %hi(sun4dsmp_flush_tlb_spin), %g3
 219 1:      ldstub  [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 220         tst     %g5
 221         bne     2f
 222          mov    SRMMU_CTX_REG, %g1
 223         ld      [%o0 + AOFF_mm_context], %o1
 224         lda     [%g1] ASI_M_MMUREGS, %g5
 225         mov     0x300, %g2
 226         sta     %o1, [%g1] ASI_M_MMUREGS
 227         sta     %g0, [%g2] ASI_M_FLUSH_PROBE
 228         sta     %g5, [%g1] ASI_M_MMUREGS
 229         retl
 230          stb    %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
 231 2:      tst     %g5
 232         bne,a   2b
 233          ldub   [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 234         b,a     1b
 235
 236 sun4dsmp_flush_tlb_range:
 237         sethi   %hi(sun4dsmp_flush_tlb_spin), %g3
 238 1:      ldstub  [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 239         tst     %g5
 240         bne     3f
 241          mov    SRMMU_CTX_REG, %g1
 242         ld      [%o0 + VMA_VM_MM], %o0
 243         ld      [%o0 + AOFF_mm_context], %o3
 244         lda     [%g1] ASI_M_MMUREGS, %g5
 245         sethi   %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
 246         sta     %o3, [%g1] ASI_M_MMUREGS
 247         and     %o1, %o4, %o1
 248         add     %o1, 0x200, %o1
 249         sta     %g0, [%o1] ASI_M_FLUSH_PROBE
 250 2:      sub     %o1, %o4, %o1
 251         cmp     %o1, %o2
 252         blu,a   2b
 253          sta    %g0, [%o1] ASI_M_FLUSH_PROBE
 254         sta     %g5, [%g1] ASI_M_MMUREGS
 255         retl
 256          stb    %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
 257 3:      tst     %g5
 258         bne,a   3b
 259          ldub   [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 260         b,a     1b
 261
 262 sun4dsmp_flush_tlb_page:
 263         sethi   %hi(sun4dsmp_flush_tlb_spin), %g3
 264 1:      ldstub  [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 265         tst     %g5
 266         bne     2f
 267          mov    SRMMU_CTX_REG, %g1
 268         ld      [%o0 + VMA_VM_MM], %o0
 269         ld      [%o0 + AOFF_mm_context], %o3
 270         lda     [%g1] ASI_M_MMUREGS, %g5
 271         and     %o1, PAGE_MASK, %o1
 272         sta     %o3, [%g1] ASI_M_MMUREGS
 273         sta     %g0, [%o1] ASI_M_FLUSH_PROBE
 274         sta     %g5, [%g1] ASI_M_MMUREGS
 275         retl
 276          stb    %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
 277 2:      tst     %g5
 278         bne,a   2b
 279          ldub   [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
 280         b,a     1b
 281          nop
 282 #endif