Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[deliverable/linux.git] / arch / sparc64 / kernel / setup.c
1 /* $Id: setup.c,v 1.72 2002/02/09 19:49:30 davem Exp $
2 * linux/arch/sparc64/kernel/setup.c
3 *
4 * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7
8 #include <linux/errno.h>
9 #include <linux/sched.h>
10 #include <linux/kernel.h>
11 #include <linux/mm.h>
12 #include <linux/stddef.h>
13 #include <linux/unistd.h>
14 #include <linux/ptrace.h>
15 #include <linux/slab.h>
16 #include <asm/smp.h>
17 #include <linux/user.h>
18 #include <linux/a.out.h>
19 #include <linux/screen_info.h>
20 #include <linux/delay.h>
21 #include <linux/fs.h>
22 #include <linux/seq_file.h>
23 #include <linux/syscalls.h>
24 #include <linux/kdev_t.h>
25 #include <linux/major.h>
26 #include <linux/string.h>
27 #include <linux/init.h>
28 #include <linux/inet.h>
29 #include <linux/console.h>
30 #include <linux/root_dev.h>
31 #include <linux/interrupt.h>
32 #include <linux/cpu.h>
33 #include <linux/initrd.h>
34
35 #include <asm/system.h>
36 #include <asm/io.h>
37 #include <asm/processor.h>
38 #include <asm/oplib.h>
39 #include <asm/page.h>
40 #include <asm/pgtable.h>
41 #include <asm/idprom.h>
42 #include <asm/head.h>
43 #include <asm/starfire.h>
44 #include <asm/mmu_context.h>
45 #include <asm/timer.h>
46 #include <asm/sections.h>
47 #include <asm/setup.h>
48 #include <asm/mmu.h>
49 #include <asm/ns87303.h>
50
51 #ifdef CONFIG_IP_PNP
52 #include <net/ipconfig.h>
53 #endif
54
55 /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
56 * operations in asm/ns87303.h
57 */
58 DEFINE_SPINLOCK(ns87303_lock);
59
60 struct screen_info screen_info = {
61 0, 0, /* orig-x, orig-y */
62 0, /* unused */
63 0, /* orig-video-page */
64 0, /* orig-video-mode */
65 128, /* orig-video-cols */
66 0, 0, 0, /* unused, ega_bx, unused */
67 54, /* orig-video-lines */
68 0, /* orig-video-isVGA */
69 16 /* orig-video-points */
70 };
71
72 void (*prom_palette)(int);
73 void (*prom_keyboard)(void);
74
75 static void
76 prom_console_write(struct console *con, const char *s, unsigned n)
77 {
78 prom_write(s, n);
79 }
80
81 unsigned int boot_flags = 0;
82 #define BOOTME_DEBUG 0x1
83
84 /* Exported for mm/init.c:paging_init. */
85 unsigned long cmdline_memory_size = 0;
86
87 static struct console prom_debug_console = {
88 .name = "debug",
89 .write = prom_console_write,
90 .flags = CON_PRINTBUFFER,
91 .index = -1,
92 };
93
94 /* XXX Implement this at some point... */
95 void kernel_enter_debugger(void)
96 {
97 }
98
99 /*
100 * Process kernel command line switches that are specific to the
101 * SPARC or that require special low-level processing.
102 */
103 static void __init process_switch(char c)
104 {
105 switch (c) {
106 case 'd':
107 boot_flags |= BOOTME_DEBUG;
108 break;
109 case 's':
110 break;
111 case 'h':
112 prom_printf("boot_flags_init: Halt!\n");
113 prom_halt();
114 break;
115 case 'p':
116 /* Use PROM debug console. */
117 register_console(&prom_debug_console);
118 break;
119 case 'P':
120 /* Force UltraSPARC-III P-Cache on. */
121 if (tlb_type != cheetah) {
122 printk("BOOT: Ignoring P-Cache force option.\n");
123 break;
124 }
125 cheetah_pcache_forced_on = 1;
126 add_taint(TAINT_MACHINE_CHECK);
127 cheetah_enable_pcache();
128 break;
129
130 default:
131 printk("Unknown boot switch (-%c)\n", c);
132 break;
133 }
134 }
135
136 static void __init boot_flags_init(char *commands)
137 {
138 while (*commands) {
139 /* Move to the start of the next "argument". */
140 while (*commands && *commands == ' ')
141 commands++;
142
143 /* Process any command switches, otherwise skip it. */
144 if (*commands == '\0')
145 break;
146 if (*commands == '-') {
147 commands++;
148 while (*commands && *commands != ' ')
149 process_switch(*commands++);
150 continue;
151 }
152 if (!strncmp(commands, "mem=", 4)) {
153 /*
154 * "mem=XXX[kKmM]" overrides the PROM-reported
155 * memory size.
156 */
157 cmdline_memory_size = simple_strtoul(commands + 4,
158 &commands, 0);
159 if (*commands == 'K' || *commands == 'k') {
160 cmdline_memory_size <<= 10;
161 commands++;
162 } else if (*commands=='M' || *commands=='m') {
163 cmdline_memory_size <<= 20;
164 commands++;
165 }
166 }
167 while (*commands && *commands != ' ')
168 commands++;
169 }
170 }
171
172 extern void panic_setup(char *, int *);
173
174 extern unsigned short root_flags;
175 extern unsigned short root_dev;
176 extern unsigned short ram_flags;
177 #define RAMDISK_IMAGE_START_MASK 0x07FF
178 #define RAMDISK_PROMPT_FLAG 0x8000
179 #define RAMDISK_LOAD_FLAG 0x4000
180
181 extern int root_mountflags;
182
183 char reboot_command[COMMAND_LINE_SIZE];
184
185 static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
186
187 void __init per_cpu_patch(void)
188 {
189 struct cpuid_patch_entry *p;
190 unsigned long ver;
191 int is_jbus;
192
193 if (tlb_type == spitfire && !this_is_starfire)
194 return;
195
196 is_jbus = 0;
197 if (tlb_type != hypervisor) {
198 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
199 is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
200 (ver >> 32UL) == __SERRANO_ID);
201 }
202
203 p = &__cpuid_patch;
204 while (p < &__cpuid_patch_end) {
205 unsigned long addr = p->addr;
206 unsigned int *insns;
207
208 switch (tlb_type) {
209 case spitfire:
210 insns = &p->starfire[0];
211 break;
212 case cheetah:
213 case cheetah_plus:
214 if (is_jbus)
215 insns = &p->cheetah_jbus[0];
216 else
217 insns = &p->cheetah_safari[0];
218 break;
219 case hypervisor:
220 insns = &p->sun4v[0];
221 break;
222 default:
223 prom_printf("Unknown cpu type, halting.\n");
224 prom_halt();
225 };
226
227 *(unsigned int *) (addr + 0) = insns[0];
228 wmb();
229 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
230
231 *(unsigned int *) (addr + 4) = insns[1];
232 wmb();
233 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
234
235 *(unsigned int *) (addr + 8) = insns[2];
236 wmb();
237 __asm__ __volatile__("flush %0" : : "r" (addr + 8));
238
239 *(unsigned int *) (addr + 12) = insns[3];
240 wmb();
241 __asm__ __volatile__("flush %0" : : "r" (addr + 12));
242
243 p++;
244 }
245 }
246
247 void __init sun4v_patch(void)
248 {
249 extern void sun4v_hvapi_init(void);
250 struct sun4v_1insn_patch_entry *p1;
251 struct sun4v_2insn_patch_entry *p2;
252
253 if (tlb_type != hypervisor)
254 return;
255
256 p1 = &__sun4v_1insn_patch;
257 while (p1 < &__sun4v_1insn_patch_end) {
258 unsigned long addr = p1->addr;
259
260 *(unsigned int *) (addr + 0) = p1->insn;
261 wmb();
262 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
263
264 p1++;
265 }
266
267 p2 = &__sun4v_2insn_patch;
268 while (p2 < &__sun4v_2insn_patch_end) {
269 unsigned long addr = p2->addr;
270
271 *(unsigned int *) (addr + 0) = p2->insns[0];
272 wmb();
273 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
274
275 *(unsigned int *) (addr + 4) = p2->insns[1];
276 wmb();
277 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
278
279 p2++;
280 }
281
282 sun4v_hvapi_init();
283 }
284
285 #ifdef CONFIG_SMP
286 void __init boot_cpu_id_too_large(int cpu)
287 {
288 prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
289 cpu, NR_CPUS);
290 prom_halt();
291 }
292 #endif
293
294 void __init setup_arch(char **cmdline_p)
295 {
296 /* Initialize PROM console and command line. */
297 *cmdline_p = prom_getbootargs();
298 strcpy(boot_command_line, *cmdline_p);
299
300 if (tlb_type == hypervisor)
301 printk("ARCH: SUN4V\n");
302 else
303 printk("ARCH: SUN4U\n");
304
305 #ifdef CONFIG_DUMMY_CONSOLE
306 conswitchp = &dummy_con;
307 #elif defined(CONFIG_PROM_CONSOLE)
308 conswitchp = &prom_con;
309 #endif
310
311 boot_flags_init(*cmdline_p);
312
313 idprom_init();
314
315 if (!root_flags)
316 root_mountflags &= ~MS_RDONLY;
317 ROOT_DEV = old_decode_dev(root_dev);
318 #ifdef CONFIG_BLK_DEV_RAM
319 rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
320 rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
321 rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
322 #endif
323
324 task_thread_info(&init_task)->kregs = &fake_swapper_regs;
325
326 #ifdef CONFIG_IP_PNP
327 if (!ic_set_manually) {
328 int chosen = prom_finddevice ("/chosen");
329 u32 cl, sv, gw;
330
331 cl = prom_getintdefault (chosen, "client-ip", 0);
332 sv = prom_getintdefault (chosen, "server-ip", 0);
333 gw = prom_getintdefault (chosen, "gateway-ip", 0);
334 if (cl && sv) {
335 ic_myaddr = cl;
336 ic_servaddr = sv;
337 if (gw)
338 ic_gateway = gw;
339 #if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
340 ic_proto_enabled = 0;
341 #endif
342 }
343 }
344 #endif
345
346 /* Get boot processor trap_block[] setup. */
347 init_cur_cpu_trap(current_thread_info());
348
349 paging_init();
350 }
351
352 /* BUFFER is PAGE_SIZE bytes long. */
353
354 extern char *sparc_cpu_type;
355 extern char *sparc_fpu_type;
356
357 extern void smp_info(struct seq_file *);
358 extern void smp_bogo(struct seq_file *);
359 extern void mmu_info(struct seq_file *);
360
361 unsigned int dcache_parity_tl1_occurred;
362 unsigned int icache_parity_tl1_occurred;
363
364 int ncpus_probed;
365
366 static int show_cpuinfo(struct seq_file *m, void *__unused)
367 {
368 seq_printf(m,
369 "cpu\t\t: %s\n"
370 "fpu\t\t: %s\n"
371 "prom\t\t: %s\n"
372 "type\t\t: %s\n"
373 "ncpus probed\t: %d\n"
374 "ncpus active\t: %d\n"
375 "D$ parity tl1\t: %u\n"
376 "I$ parity tl1\t: %u\n"
377 #ifndef CONFIG_SMP
378 "Cpu0ClkTck\t: %016lx\n"
379 #endif
380 ,
381 sparc_cpu_type,
382 sparc_fpu_type,
383 prom_version,
384 ((tlb_type == hypervisor) ?
385 "sun4v" :
386 "sun4u"),
387 ncpus_probed,
388 num_online_cpus(),
389 dcache_parity_tl1_occurred,
390 icache_parity_tl1_occurred
391 #ifndef CONFIG_SMP
392 , cpu_data(0).clock_tick
393 #endif
394 );
395 #ifdef CONFIG_SMP
396 smp_bogo(m);
397 #endif
398 mmu_info(m);
399 #ifdef CONFIG_SMP
400 smp_info(m);
401 #endif
402 return 0;
403 }
404
405 static void *c_start(struct seq_file *m, loff_t *pos)
406 {
407 /* The pointer we are returning is arbitrary,
408 * it just has to be non-NULL and not IS_ERR
409 * in the success case.
410 */
411 return *pos == 0 ? &c_start : NULL;
412 }
413
414 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
415 {
416 ++*pos;
417 return c_start(m, pos);
418 }
419
420 static void c_stop(struct seq_file *m, void *v)
421 {
422 }
423
424 const struct seq_operations cpuinfo_op = {
425 .start =c_start,
426 .next = c_next,
427 .stop = c_stop,
428 .show = show_cpuinfo,
429 };
430
431 extern int stop_a_enabled;
432
433 void sun_do_break(void)
434 {
435 if (!stop_a_enabled)
436 return;
437
438 prom_printf("\n");
439 flush_user_windows();
440
441 prom_cmdline();
442 }
443
444 int stop_a_enabled = 1;
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