2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/mmzone.h>
18 #include <linux/bootmem.h>
19 #include <linux/module.h>
20 #include <linux/node.h>
21 #include <linux/cpu.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/kexec.h>
25 #include <linux/pci.h>
26 #include <linux/swiotlb.h>
27 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/smp.h>
31 #include <linux/timex.h>
32 #include <linux/hugetlb.h>
33 #include <linux/start_kernel.h>
34 #include <linux/screen_info.h>
35 #include <asm/setup.h>
36 #include <asm/sections.h>
37 #include <asm/cacheflush.h>
38 #include <asm/pgalloc.h>
39 #include <asm/mmu_context.h>
40 #include <hv/hypervisor.h>
41 #include <arch/interrupts.h>
43 /* <linux/smp.h> doesn't provide this definition. */
45 #define setup_max_cpus 1
48 static inline int ABS(int x
) { return x
>= 0 ? x
: -x
; }
50 /* Chip information */
51 char chip_model
[64] __write_once
;
54 struct screen_info screen_info
;
57 struct pglist_data node_data
[MAX_NUMNODES
] __read_mostly
;
58 EXPORT_SYMBOL(node_data
);
60 /* Information on the NUMA nodes that we compute early */
61 unsigned long node_start_pfn
[MAX_NUMNODES
];
62 unsigned long node_end_pfn
[MAX_NUMNODES
];
63 unsigned long __initdata node_memmap_pfn
[MAX_NUMNODES
];
64 unsigned long __initdata node_percpu_pfn
[MAX_NUMNODES
];
65 unsigned long __initdata node_free_pfn
[MAX_NUMNODES
];
67 static unsigned long __initdata node_percpu
[MAX_NUMNODES
];
70 * per-CPU stack and boot info.
72 DEFINE_PER_CPU(unsigned long, boot_sp
) =
73 (unsigned long)init_stack
+ THREAD_SIZE
;
76 DEFINE_PER_CPU(unsigned long, boot_pc
) = (unsigned long)start_kernel
;
79 * The variable must be __initdata since it references __init code.
80 * With CONFIG_SMP it is per-cpu data, which is exempt from validation.
82 unsigned long __initdata boot_pc
= (unsigned long)start_kernel
;
86 /* Page frame index of end of lowmem on each controller. */
87 unsigned long node_lowmem_end_pfn
[MAX_NUMNODES
];
89 /* Number of pages that can be mapped into lowmem. */
90 static unsigned long __initdata mappable_physpages
;
93 /* Data on which physical memory controller corresponds to which NUMA node */
94 int node_controller
[MAX_NUMNODES
] = { [0 ... MAX_NUMNODES
-1] = -1 };
97 /* Map information from VAs to PAs */
98 unsigned long pbase_map
[1 << (32 - HPAGE_SHIFT
)]
99 __write_once
__attribute__((aligned(L2_CACHE_BYTES
)));
100 EXPORT_SYMBOL(pbase_map
);
102 /* Map information from PAs to VAs */
103 void *vbase_map
[NR_PA_HIGHBIT_VALUES
]
104 __write_once
__attribute__((aligned(L2_CACHE_BYTES
)));
105 EXPORT_SYMBOL(vbase_map
);
108 /* Node number as a function of the high PA bits */
109 int highbits_to_node
[NR_PA_HIGHBIT_VALUES
] __write_once
;
110 EXPORT_SYMBOL(highbits_to_node
);
112 static unsigned int __initdata maxmem_pfn
= -1U;
113 static unsigned int __initdata maxnodemem_pfn
[MAX_NUMNODES
] = {
114 [0 ... MAX_NUMNODES
-1] = -1U
116 static nodemask_t __initdata isolnodes
;
118 #if defined(CONFIG_PCI) && !defined(__tilegx__)
119 enum { DEFAULT_PCI_RESERVE_MB
= 64 };
120 static unsigned int __initdata pci_reserve_mb
= DEFAULT_PCI_RESERVE_MB
;
121 unsigned long __initdata pci_reserve_start_pfn
= -1U;
122 unsigned long __initdata pci_reserve_end_pfn
= -1U;
125 static int __init
setup_maxmem(char *str
)
127 unsigned long long maxmem
;
128 if (str
== NULL
|| (maxmem
= memparse(str
, NULL
)) == 0)
131 maxmem_pfn
= (maxmem
>> HPAGE_SHIFT
) << (HPAGE_SHIFT
- PAGE_SHIFT
);
132 pr_info("Forcing RAM used to no more than %dMB\n",
133 maxmem_pfn
>> (20 - PAGE_SHIFT
));
136 early_param("maxmem", setup_maxmem
);
138 static int __init
setup_maxnodemem(char *str
)
141 unsigned long long maxnodemem
;
144 node
= str
? simple_strtoul(str
, &endp
, 0) : INT_MAX
;
145 if (node
>= MAX_NUMNODES
|| *endp
!= ':')
148 maxnodemem
= memparse(endp
+1, NULL
);
149 maxnodemem_pfn
[node
] = (maxnodemem
>> HPAGE_SHIFT
) <<
150 (HPAGE_SHIFT
- PAGE_SHIFT
);
151 pr_info("Forcing RAM used on node %ld to no more than %dMB\n",
152 node
, maxnodemem_pfn
[node
] >> (20 - PAGE_SHIFT
));
155 early_param("maxnodemem", setup_maxnodemem
);
157 struct memmap_entry
{
158 u64 addr
; /* start of memory segment */
159 u64 size
; /* size of memory segment */
161 static struct memmap_entry memmap_map
[64];
162 static int memmap_nr
;
164 static void add_memmap_region(u64 addr
, u64 size
)
166 if (memmap_nr
>= ARRAY_SIZE(memmap_map
)) {
167 pr_err("Ooops! Too many entries in the memory map!\n");
170 memmap_map
[memmap_nr
].addr
= addr
;
171 memmap_map
[memmap_nr
].size
= size
;
175 static int __init
setup_memmap(char *p
)
178 u64 start_at
, mem_size
;
183 if (!strncmp(p
, "exactmap", 8)) {
184 pr_err("\"memmap=exactmap\" not valid on tile\n");
189 mem_size
= memparse(p
, &p
);
194 pr_err("\"memmap=nn@ss\" (force RAM) invalid on tile\n");
195 } else if (*p
== '#') {
196 pr_err("\"memmap=nn#ss\" (force ACPI data) invalid on tile\n");
197 } else if (*p
== '$') {
198 start_at
= memparse(p
+1, &p
);
199 add_memmap_region(start_at
, mem_size
);
203 maxmem_pfn
= (mem_size
>> HPAGE_SHIFT
) <<
204 (HPAGE_SHIFT
- PAGE_SHIFT
);
206 return *p
== '\0' ? 0 : -EINVAL
;
208 early_param("memmap", setup_memmap
);
210 static int __init
setup_mem(char *str
)
212 return setup_maxmem(str
);
214 early_param("mem", setup_mem
); /* compatibility with x86 */
216 static int __init
setup_isolnodes(char *str
)
218 char buf
[MAX_NUMNODES
* 5];
219 if (str
== NULL
|| nodelist_parse(str
, isolnodes
) != 0)
222 nodelist_scnprintf(buf
, sizeof(buf
), isolnodes
);
223 pr_info("Set isolnodes value to '%s'\n", buf
);
226 early_param("isolnodes", setup_isolnodes
);
228 #if defined(CONFIG_PCI) && !defined(__tilegx__)
229 static int __init
setup_pci_reserve(char* str
)
231 if (str
== NULL
|| kstrtouint(str
, 0, &pci_reserve_mb
) != 0 ||
232 pci_reserve_mb
> 3 * 1024)
235 pr_info("Reserving %dMB for PCIE root complex mappings\n",
239 early_param("pci_reserve", setup_pci_reserve
);
244 * vmalloc=size forces the vmalloc area to be exactly 'size' bytes.
245 * This can be used to increase (or decrease) the vmalloc area.
247 static int __init
parse_vmalloc(char *arg
)
252 VMALLOC_RESERVE
= (memparse(arg
, &arg
) + PGDIR_SIZE
- 1) & PGDIR_MASK
;
254 /* See validate_va() for more on this test. */
255 if ((long)_VMALLOC_START
>= 0)
256 early_panic("\"vmalloc=%#lx\" value too large: maximum %#lx\n",
257 VMALLOC_RESERVE
, _VMALLOC_END
- 0x80000000UL
);
261 early_param("vmalloc", parse_vmalloc
);
264 #ifdef CONFIG_HIGHMEM
266 * Determine for each controller where its lowmem is mapped and how much of
267 * it is mapped there. On controller zero, the first few megabytes are
268 * already mapped in as code at MEM_SV_START, so in principle we could
269 * start our data mappings higher up, but for now we don't bother, to avoid
270 * additional confusion.
272 * One question is whether, on systems with more than 768 Mb and
273 * controllers of different sizes, to map in a proportionate amount of
274 * each one, or to try to map the same amount from each controller.
275 * (E.g. if we have three controllers with 256MB, 1GB, and 256MB
276 * respectively, do we map 256MB from each, or do we map 128 MB, 512
277 * MB, and 128 MB respectively?) For now we use a proportionate
278 * solution like the latter.
280 * The VA/PA mapping demands that we align our decisions at 16 MB
281 * boundaries so that we can rapidly convert VA to PA.
283 static void *__init
setup_pa_va_mapping(void)
285 unsigned long curr_pages
= 0;
286 unsigned long vaddr
= PAGE_OFFSET
;
287 nodemask_t highonlynodes
= isolnodes
;
290 memset(pbase_map
, -1, sizeof(pbase_map
));
291 memset(vbase_map
, -1, sizeof(vbase_map
));
293 /* Node zero cannot be isolated for LOWMEM purposes. */
294 node_clear(0, highonlynodes
);
296 /* Count up the number of pages on non-highonlynodes controllers. */
297 mappable_physpages
= 0;
298 for_each_online_node(i
) {
299 if (!node_isset(i
, highonlynodes
))
300 mappable_physpages
+=
301 node_end_pfn
[i
] - node_start_pfn
[i
];
304 for_each_online_node(i
) {
305 unsigned long start
= node_start_pfn
[i
];
306 unsigned long end
= node_end_pfn
[i
];
307 unsigned long size
= end
- start
;
308 unsigned long vaddr_end
;
310 if (node_isset(i
, highonlynodes
)) {
311 /* Mark this controller as having no lowmem. */
312 node_lowmem_end_pfn
[i
] = start
;
317 if (mappable_physpages
> MAXMEM_PFN
) {
318 vaddr_end
= PAGE_OFFSET
+
319 (((u64
)curr_pages
* MAXMEM_PFN
/
323 vaddr_end
= PAGE_OFFSET
+ (curr_pages
<< PAGE_SHIFT
);
325 for (j
= 0; vaddr
< vaddr_end
; vaddr
+= HPAGE_SIZE
, ++j
) {
326 unsigned long this_pfn
=
327 start
+ (j
<< HUGETLB_PAGE_ORDER
);
328 pbase_map
[vaddr
>> HPAGE_SHIFT
] = this_pfn
;
329 if (vbase_map
[__pfn_to_highbits(this_pfn
)] ==
331 vbase_map
[__pfn_to_highbits(this_pfn
)] =
332 (void *)(vaddr
& HPAGE_MASK
);
334 node_lowmem_end_pfn
[i
] = start
+ (j
<< HUGETLB_PAGE_ORDER
);
335 BUG_ON(node_lowmem_end_pfn
[i
] > end
);
338 /* Return highest address of any mapped memory. */
339 return (void *)vaddr
;
341 #endif /* CONFIG_HIGHMEM */
344 * Register our most important memory mappings with the debug stub.
346 * This is up to 4 mappings for lowmem, one mapping per memory
347 * controller, plus one for our text segment.
349 static void store_permanent_mappings(void)
353 for_each_online_node(i
) {
354 HV_PhysAddr pa
= ((HV_PhysAddr
)node_start_pfn
[i
]) << PAGE_SHIFT
;
355 #ifdef CONFIG_HIGHMEM
356 HV_PhysAddr high_mapped_pa
= node_lowmem_end_pfn
[i
];
358 HV_PhysAddr high_mapped_pa
= node_end_pfn
[i
];
361 unsigned long pages
= high_mapped_pa
- node_start_pfn
[i
];
362 HV_VirtAddr addr
= (HV_VirtAddr
) __va(pa
);
363 hv_store_mapping(addr
, pages
<< PAGE_SHIFT
, pa
);
366 hv_store_mapping((HV_VirtAddr
)_text
,
367 (uint32_t)(_einittext
- _text
), 0);
371 * Use hv_inquire_physical() to populate node_{start,end}_pfn[]
372 * and node_online_map, doing suitable sanity-checking.
373 * Also set min_low_pfn, max_low_pfn, and max_pfn.
375 static void __init
setup_memory(void)
378 int highbits_seen
[NR_PA_HIGHBIT_VALUES
] = { 0 };
379 #ifdef CONFIG_HIGHMEM
385 #if defined(CONFIG_HIGHMEM) || defined(__tilegx__)
388 unsigned long physpages
= 0;
390 /* We are using a char to hold the cpu_2_node[] mapping */
391 BUILD_BUG_ON(MAX_NUMNODES
> 127);
393 /* Discover the ranges of memory available to us */
395 unsigned long start
, size
, end
, highbits
;
396 HV_PhysAddrRange range
= hv_inquire_physical(i
);
399 #ifdef CONFIG_FLATMEM
401 pr_err("Can't use discontiguous PAs: %#llx..%#llx\n",
402 range
.size
, range
.start
+ range
.size
);
407 if ((unsigned long)range
.start
) {
408 pr_err("Range not at 4GB multiple: %#llx..%#llx\n",
409 range
.start
, range
.start
+ range
.size
);
413 if ((range
.start
& (HPAGE_SIZE
-1)) != 0 ||
414 (range
.size
& (HPAGE_SIZE
-1)) != 0) {
415 unsigned long long start_pa
= range
.start
;
416 unsigned long long orig_size
= range
.size
;
417 range
.start
= (start_pa
+ HPAGE_SIZE
- 1) & HPAGE_MASK
;
418 range
.size
-= (range
.start
- start_pa
);
419 range
.size
&= HPAGE_MASK
;
420 pr_err("Range not hugepage-aligned: %#llx..%#llx: now %#llx-%#llx\n",
421 start_pa
, start_pa
+ orig_size
,
422 range
.start
, range
.start
+ range
.size
);
424 highbits
= __pa_to_highbits(range
.start
);
425 if (highbits
>= NR_PA_HIGHBIT_VALUES
) {
426 pr_err("PA high bits too high: %#llx..%#llx\n",
427 range
.start
, range
.start
+ range
.size
);
430 if (highbits_seen
[highbits
]) {
431 pr_err("Range overlaps in high bits: %#llx..%#llx\n",
432 range
.start
, range
.start
+ range
.size
);
435 highbits_seen
[highbits
] = 1;
436 if (PFN_DOWN(range
.size
) > maxnodemem_pfn
[i
]) {
437 int max_size
= maxnodemem_pfn
[i
];
439 pr_err("Maxnodemem reduced node %d to %d pages\n",
441 range
.size
= PFN_PHYS(max_size
);
443 pr_err("Maxnodemem disabled node %d\n", i
);
447 if (physpages
+ PFN_DOWN(range
.size
) > maxmem_pfn
) {
448 int max_size
= maxmem_pfn
- physpages
;
450 pr_err("Maxmem reduced node %d to %d pages\n",
452 range
.size
= PFN_PHYS(max_size
);
454 pr_err("Maxmem disabled node %d\n", i
);
458 if (i
>= MAX_NUMNODES
) {
459 pr_err("Too many PA nodes (#%d): %#llx...%#llx\n",
460 i
, range
.size
, range
.size
+ range
.start
);
464 start
= range
.start
>> PAGE_SHIFT
;
465 size
= range
.size
>> PAGE_SHIFT
;
469 if (((HV_PhysAddr
)end
<< PAGE_SHIFT
) !=
470 (range
.start
+ range
.size
)) {
471 pr_err("PAs too high to represent: %#llx..%#llx\n",
472 range
.start
, range
.start
+ range
.size
);
476 #if defined(CONFIG_PCI) && !defined(__tilegx__)
478 * Blocks that overlap the pci reserved region must
479 * have enough space to hold the maximum percpu data
480 * region at the top of the range. If there isn't
481 * enough space above the reserved region, just
484 if (start
<= pci_reserve_start_pfn
&&
485 end
> pci_reserve_start_pfn
) {
486 unsigned int per_cpu_size
=
487 __per_cpu_end
- __per_cpu_start
;
488 unsigned int percpu_pages
=
489 NR_CPUS
* (PFN_UP(per_cpu_size
) >> PAGE_SHIFT
);
490 if (end
< pci_reserve_end_pfn
+ percpu_pages
) {
491 end
= pci_reserve_start_pfn
;
492 pr_err("PCI mapping region reduced node %d to %ld pages\n",
498 for (j
= __pfn_to_highbits(start
);
499 j
<= __pfn_to_highbits(end
- 1); j
++)
500 highbits_to_node
[j
] = i
;
502 node_start_pfn
[i
] = start
;
503 node_end_pfn
[i
] = end
;
504 node_controller
[i
] = range
.controller
;
508 /* Mark node as online */
509 node_set(i
, node_online_map
);
510 node_set(i
, node_possible_map
);
515 * For 4KB pages, mem_map "struct page" data is 1% of the size
516 * of the physical memory, so can be quite big (640 MB for
517 * four 16G zones). These structures must be mapped in
518 * lowmem, and since we currently cap out at about 768 MB,
519 * it's impractical to try to use this much address space.
520 * For now, arbitrarily cap the amount of physical memory
521 * we're willing to use at 8 million pages (32GB of 4KB pages).
523 cap
= 8 * 1024 * 1024; /* 8 million pages */
524 if (physpages
> cap
) {
525 int num_nodes
= num_online_nodes();
526 int cap_each
= cap
/ num_nodes
;
527 unsigned long dropped_pages
= 0;
528 for (i
= 0; i
< num_nodes
; ++i
) {
529 int size
= node_end_pfn
[i
] - node_start_pfn
[i
];
530 if (size
> cap_each
) {
531 dropped_pages
+= (size
- cap_each
);
532 node_end_pfn
[i
] = node_start_pfn
[i
] + cap_each
;
535 physpages
-= dropped_pages
;
536 pr_warning("Only using %ldMB memory;"
537 " ignoring %ldMB.\n",
538 physpages
>> (20 - PAGE_SHIFT
),
539 dropped_pages
>> (20 - PAGE_SHIFT
));
540 pr_warning("Consider using a larger page size.\n");
544 /* Heap starts just above the last loaded address. */
545 min_low_pfn
= PFN_UP((unsigned long)_end
- PAGE_OFFSET
);
547 #ifdef CONFIG_HIGHMEM
548 /* Find where we map lowmem from each controller. */
549 high_memory
= setup_pa_va_mapping();
551 /* Set max_low_pfn based on what node 0 can directly address. */
552 max_low_pfn
= node_lowmem_end_pfn
[0];
554 lowmem_pages
= (mappable_physpages
> MAXMEM_PFN
) ?
555 MAXMEM_PFN
: mappable_physpages
;
556 highmem_pages
= (long) (physpages
- lowmem_pages
);
558 pr_notice("%ldMB HIGHMEM available\n",
559 pages_to_mb(highmem_pages
> 0 ? highmem_pages
: 0));
560 pr_notice("%ldMB LOWMEM available\n", pages_to_mb(lowmem_pages
));
562 /* Set max_low_pfn based on what node 0 can directly address. */
563 max_low_pfn
= node_end_pfn
[0];
566 if (node_end_pfn
[0] > MAXMEM_PFN
) {
567 pr_warning("Only using %ldMB LOWMEM.\n",
569 pr_warning("Use a HIGHMEM enabled kernel.\n");
570 max_low_pfn
= MAXMEM_PFN
;
571 max_pfn
= MAXMEM_PFN
;
572 node_end_pfn
[0] = MAXMEM_PFN
;
574 pr_notice("%ldMB memory available\n",
575 pages_to_mb(node_end_pfn
[0]));
577 for (i
= 1; i
< MAX_NUMNODES
; ++i
) {
578 node_start_pfn
[i
] = 0;
581 high_memory
= __va(node_end_pfn
[0]);
584 for (i
= 0; i
< MAX_NUMNODES
; ++i
) {
585 int pages
= node_end_pfn
[i
] - node_start_pfn
[i
];
586 lowmem_pages
+= pages
;
588 high_memory
= pfn_to_kaddr(node_end_pfn
[i
]);
590 pr_notice("%ldMB memory available\n", pages_to_mb(lowmem_pages
));
596 * On 32-bit machines, we only put bootmem on the low controller,
597 * since PAs > 4GB can't be used in bootmem. In principle one could
598 * imagine, e.g., multiple 1 GB controllers all of which could support
599 * bootmem, but in practice using controllers this small isn't a
600 * particularly interesting scenario, so we just keep it simple and
601 * use only the first controller for bootmem on 32-bit machines.
603 static inline int node_has_bootmem(int nid
)
612 static inline unsigned long alloc_bootmem_pfn(int nid
,
616 void *kva
= __alloc_bootmem_node(NODE_DATA(nid
), size
,
618 unsigned long pfn
= kaddr_to_pfn(kva
);
619 BUG_ON(goal
&& PFN_PHYS(pfn
) != goal
);
623 static void __init
setup_bootmem_allocator_node(int i
)
625 unsigned long start
, end
, mapsize
, mapstart
;
627 if (node_has_bootmem(i
)) {
628 NODE_DATA(i
)->bdata
= &bootmem_node_data
[i
];
630 /* Share controller zero's bdata for now. */
631 NODE_DATA(i
)->bdata
= &bootmem_node_data
[0];
635 /* Skip up to after the bss in node 0. */
636 start
= (i
== 0) ? min_low_pfn
: node_start_pfn
[i
];
638 /* Only lowmem, if we're a HIGHMEM build. */
639 #ifdef CONFIG_HIGHMEM
640 end
= node_lowmem_end_pfn
[i
];
642 end
= node_end_pfn
[i
];
645 /* No memory here. */
649 /* Figure out where the bootmem bitmap is located. */
650 mapsize
= bootmem_bootmap_pages(end
- start
);
652 /* Use some space right before the heap on node 0. */
656 /* Allocate bitmap on node 0 to avoid page table issues. */
657 mapstart
= alloc_bootmem_pfn(0, PFN_PHYS(mapsize
), 0);
660 /* Initialize a node. */
661 init_bootmem_node(NODE_DATA(i
), mapstart
, start
, end
);
663 /* Free all the space back into the allocator. */
664 free_bootmem(PFN_PHYS(start
), PFN_PHYS(end
- start
));
666 #if defined(CONFIG_PCI) && !defined(__tilegx__)
668 * Throw away any memory aliased by the PCI region.
670 if (pci_reserve_start_pfn
< end
&& pci_reserve_end_pfn
> start
) {
671 start
= max(pci_reserve_start_pfn
, start
);
672 end
= min(pci_reserve_end_pfn
, end
);
673 reserve_bootmem(PFN_PHYS(start
), PFN_PHYS(end
- start
),
679 static void __init
setup_bootmem_allocator(void)
682 for (i
= 0; i
< MAX_NUMNODES
; ++i
)
683 setup_bootmem_allocator_node(i
);
685 /* Reserve any memory excluded by "memmap" arguments. */
686 for (i
= 0; i
< memmap_nr
; ++i
) {
687 struct memmap_entry
*m
= &memmap_map
[i
];
688 reserve_bootmem(m
->addr
, m
->size
, BOOTMEM_DEFAULT
);
691 #ifdef CONFIG_BLK_DEV_INITRD
693 /* Make sure the initrd memory region is not modified. */
694 if (reserve_bootmem(initrd_start
, initrd_end
- initrd_start
,
695 BOOTMEM_EXCLUSIVE
)) {
696 pr_crit("The initrd memory region has been polluted. Disabling it.\n");
701 * Translate initrd_start & initrd_end from PA to VA for
704 initrd_start
+= PAGE_OFFSET
;
705 initrd_end
+= PAGE_OFFSET
;
711 if (crashk_res
.start
!= crashk_res
.end
)
712 reserve_bootmem(crashk_res
.start
, resource_size(&crashk_res
),
717 void *__init
alloc_remap(int nid
, unsigned long size
)
719 int pages
= node_end_pfn
[nid
] - node_start_pfn
[nid
];
720 void *map
= pfn_to_kaddr(node_memmap_pfn
[nid
]);
721 BUG_ON(size
!= pages
* sizeof(struct page
));
722 memset(map
, 0, size
);
726 static int __init
percpu_size(void)
728 int size
= __per_cpu_end
- __per_cpu_start
;
729 size
+= PERCPU_MODULE_RESERVE
;
730 size
+= PERCPU_DYNAMIC_EARLY_SIZE
;
731 if (size
< PCPU_MIN_UNIT_SIZE
)
732 size
= PCPU_MIN_UNIT_SIZE
;
733 size
= roundup(size
, PAGE_SIZE
);
735 /* In several places we assume the per-cpu data fits on a huge page. */
736 BUG_ON(kdata_huge
&& size
> HPAGE_SIZE
);
740 static void __init
zone_sizes_init(void)
742 unsigned long zones_size
[MAX_NR_ZONES
] = { 0 };
743 int size
= percpu_size();
744 int num_cpus
= smp_height
* smp_width
;
745 const unsigned long dma_end
= (1UL << (32 - PAGE_SHIFT
));
749 for (i
= 0; i
< num_cpus
; ++i
)
750 node_percpu
[cpu_to_node(i
)] += size
;
752 for_each_online_node(i
) {
753 unsigned long start
= node_start_pfn
[i
];
754 unsigned long end
= node_end_pfn
[i
];
755 #ifdef CONFIG_HIGHMEM
756 unsigned long lowmem_end
= node_lowmem_end_pfn
[i
];
758 unsigned long lowmem_end
= end
;
760 int memmap_size
= (end
- start
) * sizeof(struct page
);
761 node_free_pfn
[i
] = start
;
764 * Set aside pages for per-cpu data and the mem_map array.
766 * Since the per-cpu data requires special homecaching,
767 * if we are in kdata_huge mode, we put it at the end of
768 * the lowmem region. If we're not in kdata_huge mode,
769 * we take the per-cpu pages from the bottom of the
770 * controller, since that avoids fragmenting a huge page
771 * that users might want. We always take the memmap
772 * from the bottom of the controller, since with
773 * kdata_huge that lets it be under a huge TLB entry.
775 * If the user has requested isolnodes for a controller,
776 * though, there'll be no lowmem, so we just alloc_bootmem
777 * the memmap. There will be no percpu memory either.
779 if (i
!= 0 && cpu_isset(i
, isolnodes
)) {
781 alloc_bootmem_pfn(0, memmap_size
, 0);
782 BUG_ON(node_percpu
[i
] != 0);
783 } else if (node_has_bootmem(start
)) {
784 unsigned long goal
= 0;
786 alloc_bootmem_pfn(i
, memmap_size
, 0);
788 goal
= PFN_PHYS(lowmem_end
) - node_percpu
[i
];
791 alloc_bootmem_pfn(i
, node_percpu
[i
],
794 /* In non-bootmem zones, just reserve some pages. */
795 node_memmap_pfn
[i
] = node_free_pfn
[i
];
796 node_free_pfn
[i
] += PFN_UP(memmap_size
);
798 node_percpu_pfn
[i
] = node_free_pfn
[i
];
799 node_free_pfn
[i
] += PFN_UP(node_percpu
[i
]);
802 lowmem_end
- PFN_UP(node_percpu
[i
]);
806 #ifdef CONFIG_HIGHMEM
807 if (start
> lowmem_end
) {
808 zones_size
[ZONE_NORMAL
] = 0;
809 zones_size
[ZONE_HIGHMEM
] = end
- start
;
811 zones_size
[ZONE_NORMAL
] = lowmem_end
- start
;
812 zones_size
[ZONE_HIGHMEM
] = end
- lowmem_end
;
815 zones_size
[ZONE_NORMAL
] = end
- start
;
818 if (start
< dma_end
) {
819 zones_size
[ZONE_DMA
] = min(zones_size
[ZONE_NORMAL
],
821 zones_size
[ZONE_NORMAL
] -= zones_size
[ZONE_DMA
];
823 zones_size
[ZONE_DMA
] = 0;
826 /* Take zone metadata from controller 0 if we're isolnode. */
827 if (node_isset(i
, isolnodes
))
828 NODE_DATA(i
)->bdata
= &bootmem_node_data
[0];
830 free_area_init_node(i
, zones_size
, start
, NULL
);
831 printk(KERN_DEBUG
" Normal zone: %ld per-cpu pages\n",
832 PFN_UP(node_percpu
[i
]));
834 /* Track the type of memory on each node */
835 if (zones_size
[ZONE_NORMAL
] || zones_size
[ZONE_DMA
])
836 node_set_state(i
, N_NORMAL_MEMORY
);
837 #ifdef CONFIG_HIGHMEM
839 node_set_state(i
, N_HIGH_MEMORY
);
848 /* which logical CPUs are on which nodes */
849 struct cpumask node_2_cpu_mask
[MAX_NUMNODES
] __write_once
;
850 EXPORT_SYMBOL(node_2_cpu_mask
);
852 /* which node each logical CPU is on */
853 char cpu_2_node
[NR_CPUS
] __write_once
__attribute__((aligned(L2_CACHE_BYTES
)));
854 EXPORT_SYMBOL(cpu_2_node
);
856 /* Return cpu_to_node() except for cpus not yet assigned, which return -1 */
857 static int __init
cpu_to_bound_node(int cpu
, struct cpumask
* unbound_cpus
)
859 if (!cpu_possible(cpu
) || cpumask_test_cpu(cpu
, unbound_cpus
))
862 return cpu_to_node(cpu
);
865 /* Return number of immediately-adjacent tiles sharing the same NUMA node. */
866 static int __init
node_neighbors(int node
, int cpu
,
867 struct cpumask
*unbound_cpus
)
874 if (x
> 0 && cpu_to_bound_node(cpu
-1, unbound_cpus
) == node
)
876 if (x
< w
-1 && cpu_to_bound_node(cpu
+1, unbound_cpus
) == node
)
878 if (y
> 0 && cpu_to_bound_node(cpu
-w
, unbound_cpus
) == node
)
880 if (y
< h
-1 && cpu_to_bound_node(cpu
+w
, unbound_cpus
) == node
)
885 static void __init
setup_numa_mapping(void)
887 int distance
[MAX_NUMNODES
][NR_CPUS
];
889 int cpu
, node
, cpus
, i
, x
, y
;
890 int num_nodes
= num_online_nodes();
891 struct cpumask unbound_cpus
;
892 nodemask_t default_nodes
;
894 cpumask_clear(&unbound_cpus
);
896 /* Get set of nodes we will use for defaults */
897 nodes_andnot(default_nodes
, node_online_map
, isolnodes
);
898 if (nodes_empty(default_nodes
)) {
899 BUG_ON(!node_isset(0, node_online_map
));
900 pr_err("Forcing NUMA node zero available as a default node\n");
901 node_set(0, default_nodes
);
904 /* Populate the distance[] array */
905 memset(distance
, -1, sizeof(distance
));
907 for (coord
.y
= 0; coord
.y
< smp_height
; ++coord
.y
) {
908 for (coord
.x
= 0; coord
.x
< smp_width
;
910 BUG_ON(cpu
>= nr_cpu_ids
);
911 if (!cpu_possible(cpu
)) {
912 cpu_2_node
[cpu
] = -1;
915 for_each_node_mask(node
, default_nodes
) {
916 HV_MemoryControllerInfo info
=
917 hv_inquire_memory_controller(
918 coord
, node_controller
[node
]);
919 distance
[node
][cpu
] =
920 ABS(info
.coord
.x
) + ABS(info
.coord
.y
);
922 cpumask_set_cpu(cpu
, &unbound_cpus
);
928 * Round-robin through the NUMA nodes until all the cpus are
929 * assigned. We could be more clever here (e.g. create four
930 * sorted linked lists on the same set of cpu nodes, and pull
931 * off them in round-robin sequence, removing from all four
932 * lists each time) but given the relatively small numbers
933 * involved, O(n^2) seem OK for a one-time cost.
935 node
= first_node(default_nodes
);
936 while (!cpumask_empty(&unbound_cpus
)) {
938 int best_distance
= INT_MAX
;
939 for (cpu
= 0; cpu
< cpus
; ++cpu
) {
940 if (cpumask_test_cpu(cpu
, &unbound_cpus
)) {
942 * Compute metric, which is how much
943 * closer the cpu is to this memory
944 * controller than the others, shifted
945 * up, and then the number of
946 * neighbors already in the node as an
947 * epsilon adjustment to try to keep
950 int d
= distance
[node
][cpu
] * num_nodes
;
951 for_each_node_mask(i
, default_nodes
) {
953 d
-= distance
[i
][cpu
];
955 d
*= 8; /* allow space for epsilon */
956 d
-= node_neighbors(node
, cpu
, &unbound_cpus
);
957 if (d
< best_distance
) {
963 BUG_ON(best_cpu
< 0);
964 cpumask_set_cpu(best_cpu
, &node_2_cpu_mask
[node
]);
965 cpu_2_node
[best_cpu
] = node
;
966 cpumask_clear_cpu(best_cpu
, &unbound_cpus
);
967 node
= next_node(node
, default_nodes
);
968 if (node
== MAX_NUMNODES
)
969 node
= first_node(default_nodes
);
972 /* Print out node assignments and set defaults for disabled cpus */
974 for (y
= 0; y
< smp_height
; ++y
) {
975 printk(KERN_DEBUG
"NUMA cpu-to-node row %d:", y
);
976 for (x
= 0; x
< smp_width
; ++x
, ++cpu
) {
977 if (cpu_to_node(cpu
) < 0) {
979 cpu_2_node
[cpu
] = first_node(default_nodes
);
981 pr_cont(" %d", cpu_to_node(cpu
));
988 static struct cpu cpu_devices
[NR_CPUS
];
990 static int __init
topology_init(void)
994 for_each_online_node(i
)
995 register_one_node(i
);
997 for (i
= 0; i
< smp_height
* smp_width
; ++i
)
998 register_cpu(&cpu_devices
[i
], i
);
1003 subsys_initcall(topology_init
);
1005 #else /* !CONFIG_NUMA */
1007 #define setup_numa_mapping() do { } while (0)
1009 #endif /* CONFIG_NUMA */
1012 * Initialize hugepage support on this cpu. We do this on all cores
1013 * early in boot: before argument parsing for the boot cpu, and after
1014 * argument parsing but before the init functions run on the secondaries.
1015 * So the values we set up here in the hypervisor may be overridden on
1016 * the boot cpu as arguments are parsed.
1018 static void init_super_pages(void)
1020 #ifdef CONFIG_HUGETLB_SUPER_PAGES
1022 for (i
= 0; i
< HUGE_SHIFT_ENTRIES
; ++i
)
1023 hv_set_pte_super_shift(i
, huge_shift
[i
]);
1028 * setup_cpu() - Do all necessary per-cpu, tile-specific initialization.
1029 * @boot: Is this the boot cpu?
1031 * Called from setup_arch() on the boot cpu, or online_secondary().
1033 void setup_cpu(int boot
)
1035 /* The boot cpu sets up its permanent mappings much earlier. */
1037 store_permanent_mappings();
1039 /* Allow asynchronous TLB interrupts. */
1040 #if CHIP_HAS_TILE_DMA()
1041 arch_local_irq_unmask(INT_DMATLB_MISS
);
1042 arch_local_irq_unmask(INT_DMATLB_ACCESS
);
1045 arch_local_irq_unmask(INT_SINGLE_STEP_K
);
1049 * Allow user access to many generic SPRs, like the cycle
1050 * counter, PASS/FAIL/DONE, INTERRUPT_CRITICAL_SECTION, etc.
1052 __insn_mtspr(SPR_MPL_WORLD_ACCESS_SET_0
, 1);
1055 /* Static network is not restricted. */
1056 __insn_mtspr(SPR_MPL_SN_ACCESS_SET_0
, 1);
1060 * Set the MPL for interrupt control 0 & 1 to the corresponding
1061 * values. This includes access to the SYSTEM_SAVE and EX_CONTEXT
1062 * SPRs, as well as the interrupt mask.
1064 __insn_mtspr(SPR_MPL_INTCTRL_0_SET_0
, 1);
1065 __insn_mtspr(SPR_MPL_INTCTRL_1_SET_1
, 1);
1067 /* Initialize IRQ support for this cpu. */
1070 #ifdef CONFIG_HARDWALL
1071 /* Reset the network state on this cpu. */
1072 reset_network_state();
1078 #ifdef CONFIG_BLK_DEV_INITRD
1080 static int __initdata set_initramfs_file
;
1081 static char __initdata initramfs_file
[128] = "initramfs";
1083 static int __init
setup_initramfs_file(char *str
)
1087 strncpy(initramfs_file
, str
, sizeof(initramfs_file
) - 1);
1088 set_initramfs_file
= 1;
1092 early_param("initramfs_file", setup_initramfs_file
);
1095 * We look for a file called "initramfs" in the hvfs. If there is one, we
1096 * allocate some memory for it and it will be unpacked to the initramfs.
1097 * If it's compressed, the initd code will uncompress it first.
1099 static void __init
load_hv_initrd(void)
1101 HV_FS_StatInfo stat
;
1105 /* If initrd has already been set, skip initramfs file in hvfs. */
1109 fd
= hv_fs_findfile((HV_VirtAddr
) initramfs_file
);
1110 if (fd
== HV_ENOENT
) {
1111 if (set_initramfs_file
) {
1112 pr_warning("No such hvfs initramfs file '%s'\n",
1116 /* Try old backwards-compatible name. */
1117 fd
= hv_fs_findfile((HV_VirtAddr
)"initramfs.cpio.gz");
1118 if (fd
== HV_ENOENT
)
1123 stat
= hv_fs_fstat(fd
);
1124 BUG_ON(stat
.size
< 0);
1125 if (stat
.flags
& HV_FS_ISDIR
) {
1126 pr_warning("Ignoring hvfs file '%s': it's a directory.\n",
1130 initrd
= alloc_bootmem_pages(stat
.size
);
1131 rc
= hv_fs_pread(fd
, (HV_VirtAddr
) initrd
, stat
.size
, 0);
1132 if (rc
!= stat
.size
) {
1133 pr_err("Error reading %d bytes from hvfs file '%s': %d\n",
1134 stat
.size
, initramfs_file
, rc
);
1135 free_initrd_mem((unsigned long) initrd
, stat
.size
);
1138 initrd_start
= (unsigned long) initrd
;
1139 initrd_end
= initrd_start
+ stat
.size
;
1142 void __init
free_initrd_mem(unsigned long begin
, unsigned long end
)
1144 free_bootmem(__pa(begin
), end
- begin
);
1147 static int __init
setup_initrd(char *str
)
1150 unsigned long initrd_size
;
1152 initrd_size
= str
? simple_strtoul(str
, &endp
, 0) : 0;
1153 if (initrd_size
== 0 || *endp
!= '@')
1156 initrd_start
= simple_strtoul(endp
+1, &endp
, 0);
1157 if (initrd_start
== 0)
1160 initrd_end
= initrd_start
+ initrd_size
;
1164 early_param("initrd", setup_initrd
);
1167 static inline void load_hv_initrd(void) {}
1168 #endif /* CONFIG_BLK_DEV_INITRD */
1170 static void __init
validate_hv(void)
1173 * It may already be too late, but let's check our built-in
1174 * configuration against what the hypervisor is providing.
1176 unsigned long glue_size
= hv_sysconf(HV_SYSCONF_GLUE_SIZE
);
1177 int hv_page_size
= hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL
);
1178 int hv_hpage_size
= hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE
);
1179 HV_ASIDRange asid_range
;
1182 HV_Topology topology
= hv_inquire_topology();
1183 BUG_ON(topology
.coord
.x
!= 0 || topology
.coord
.y
!= 0);
1184 if (topology
.width
!= 1 || topology
.height
!= 1) {
1185 pr_warning("Warning: booting UP kernel on %dx%d grid;"
1186 " will ignore all but first tile.\n",
1187 topology
.width
, topology
.height
);
1191 if (PAGE_OFFSET
+ HV_GLUE_START_CPA
+ glue_size
> (unsigned long)_text
)
1192 early_panic("Hypervisor glue size %ld is too big!\n",
1194 if (hv_page_size
!= PAGE_SIZE
)
1195 early_panic("Hypervisor page size %#x != our %#lx\n",
1196 hv_page_size
, PAGE_SIZE
);
1197 if (hv_hpage_size
!= HPAGE_SIZE
)
1198 early_panic("Hypervisor huge page size %#x != our %#lx\n",
1199 hv_hpage_size
, HPAGE_SIZE
);
1203 * Some hypervisor APIs take a pointer to a bitmap array
1204 * whose size is at least the number of cpus on the chip.
1205 * We use a struct cpumask for this, so it must be big enough.
1207 if ((smp_height
* smp_width
) > nr_cpu_ids
)
1208 early_panic("Hypervisor %d x %d grid too big for Linux"
1209 " NR_CPUS %d\n", smp_height
, smp_width
,
1214 * Check that we're using allowed ASIDs, and initialize the
1215 * various asid variables to their appropriate initial states.
1217 asid_range
= hv_inquire_asid(0);
1218 min_asid
= asid_range
.start
;
1219 __this_cpu_write(current_asid
, min_asid
);
1220 max_asid
= asid_range
.start
+ asid_range
.size
- 1;
1222 if (hv_confstr(HV_CONFSTR_CHIP_MODEL
, (HV_VirtAddr
)chip_model
,
1223 sizeof(chip_model
)) < 0) {
1224 pr_err("Warning: HV_CONFSTR_CHIP_MODEL not available\n");
1225 strlcpy(chip_model
, "unknown", sizeof(chip_model
));
1229 static void __init
validate_va(void)
1231 #ifndef __tilegx__ /* FIXME: GX: probably some validation relevant here */
1233 * Similarly, make sure we're only using allowed VAs.
1234 * We assume we can contiguously use MEM_USER_INTRPT .. MEM_HV_START,
1235 * and 0 .. KERNEL_HIGH_VADDR.
1236 * In addition, make sure we CAN'T use the end of memory, since
1237 * we use the last chunk of each pgd for the pgd_list.
1239 int i
, user_kernel_ok
= 0;
1240 unsigned long max_va
= 0;
1241 unsigned long list_va
=
1242 ((PGD_LIST_OFFSET
/ sizeof(pgd_t
)) << PGDIR_SHIFT
);
1244 for (i
= 0; ; ++i
) {
1245 HV_VirtAddrRange range
= hv_inquire_virtual(i
);
1246 if (range
.size
== 0)
1248 if (range
.start
<= MEM_USER_INTRPT
&&
1249 range
.start
+ range
.size
>= MEM_HV_START
)
1251 if (range
.start
== 0)
1252 max_va
= range
.size
;
1253 BUG_ON(range
.start
+ range
.size
> list_va
);
1255 if (!user_kernel_ok
)
1256 early_panic("Hypervisor not configured for user/kernel VAs\n");
1258 early_panic("Hypervisor not configured for low VAs\n");
1259 if (max_va
< KERNEL_HIGH_VADDR
)
1260 early_panic("Hypervisor max VA %#lx smaller than %#lx\n",
1261 max_va
, KERNEL_HIGH_VADDR
);
1263 /* Kernel PCs must have their high bit set; see intvec.S. */
1264 if ((long)VMALLOC_START
>= 0)
1266 "Linux VMALLOC region below the 2GB line (%#lx)!\n"
1267 "Reconfigure the kernel with smaller VMALLOC_RESERVE.\n",
1273 * cpu_lotar_map lists all the cpus that are valid for the supervisor
1274 * to cache data on at a page level, i.e. what cpus can be placed in
1275 * the LOTAR field of a PTE. It is equivalent to the set of possible
1276 * cpus plus any other cpus that are willing to share their cache.
1277 * It is set by hv_inquire_tiles(HV_INQ_TILES_LOTAR).
1279 struct cpumask __write_once cpu_lotar_map
;
1280 EXPORT_SYMBOL(cpu_lotar_map
);
1283 * hash_for_home_map lists all the tiles that hash-for-home data
1284 * will be cached on. Note that this may includes tiles that are not
1285 * valid for this supervisor to use otherwise (e.g. if a hypervisor
1286 * device is being shared between multiple supervisors).
1287 * It is set by hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE).
1289 struct cpumask hash_for_home_map
;
1290 EXPORT_SYMBOL(hash_for_home_map
);
1293 * cpu_cacheable_map lists all the cpus whose caches the hypervisor can
1294 * flush on our behalf. It is set to cpu_possible_mask OR'ed with
1295 * hash_for_home_map, and it is what should be passed to
1296 * hv_flush_remote() to flush all caches. Note that if there are
1297 * dedicated hypervisor driver tiles that have authorized use of their
1298 * cache, those tiles will only appear in cpu_lotar_map, NOT in
1299 * cpu_cacheable_map, as they are a special case.
1301 struct cpumask __write_once cpu_cacheable_map
;
1302 EXPORT_SYMBOL(cpu_cacheable_map
);
1304 static __initdata
struct cpumask disabled_map
;
1306 static int __init
disabled_cpus(char *str
)
1308 int boot_cpu
= smp_processor_id();
1310 if (str
== NULL
|| cpulist_parse_crop(str
, &disabled_map
) != 0)
1312 if (cpumask_test_cpu(boot_cpu
, &disabled_map
)) {
1313 pr_err("disabled_cpus: can't disable boot cpu %d\n", boot_cpu
);
1314 cpumask_clear_cpu(boot_cpu
, &disabled_map
);
1319 early_param("disabled_cpus", disabled_cpus
);
1321 void __init
print_disabled_cpus(void)
1323 if (!cpumask_empty(&disabled_map
)) {
1325 cpulist_scnprintf(buf
, sizeof(buf
), &disabled_map
);
1326 pr_info("CPUs not available for Linux: %s\n", buf
);
1330 static void __init
setup_cpu_maps(void)
1332 struct cpumask hv_disabled_map
, cpu_possible_init
;
1333 int boot_cpu
= smp_processor_id();
1336 /* Learn which cpus are allowed by the hypervisor. */
1337 rc
= hv_inquire_tiles(HV_INQ_TILES_AVAIL
,
1338 (HV_VirtAddr
) cpumask_bits(&cpu_possible_init
),
1339 sizeof(cpu_cacheable_map
));
1341 early_panic("hv_inquire_tiles(AVAIL) failed: rc %d\n", rc
);
1342 if (!cpumask_test_cpu(boot_cpu
, &cpu_possible_init
))
1343 early_panic("Boot CPU %d disabled by hypervisor!\n", boot_cpu
);
1345 /* Compute the cpus disabled by the hvconfig file. */
1346 cpumask_complement(&hv_disabled_map
, &cpu_possible_init
);
1348 /* Include them with the cpus disabled by "disabled_cpus". */
1349 cpumask_or(&disabled_map
, &disabled_map
, &hv_disabled_map
);
1352 * Disable every cpu after "setup_max_cpus". But don't mark
1353 * as disabled the cpus that are outside of our initial rectangle,
1354 * since that turns out to be confusing.
1356 cpus
= 1; /* this cpu */
1357 cpumask_set_cpu(boot_cpu
, &disabled_map
); /* ignore this cpu */
1358 for (i
= 0; cpus
< setup_max_cpus
; ++i
)
1359 if (!cpumask_test_cpu(i
, &disabled_map
))
1361 for (; i
< smp_height
* smp_width
; ++i
)
1362 cpumask_set_cpu(i
, &disabled_map
);
1363 cpumask_clear_cpu(boot_cpu
, &disabled_map
); /* reset this cpu */
1364 for (i
= smp_height
* smp_width
; i
< NR_CPUS
; ++i
)
1365 cpumask_clear_cpu(i
, &disabled_map
);
1368 * Setup cpu_possible map as every cpu allocated to us, minus
1369 * the results of any "disabled_cpus" settings.
1371 cpumask_andnot(&cpu_possible_init
, &cpu_possible_init
, &disabled_map
);
1372 init_cpu_possible(&cpu_possible_init
);
1374 /* Learn which cpus are valid for LOTAR caching. */
1375 rc
= hv_inquire_tiles(HV_INQ_TILES_LOTAR
,
1376 (HV_VirtAddr
) cpumask_bits(&cpu_lotar_map
),
1377 sizeof(cpu_lotar_map
));
1379 pr_err("warning: no HV_INQ_TILES_LOTAR; using AVAIL\n");
1380 cpu_lotar_map
= *cpu_possible_mask
;
1383 /* Retrieve set of CPUs used for hash-for-home caching */
1384 rc
= hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE
,
1385 (HV_VirtAddr
) hash_for_home_map
.bits
,
1386 sizeof(hash_for_home_map
));
1388 early_panic("hv_inquire_tiles(HFH_CACHE) failed: rc %d\n", rc
);
1389 cpumask_or(&cpu_cacheable_map
, cpu_possible_mask
, &hash_for_home_map
);
1393 static int __init
dataplane(char *str
)
1395 pr_warning("WARNING: dataplane support disabled in this kernel\n");
1399 early_param("dataplane", dataplane
);
1401 #ifdef CONFIG_CMDLINE_BOOL
1402 static char __initdata builtin_cmdline
[COMMAND_LINE_SIZE
] = CONFIG_CMDLINE
;
1405 void __init
setup_arch(char **cmdline_p
)
1409 #if defined(CONFIG_CMDLINE_BOOL) && defined(CONFIG_CMDLINE_OVERRIDE)
1410 len
= hv_get_command_line((HV_VirtAddr
) boot_command_line
,
1412 if (boot_command_line
[0])
1413 pr_warning("WARNING: ignoring dynamic command line \"%s\"\n",
1415 strlcpy(boot_command_line
, builtin_cmdline
, COMMAND_LINE_SIZE
);
1418 #if defined(CONFIG_CMDLINE_BOOL)
1419 if (builtin_cmdline
[0]) {
1420 int builtin_len
= strlcpy(boot_command_line
, builtin_cmdline
,
1422 if (builtin_len
< COMMAND_LINE_SIZE
-1)
1423 boot_command_line
[builtin_len
++] = ' ';
1424 hv_cmdline
= &boot_command_line
[builtin_len
];
1425 len
= COMMAND_LINE_SIZE
- builtin_len
;
1429 hv_cmdline
= boot_command_line
;
1430 len
= COMMAND_LINE_SIZE
;
1432 len
= hv_get_command_line((HV_VirtAddr
) hv_cmdline
, len
);
1433 if (len
< 0 || len
> COMMAND_LINE_SIZE
)
1434 early_panic("hv_get_command_line failed: %d\n", len
);
1437 *cmdline_p
= boot_command_line
;
1439 /* Set disabled_map and setup_max_cpus very early */
1440 parse_early_param();
1442 /* Make sure the kernel is compatible with the hypervisor. */
1449 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1451 * Initialize the PCI structures. This is done before memory
1452 * setup so that we know whether or not a pci_reserve region
1455 if (tile_pci_init() == 0)
1458 /* PCI systems reserve a region just below 4GB for mapping iomem. */
1459 pci_reserve_end_pfn
= (1 << (32 - PAGE_SHIFT
));
1460 pci_reserve_start_pfn
= pci_reserve_end_pfn
-
1461 (pci_reserve_mb
<< (20 - PAGE_SHIFT
));
1464 init_mm
.start_code
= (unsigned long) _text
;
1465 init_mm
.end_code
= (unsigned long) _etext
;
1466 init_mm
.end_data
= (unsigned long) _edata
;
1467 init_mm
.brk
= (unsigned long) _end
;
1470 store_permanent_mappings();
1471 setup_bootmem_allocator();
1474 * NOTE: before this point _nobody_ is allowed to allocate
1475 * any memory using the bootmem allocator.
1478 #ifdef CONFIG_SWIOTLB
1483 setup_numa_mapping();
1493 * Set up per-cpu memory.
1496 unsigned long __per_cpu_offset
[NR_CPUS
] __write_once
;
1497 EXPORT_SYMBOL(__per_cpu_offset
);
1499 static size_t __initdata pfn_offset
[MAX_NUMNODES
] = { 0 };
1500 static unsigned long __initdata percpu_pfn
[NR_CPUS
] = { 0 };
1503 * As the percpu code allocates pages, we return the pages from the
1504 * end of the node for the specified cpu.
1506 static void *__init
pcpu_fc_alloc(unsigned int cpu
, size_t size
, size_t align
)
1508 int nid
= cpu_to_node(cpu
);
1509 unsigned long pfn
= node_percpu_pfn
[nid
] + pfn_offset
[nid
];
1511 BUG_ON(size
% PAGE_SIZE
!= 0);
1512 pfn_offset
[nid
] += size
/ PAGE_SIZE
;
1513 BUG_ON(node_percpu
[nid
] < size
);
1514 node_percpu
[nid
] -= size
;
1515 if (percpu_pfn
[cpu
] == 0)
1516 percpu_pfn
[cpu
] = pfn
;
1517 return pfn_to_kaddr(pfn
);
1521 * Pages reserved for percpu memory are not freeable, and in any case we are
1522 * on a short path to panic() in setup_per_cpu_area() at this point anyway.
1524 static void __init
pcpu_fc_free(void *ptr
, size_t size
)
1529 * Set up vmalloc page tables using bootmem for the percpu code.
1531 static void __init
pcpu_fc_populate_pte(unsigned long addr
)
1538 BUG_ON(pgd_addr_invalid(addr
));
1539 if (addr
< VMALLOC_START
|| addr
>= VMALLOC_END
)
1540 panic("PCPU addr %#lx outside vmalloc range %#lx..%#lx; try increasing CONFIG_VMALLOC_RESERVE\n",
1541 addr
, VMALLOC_START
, VMALLOC_END
);
1543 pgd
= swapper_pg_dir
+ pgd_index(addr
);
1544 pud
= pud_offset(pgd
, addr
);
1545 BUG_ON(!pud_present(*pud
));
1546 pmd
= pmd_offset(pud
, addr
);
1547 if (pmd_present(*pmd
)) {
1548 BUG_ON(pmd_huge_page(*pmd
));
1550 pte
= __alloc_bootmem(L2_KERNEL_PGTABLE_SIZE
,
1551 HV_PAGE_TABLE_ALIGN
, 0);
1552 pmd_populate_kernel(&init_mm
, pmd
, pte
);
1556 void __init
setup_per_cpu_areas(void)
1559 unsigned long delta
, pfn
, lowmem_va
;
1560 unsigned long size
= percpu_size();
1564 rc
= pcpu_page_first_chunk(PERCPU_MODULE_RESERVE
, pcpu_fc_alloc
,
1565 pcpu_fc_free
, pcpu_fc_populate_pte
);
1567 panic("Cannot initialize percpu area (err=%d)", rc
);
1569 delta
= (unsigned long)pcpu_base_addr
- (unsigned long)__per_cpu_start
;
1570 for_each_possible_cpu(cpu
) {
1571 __per_cpu_offset
[cpu
] = delta
+ pcpu_unit_offsets
[cpu
];
1573 /* finv the copy out of cache so we can change homecache */
1574 ptr
= pcpu_base_addr
+ pcpu_unit_offsets
[cpu
];
1575 __finv_buffer(ptr
, size
);
1576 pfn
= percpu_pfn
[cpu
];
1578 /* Rewrite the page tables to cache on that cpu */
1579 pg
= pfn_to_page(pfn
);
1580 for (i
= 0; i
< size
; i
+= PAGE_SIZE
, ++pfn
, ++pg
) {
1582 /* Update the vmalloc mapping and page home. */
1583 unsigned long addr
= (unsigned long)ptr
+ i
;
1584 pte_t
*ptep
= virt_to_kpte(addr
);
1586 BUG_ON(pfn
!= pte_pfn(pte
));
1587 pte
= hv_pte_set_mode(pte
, HV_PTE_MODE_CACHE_TILE_L3
);
1588 pte
= set_remote_cache_cpu(pte
, cpu
);
1589 set_pte_at(&init_mm
, addr
, ptep
, pte
);
1591 /* Update the lowmem mapping for consistency. */
1592 lowmem_va
= (unsigned long)pfn_to_kaddr(pfn
);
1593 ptep
= virt_to_kpte(lowmem_va
);
1594 if (pte_huge(*ptep
)) {
1595 printk(KERN_DEBUG
"early shatter of huge page at %#lx\n",
1597 shatter_pmd((pmd_t
*)ptep
);
1598 ptep
= virt_to_kpte(lowmem_va
);
1599 BUG_ON(pte_huge(*ptep
));
1601 BUG_ON(pfn
!= pte_pfn(*ptep
));
1602 set_pte_at(&init_mm
, lowmem_va
, ptep
, pte
);
1606 /* Set our thread pointer appropriately. */
1607 set_my_cpu_offset(__per_cpu_offset
[smp_processor_id()]);
1609 /* Make sure the finv's have completed. */
1612 /* Flush the TLB so we reference it properly from here on out. */
1613 local_flush_tlb_all();
1616 static struct resource data_resource
= {
1617 .name
= "Kernel data",
1620 .flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
1623 static struct resource code_resource
= {
1624 .name
= "Kernel code",
1627 .flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
1631 * On Pro, we reserve all resources above 4GB so that PCI won't try to put
1632 * mappings above 4GB.
1634 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1635 static struct resource
* __init
1636 insert_non_bus_resource(void)
1638 struct resource
*res
=
1639 kzalloc(sizeof(struct resource
), GFP_ATOMIC
);
1642 res
->name
= "Non-Bus Physical Address Space";
1643 res
->start
= (1ULL << 32);
1645 res
->flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
;
1646 if (insert_resource(&iomem_resource
, res
)) {
1654 static struct resource
* __init
1655 insert_ram_resource(u64 start_pfn
, u64 end_pfn
, bool reserved
)
1657 struct resource
*res
=
1658 kzalloc(sizeof(struct resource
), GFP_ATOMIC
);
1661 res
->name
= reserved
? "Reserved" : "System RAM";
1662 res
->start
= start_pfn
<< PAGE_SHIFT
;
1663 res
->end
= (end_pfn
<< PAGE_SHIFT
) - 1;
1664 res
->flags
= IORESOURCE_BUSY
| IORESOURCE_MEM
;
1665 if (insert_resource(&iomem_resource
, res
)) {
1673 * Request address space for all standard resources
1675 * If the system includes PCI root complex drivers, we need to create
1676 * a window just below 4GB where PCI BARs can be mapped.
1678 static int __init
request_standard_resources(void)
1681 enum { CODE_DELTA
= MEM_SV_START
- PAGE_OFFSET
};
1683 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1684 insert_non_bus_resource();
1687 for_each_online_node(i
) {
1688 u64 start_pfn
= node_start_pfn
[i
];
1689 u64 end_pfn
= node_end_pfn
[i
];
1691 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1692 if (start_pfn
<= pci_reserve_start_pfn
&&
1693 end_pfn
> pci_reserve_start_pfn
) {
1694 if (end_pfn
> pci_reserve_end_pfn
)
1695 insert_ram_resource(pci_reserve_end_pfn
,
1697 end_pfn
= pci_reserve_start_pfn
;
1700 insert_ram_resource(start_pfn
, end_pfn
, 0);
1703 code_resource
.start
= __pa(_text
- CODE_DELTA
);
1704 code_resource
.end
= __pa(_etext
- CODE_DELTA
)-1;
1705 data_resource
.start
= __pa(_sdata
);
1706 data_resource
.end
= __pa(_end
)-1;
1708 insert_resource(&iomem_resource
, &code_resource
);
1709 insert_resource(&iomem_resource
, &data_resource
);
1711 /* Mark any "memmap" regions busy for the resource manager. */
1712 for (i
= 0; i
< memmap_nr
; ++i
) {
1713 struct memmap_entry
*m
= &memmap_map
[i
];
1714 insert_ram_resource(PFN_DOWN(m
->addr
),
1715 PFN_UP(m
->addr
+ m
->size
- 1), 1);
1719 insert_resource(&iomem_resource
, &crashk_res
);
1725 subsys_initcall(request_standard_resources
);