2 * Copyright (C) 1995 Linus Torvalds
3 * Copyright 2010 Tilera Corporation. All Rights Reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation, version 2.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for
16 #include <linux/module.h>
17 #include <linux/signal.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/types.h>
23 #include <linux/ptrace.h>
24 #include <linux/mman.h>
26 #include <linux/hugetlb.h>
27 #include <linux/swap.h>
28 #include <linux/smp.h>
29 #include <linux/init.h>
30 #include <linux/highmem.h>
31 #include <linux/pagemap.h>
32 #include <linux/poison.h>
33 #include <linux/bootmem.h>
34 #include <linux/slab.h>
35 #include <linux/proc_fs.h>
36 #include <linux/efi.h>
37 #include <linux/memory_hotplug.h>
38 #include <linux/uaccess.h>
39 #include <asm/mmu_context.h>
40 #include <asm/processor.h>
41 #include <asm/pgtable.h>
42 #include <asm/pgalloc.h>
44 #include <asm/fixmap.h>
46 #include <asm/tlbflush.h>
47 #include <asm/sections.h>
48 #include <asm/setup.h>
49 #include <asm/homecache.h>
50 #include <hv/hypervisor.h>
51 #include <arch/chip.h>
55 #define clear_pgd(pmdptr) (*(pmdptr) = hv_pte(0))
58 unsigned long VMALLOC_RESERVE
= CONFIG_VMALLOC_RESERVE
;
59 EXPORT_SYMBOL(VMALLOC_RESERVE
);
62 /* Create an L2 page table */
63 static pte_t
* __init
alloc_pte(void)
65 return __alloc_bootmem(L2_KERNEL_PGTABLE_SIZE
, HV_PAGE_TABLE_ALIGN
, 0);
69 * L2 page tables per controller. We allocate these all at once from
70 * the bootmem allocator and store them here. This saves on kernel L2
71 * page table memory, compared to allocating a full 64K page per L2
72 * page table, and also means that in cases where we use huge pages,
73 * we are guaranteed to later be able to shatter those huge pages and
74 * switch to using these page tables instead, without requiring
75 * further allocation. Each l2_ptes[] entry points to the first page
76 * table for the first hugepage-size piece of memory on the
77 * controller; other page tables are just indexed directly, i.e. the
78 * L2 page tables are contiguous in memory for each controller.
80 static pte_t
*l2_ptes
[MAX_NUMNODES
];
81 static int num_l2_ptes
[MAX_NUMNODES
];
83 static void init_prealloc_ptes(int node
, int pages
)
85 BUG_ON(pages
& (PTRS_PER_PTE
- 1));
87 num_l2_ptes
[node
] = pages
;
88 l2_ptes
[node
] = __alloc_bootmem(pages
* sizeof(pte_t
),
89 HV_PAGE_TABLE_ALIGN
, 0);
93 pte_t
*get_prealloc_pte(unsigned long pfn
)
95 int node
= pfn_to_nid(pfn
);
96 pfn
&= ~(-1UL << (NR_PA_HIGHBIT_SHIFT
- PAGE_SHIFT
));
97 BUG_ON(node
>= MAX_NUMNODES
);
98 BUG_ON(pfn
>= num_l2_ptes
[node
]);
99 return &l2_ptes
[node
][pfn
];
103 * What caching do we expect pages from the heap to have when
104 * they are allocated during bootup? (Once we've installed the
105 * "real" swapper_pg_dir.)
107 static int initial_heap_home(void)
110 return PAGE_HOME_HASH
;
111 return smp_processor_id();
115 * Place a pointer to an L2 page table in a middle page
118 static void __init
assign_pte(pmd_t
*pmd
, pte_t
*page_table
)
120 phys_addr_t pa
= __pa(page_table
);
121 unsigned long l2_ptfn
= pa
>> HV_LOG2_PAGE_TABLE_ALIGN
;
122 pte_t pteval
= hv_pte_set_ptfn(__pgprot(_PAGE_TABLE
), l2_ptfn
);
123 BUG_ON((pa
& (HV_PAGE_TABLE_ALIGN
-1)) != 0);
124 pteval
= pte_set_home(pteval
, initial_heap_home());
125 *(pte_t
*)pmd
= pteval
;
126 if (page_table
!= (pte_t
*)pmd_page_vaddr(*pmd
))
132 static inline pmd_t
*alloc_pmd(void)
134 return __alloc_bootmem(L1_KERNEL_PGTABLE_SIZE
, HV_PAGE_TABLE_ALIGN
, 0);
137 static inline void assign_pmd(pud_t
*pud
, pmd_t
*pmd
)
139 assign_pte((pmd_t
*)pud
, (pte_t
*)pmd
);
142 #endif /* __tilegx__ */
144 /* Replace the given pmd with a full PTE table. */
145 void __init
shatter_pmd(pmd_t
*pmd
)
147 pte_t
*pte
= get_prealloc_pte(pte_pfn(*(pte_t
*)pmd
));
148 assign_pte(pmd
, pte
);
152 static pmd_t
*__init
get_pmd(pgd_t pgtables
[], unsigned long va
)
154 pud_t
*pud
= pud_offset(&pgtables
[pgd_index(va
)], va
);
156 assign_pmd(pud
, alloc_pmd());
157 return pmd_offset(pud
, va
);
160 static pmd_t
*__init
get_pmd(pgd_t pgtables
[], unsigned long va
)
162 return pmd_offset(pud_offset(&pgtables
[pgd_index(va
)], va
), va
);
167 * This function initializes a certain range of kernel virtual memory
168 * with new bootmem page tables, everywhere page tables are missing in
173 * NOTE: The pagetables are allocated contiguous on the physical space
174 * so we can cache the place of the first one and move around without
175 * checking the pgd every time.
177 static void __init
page_table_range_init(unsigned long start
,
178 unsigned long end
, pgd_t
*pgd
)
181 start
= round_down(start
, PMD_SIZE
);
182 end
= round_up(end
, PMD_SIZE
);
183 for (vaddr
= start
; vaddr
< end
; vaddr
+= PMD_SIZE
) {
184 pmd_t
*pmd
= get_pmd(pgd
, vaddr
);
186 assign_pte(pmd
, alloc_pte());
191 static int __initdata ktext_hash
= 1; /* .text pages */
192 static int __initdata kdata_hash
= 1; /* .data and .bss pages */
193 int __write_once hash_default
= 1; /* kernel allocator pages */
194 EXPORT_SYMBOL(hash_default
);
195 int __write_once kstack_hash
= 1; /* if no homecaching, use h4h */
198 * CPUs to use to for striping the pages of kernel data. If hash-for-home
199 * is available, this is only relevant if kcache_hash sets up the
200 * .data and .bss to be page-homed, and we don't want the default mode
201 * of using the full set of kernel cpus for the striping.
203 static __initdata
struct cpumask kdata_mask
;
204 static __initdata
int kdata_arg_seen
;
206 int __write_once kdata_huge
; /* if no homecaching, small pages */
209 /* Combine a generic pgprot_t with cache home to get a cache-aware pgprot. */
210 static pgprot_t __init
construct_pgprot(pgprot_t prot
, int home
)
212 prot
= pte_set_home(prot
, home
);
213 if (home
== PAGE_HOME_IMMUTABLE
) {
215 prot
= hv_pte_set_mode(prot
, HV_PTE_MODE_CACHE_HASH_L3
);
217 prot
= hv_pte_set_mode(prot
, HV_PTE_MODE_CACHE_NO_L3
);
223 * For a given kernel data VA, how should it be cached?
224 * We return the complete pgprot_t with caching bits set.
226 static pgprot_t __init
init_pgprot(ulong address
)
230 enum { CODE_DELTA
= MEM_SV_START
- PAGE_OFFSET
};
232 /* For kdata=huge, everything is just hash-for-home. */
234 return construct_pgprot(PAGE_KERNEL
, PAGE_HOME_HASH
);
236 /* We map the aliased pages of permanent text inaccessible. */
237 if (address
< (ulong
) _sinittext
- CODE_DELTA
)
240 /* We map read-only data non-coherent for performance. */
241 if ((address
>= (ulong
) __start_rodata
&&
242 address
< (ulong
) __end_rodata
) ||
243 address
== (ulong
) empty_zero_page
) {
244 return construct_pgprot(PAGE_KERNEL_RO
, PAGE_HOME_IMMUTABLE
);
248 /* Force the atomic_locks[] array page to be hash-for-home. */
249 if (address
== (ulong
) atomic_locks
)
250 return construct_pgprot(PAGE_KERNEL
, PAGE_HOME_HASH
);
254 * Everything else that isn't data or bss is heap, so mark it
255 * with the initial heap home (hash-for-home, or this cpu). This
256 * includes any addresses after the loaded image and any address before
257 * __init_end, since we already captured the case of text before
258 * _sinittext, and __pa(einittext) is approximately __pa(__init_begin).
260 * All the LOWMEM pages that we mark this way will get their
261 * struct page homecache properly marked later, in set_page_homes().
262 * The HIGHMEM pages we leave with a default zero for their
263 * homes, but with a zero free_time we don't have to actually
264 * do a flush action the first time we use them, either.
266 if (address
>= (ulong
) _end
|| address
< (ulong
) __init_end
)
267 return construct_pgprot(PAGE_KERNEL
, initial_heap_home());
269 /* Use hash-for-home if requested for data/bss. */
271 return construct_pgprot(PAGE_KERNEL
, PAGE_HOME_HASH
);
274 * Otherwise we just hand out consecutive cpus. To avoid
275 * requiring this function to hold state, we just walk forward from
276 * __end_rodata by PAGE_SIZE, skipping the readonly and init data, to
277 * reach the requested address, while walking cpu home around
278 * kdata_mask. This is typically no more than a dozen or so iterations.
280 page
= (((ulong
)__end_rodata
) + PAGE_SIZE
- 1) & PAGE_MASK
;
281 BUG_ON(address
< page
|| address
>= (ulong
)_end
);
282 cpu
= cpumask_first(&kdata_mask
);
283 for (; page
< address
; page
+= PAGE_SIZE
) {
284 if (page
>= (ulong
)&init_thread_union
&&
285 page
< (ulong
)&init_thread_union
+ THREAD_SIZE
)
287 if (page
== (ulong
)empty_zero_page
)
290 if (page
== (ulong
)atomic_locks
)
293 cpu
= cpumask_next(cpu
, &kdata_mask
);
295 cpu
= cpumask_first(&kdata_mask
);
297 return construct_pgprot(PAGE_KERNEL
, cpu
);
301 * This function sets up how we cache the kernel text. If we have
302 * hash-for-home support, normally that is used instead (see the
303 * kcache_hash boot flag for more information). But if we end up
304 * using a page-based caching technique, this option sets up the
305 * details of that. In addition, the "ktext=nocache" option may
306 * always be used to disable local caching of text pages, if desired.
309 static int __initdata ktext_arg_seen
;
310 static int __initdata ktext_small
;
311 static int __initdata ktext_local
;
312 static int __initdata ktext_all
;
313 static int __initdata ktext_nondataplane
;
314 static int __initdata ktext_nocache
;
315 static struct cpumask __initdata ktext_mask
;
317 static int __init
setup_ktext(char *str
)
322 /* If you have a leading "nocache", turn off ktext caching */
323 if (strncmp(str
, "nocache", 7) == 0) {
325 pr_info("ktext: disabling local caching of kernel text\n");
335 /* Default setting: use a huge page */
336 if (strcmp(str
, "huge") == 0)
337 pr_info("ktext: using one huge locally cached page\n");
339 /* Pay TLB cost but get no cache benefit: cache small pages locally */
340 else if (strcmp(str
, "local") == 0) {
343 pr_info("ktext: using small pages with local caching\n");
346 /* Neighborhood cache ktext pages on all cpus. */
347 else if (strcmp(str
, "all") == 0) {
350 pr_info("ktext: using maximal caching neighborhood\n");
354 /* Neighborhood ktext pages on specified mask */
355 else if (cpulist_parse(str
, &ktext_mask
) == 0) {
356 char buf
[NR_CPUS
* 5];
357 cpulist_scnprintf(buf
, sizeof(buf
), &ktext_mask
);
358 if (cpumask_weight(&ktext_mask
) > 1) {
360 pr_info("ktext: using caching neighborhood %s with small pages\n",
363 pr_info("ktext: caching on cpu %s with one huge page\n",
374 early_param("ktext", setup_ktext
);
377 static inline pgprot_t
ktext_set_nocache(pgprot_t prot
)
380 prot
= hv_pte_set_nc(prot
);
382 prot
= hv_pte_set_no_alloc_l2(prot
);
386 /* Temporary page table we use for staging. */
387 static pgd_t pgtables
[PTRS_PER_PGD
]
388 __attribute__((aligned(HV_PAGE_TABLE_ALIGN
)));
391 * This maps the physical memory to kernel virtual address space, a total
392 * of max_low_pfn pages, by creating page tables starting from address
395 * This routine transitions us from using a set of compiled-in large
396 * pages to using some more precise caching, including removing access
397 * to code pages mapped at PAGE_OFFSET (executed only at MEM_SV_START)
398 * marking read-only data as locally cacheable, striping the remaining
399 * .data and .bss across all the available tiles, and removing access
400 * to pages above the top of RAM (thus ensuring a page fault from a bad
401 * virtual address rather than a hypervisor shoot down for accessing
402 * memory outside the assigned limits).
404 static void __init
kernel_physical_mapping_init(pgd_t
*pgd_base
)
406 unsigned long long irqmask
;
407 unsigned long address
, pfn
;
411 const struct cpumask
*my_cpu_mask
= cpumask_of(smp_processor_id());
412 struct cpumask kstripe_mask
;
415 if (ktext_arg_seen
&& ktext_hash
) {
416 pr_warn("warning: \"ktext\" boot argument ignored if \"kcache_hash\" sets up text hash-for-home\n");
420 if (kdata_arg_seen
&& kdata_hash
) {
421 pr_warn("warning: \"kdata\" boot argument ignored if \"kcache_hash\" sets up data hash-for-home\n");
424 if (kdata_huge
&& !hash_default
) {
425 pr_warn("warning: disabling \"kdata=huge\"; requires kcache_hash=all or =allbutstack\n");
430 * Set up a mask for cpus to use for kernel striping.
431 * This is normally all cpus, but minus dataplane cpus if any.
432 * If the dataplane covers the whole chip, we stripe over
433 * the whole chip too.
435 cpumask_copy(&kstripe_mask
, cpu_possible_mask
);
437 kdata_mask
= kstripe_mask
;
439 /* Allocate and fill in L2 page tables */
440 for (i
= 0; i
< MAX_NUMNODES
; ++i
) {
441 #ifdef CONFIG_HIGHMEM
442 unsigned long end_pfn
= node_lowmem_end_pfn
[i
];
444 unsigned long end_pfn
= node_end_pfn
[i
];
446 unsigned long end_huge_pfn
= 0;
448 /* Pre-shatter the last huge page to allow per-cpu pages. */
450 end_huge_pfn
= end_pfn
- (HPAGE_SIZE
>> PAGE_SHIFT
);
452 pfn
= node_start_pfn
[i
];
454 /* Allocate enough memory to hold L2 page tables for node. */
455 init_prealloc_ptes(i
, end_pfn
- pfn
);
457 address
= (unsigned long) pfn_to_kaddr(pfn
);
458 while (pfn
< end_pfn
) {
459 BUG_ON(address
& (HPAGE_SIZE
-1));
460 pmd
= get_pmd(pgtables
, address
);
461 pte
= get_prealloc_pte(pfn
);
462 if (pfn
< end_huge_pfn
) {
463 pgprot_t prot
= init_pgprot(address
);
464 *(pte_t
*)pmd
= pte_mkhuge(pfn_pte(pfn
, prot
));
465 for (pte_ofs
= 0; pte_ofs
< PTRS_PER_PTE
;
466 pfn
++, pte_ofs
++, address
+= PAGE_SIZE
)
467 pte
[pte_ofs
] = pfn_pte(pfn
, prot
);
470 printk(KERN_DEBUG
"pre-shattered huge page at %#lx\n",
472 for (pte_ofs
= 0; pte_ofs
< PTRS_PER_PTE
;
473 pfn
++, pte_ofs
++, address
+= PAGE_SIZE
) {
474 pgprot_t prot
= init_pgprot(address
);
475 pte
[pte_ofs
] = pfn_pte(pfn
, prot
);
477 assign_pte(pmd
, pte
);
483 * Set or check ktext_map now that we have cpu_possible_mask
484 * and kstripe_mask to work with.
487 cpumask_copy(&ktext_mask
, cpu_possible_mask
);
488 else if (ktext_nondataplane
)
489 ktext_mask
= kstripe_mask
;
490 else if (!cpumask_empty(&ktext_mask
)) {
491 /* Sanity-check any mask that was requested */
493 cpumask_andnot(&bad
, &ktext_mask
, cpu_possible_mask
);
494 cpumask_and(&ktext_mask
, &ktext_mask
, cpu_possible_mask
);
495 if (!cpumask_empty(&bad
)) {
496 char buf
[NR_CPUS
* 5];
497 cpulist_scnprintf(buf
, sizeof(buf
), &bad
);
498 pr_info("ktext: not using unavailable cpus %s\n", buf
);
500 if (cpumask_empty(&ktext_mask
)) {
501 pr_warn("ktext: no valid cpus; caching on %d\n",
503 cpumask_copy(&ktext_mask
,
504 cpumask_of(smp_processor_id()));
508 address
= MEM_SV_START
;
509 pmd
= get_pmd(pgtables
, address
);
510 pfn
= 0; /* code starts at PA 0 */
512 /* Allocate an L2 PTE for the kernel text */
514 pgprot_t prot
= construct_pgprot(PAGE_KERNEL_EXEC
,
515 PAGE_HOME_IMMUTABLE
);
519 prot
= hv_pte_set_mode(prot
,
520 HV_PTE_MODE_UNCACHED
);
522 prot
= hv_pte_set_mode(prot
,
523 HV_PTE_MODE_CACHE_NO_L3
);
525 prot
= hv_pte_set_mode(prot
,
526 HV_PTE_MODE_CACHE_TILE_L3
);
527 cpu
= cpumask_first(&ktext_mask
);
529 prot
= ktext_set_nocache(prot
);
532 BUG_ON(address
!= (unsigned long)_text
);
534 for (; address
< (unsigned long)_einittext
;
535 pfn
++, address
+= PAGE_SIZE
) {
536 pte_ofs
= pte_index(address
);
539 assign_pte(pmd
++, pte
);
543 prot
= set_remote_cache_cpu(prot
, cpu
);
544 cpu
= cpumask_next(cpu
, &ktext_mask
);
546 cpu
= cpumask_first(&ktext_mask
);
548 pte
[pte_ofs
] = pfn_pte(pfn
, prot
);
551 assign_pte(pmd
, pte
);
553 pte_t pteval
= pfn_pte(0, PAGE_KERNEL_EXEC
);
554 pteval
= pte_mkhuge(pteval
);
556 pteval
= hv_pte_set_mode(pteval
,
557 HV_PTE_MODE_CACHE_HASH_L3
);
558 pteval
= ktext_set_nocache(pteval
);
560 if (cpumask_weight(&ktext_mask
) == 1) {
561 pteval
= set_remote_cache_cpu(pteval
,
562 cpumask_first(&ktext_mask
));
563 pteval
= hv_pte_set_mode(pteval
,
564 HV_PTE_MODE_CACHE_TILE_L3
);
565 pteval
= ktext_set_nocache(pteval
);
566 } else if (ktext_nocache
)
567 pteval
= hv_pte_set_mode(pteval
,
568 HV_PTE_MODE_UNCACHED
);
570 pteval
= hv_pte_set_mode(pteval
,
571 HV_PTE_MODE_CACHE_NO_L3
);
572 for (; address
< (unsigned long)_einittext
;
573 pfn
+= PFN_DOWN(HPAGE_SIZE
), address
+= HPAGE_SIZE
)
574 *(pte_t
*)(pmd
++) = pfn_pte(pfn
, pteval
);
577 /* Set swapper_pgprot here so it is flushed to memory right away. */
578 swapper_pgprot
= init_pgprot((unsigned long)swapper_pg_dir
);
581 * Since we may be changing the caching of the stack and page
582 * table itself, we invoke an assembly helper to do the
585 * - flush the cache so we start with an empty slate
586 * - install pgtables[] as the real page table
587 * - flush the TLB so the new page table takes effect
589 irqmask
= interrupt_mask_save_mask();
590 interrupt_mask_set_mask(-1ULL);
591 rc
= flush_and_install_context(__pa(pgtables
),
592 init_pgprot((unsigned long)pgtables
),
593 __this_cpu_read(current_asid
),
594 cpumask_bits(my_cpu_mask
));
595 interrupt_mask_restore_mask(irqmask
);
598 /* Copy the page table back to the normal swapper_pg_dir. */
599 memcpy(pgd_base
, pgtables
, sizeof(pgtables
));
600 __install_page_table(pgd_base
, __this_cpu_read(current_asid
),
604 * We just read swapper_pgprot and thus brought it into the cache,
605 * with its new home & caching mode. When we start the other CPUs,
606 * they're going to reference swapper_pgprot via their initial fake
607 * VA-is-PA mappings, which cache everything locally. At that
608 * time, if it's in our cache with a conflicting home, the
609 * simulator's coherence checker will complain. So, flush it out
610 * of our cache; we're not going to ever use it again anyway.
612 __insn_finv(&swapper_pgprot
);
616 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
617 * is valid. The argument is a physical page number.
619 * On Tile, the only valid things for which we can just hand out unchecked
620 * PTEs are the kernel code and data. Anything else might change its
621 * homing with time, and we wouldn't know to adjust the /dev/mem PTEs.
622 * Note that init_thread_union is released to heap soon after boot,
623 * so we include it in the init data.
625 * For TILE-Gx, we might want to consider allowing access to PA
626 * regions corresponding to PCI space, etc.
628 int devmem_is_allowed(unsigned long pagenr
)
630 return pagenr
< kaddr_to_pfn(_end
) &&
631 !(pagenr
>= kaddr_to_pfn(&init_thread_union
) ||
632 pagenr
< kaddr_to_pfn(__init_end
)) &&
633 !(pagenr
>= kaddr_to_pfn(_sinittext
) ||
634 pagenr
<= kaddr_to_pfn(_einittext
-1));
637 #ifdef CONFIG_HIGHMEM
638 static void __init
permanent_kmaps_init(pgd_t
*pgd_base
)
647 page_table_range_init(vaddr
, vaddr
+ PAGE_SIZE
*LAST_PKMAP
, pgd_base
);
649 pgd
= swapper_pg_dir
+ pgd_index(vaddr
);
650 pud
= pud_offset(pgd
, vaddr
);
651 pmd
= pmd_offset(pud
, vaddr
);
652 pte
= pte_offset_kernel(pmd
, vaddr
);
653 pkmap_page_table
= pte
;
655 #endif /* CONFIG_HIGHMEM */
659 static void __init
init_free_pfn_range(unsigned long start
, unsigned long end
)
662 struct page
*page
= pfn_to_page(start
);
664 for (pfn
= start
; pfn
< end
; ) {
665 /* Optimize by freeing pages in large batches */
666 int order
= __ffs(pfn
);
670 if (order
>= MAX_ORDER
)
673 while (pfn
+ count
> end
) {
677 for (p
= page
, i
= 0; i
< count
; ++i
, ++p
) {
678 __ClearPageReserved(p
);
680 * Hacky direct set to avoid unnecessary
681 * lock take/release for EVERY page here.
683 p
->_count
.counter
= 0;
684 p
->_mapcount
.counter
= -1;
686 init_page_count(page
);
687 __free_pages(page
, order
);
688 adjust_managed_page_count(page
, count
);
695 static void __init
set_non_bootmem_pages_init(void)
699 unsigned long start
, end
;
700 int nid
= z
->zone_pgdat
->node_id
;
701 #ifdef CONFIG_HIGHMEM
702 int idx
= zone_idx(z
);
705 start
= z
->zone_start_pfn
;
706 end
= start
+ z
->spanned_pages
;
707 start
= max(start
, node_free_pfn
[nid
]);
708 start
= max(start
, max_low_pfn
);
710 #ifdef CONFIG_HIGHMEM
711 if (idx
== ZONE_HIGHMEM
)
712 totalhigh_pages
+= z
->spanned_pages
;
715 unsigned long percpu_pfn
= node_percpu_pfn
[nid
];
716 if (start
< percpu_pfn
&& end
> percpu_pfn
)
720 if (start
<= pci_reserve_start_pfn
&&
721 end
> pci_reserve_start_pfn
) {
722 if (end
> pci_reserve_end_pfn
)
723 init_free_pfn_range(pci_reserve_end_pfn
, end
);
724 end
= pci_reserve_start_pfn
;
727 init_free_pfn_range(start
, end
);
733 * paging_init() sets up the page tables - note that all of lowmem is
734 * already mapped by head.S.
736 void __init
paging_init(void)
741 pgd_t
*pgd_base
= swapper_pg_dir
;
743 kernel_physical_mapping_init(pgd_base
);
745 /* Fixed mappings, only the page table structure has to be created. */
746 page_table_range_init(fix_to_virt(__end_of_fixed_addresses
- 1),
747 FIXADDR_TOP
, pgd_base
);
749 #ifdef CONFIG_HIGHMEM
750 permanent_kmaps_init(pgd_base
);
755 * Since GX allocates just one pmd_t array worth of vmalloc space,
756 * we go ahead and allocate it statically here, then share it
757 * globally. As a result we don't have to worry about any task
758 * changing init_mm once we get up and running, and there's no
759 * need for e.g. vmalloc_sync_all().
761 BUILD_BUG_ON(pgd_index(VMALLOC_START
) != pgd_index(VMALLOC_END
- 1));
762 pud
= pud_offset(pgd_base
+ pgd_index(VMALLOC_START
), VMALLOC_START
);
763 assign_pmd(pud
, alloc_pmd());
769 * Walk the kernel page tables and derive the page_home() from
770 * the PTEs, so that set_pte() can properly validate the caching
771 * of all PTEs it sees.
773 void __init
set_page_homes(void)
777 static void __init
set_max_mapnr_init(void)
779 #ifdef CONFIG_FLATMEM
780 max_mapnr
= max_low_pfn
;
784 void __init
mem_init(void)
791 #ifdef CONFIG_FLATMEM
795 #ifdef CONFIG_HIGHMEM
796 /* check that fixmap and pkmap do not overlap */
797 if (PKMAP_ADDR(LAST_PKMAP
-1) >= FIXADDR_START
) {
798 pr_err("fixmap and kmap areas overlap - this will crash\n");
799 pr_err("pkstart: %lxh pkend: %lxh fixstart %lxh\n",
800 PKMAP_BASE
, PKMAP_ADDR(LAST_PKMAP
-1), FIXADDR_START
);
805 set_max_mapnr_init();
807 /* this will put all bootmem onto the freelists */
811 /* count all remaining LOWMEM and give all HIGHMEM to page allocator */
812 set_non_bootmem_pages_init();
815 mem_init_print_info(NULL
);
818 * In debug mode, dump some interesting memory mappings.
820 #ifdef CONFIG_HIGHMEM
821 printk(KERN_DEBUG
" KMAP %#lx - %#lx\n",
822 FIXADDR_START
, FIXADDR_TOP
+ PAGE_SIZE
- 1);
823 printk(KERN_DEBUG
" PKMAP %#lx - %#lx\n",
824 PKMAP_BASE
, PKMAP_ADDR(LAST_PKMAP
) - 1);
826 printk(KERN_DEBUG
" VMALLOC %#lx - %#lx\n",
827 _VMALLOC_START
, _VMALLOC_END
- 1);
829 for (i
= MAX_NUMNODES
-1; i
>= 0; --i
) {
830 struct pglist_data
*node
= &node_data
[i
];
831 if (node
->node_present_pages
) {
832 unsigned long start
= (unsigned long)
833 pfn_to_kaddr(node
->node_start_pfn
);
834 unsigned long end
= start
+
835 (node
->node_present_pages
<< PAGE_SHIFT
);
836 printk(KERN_DEBUG
" MEM%d %#lx - %#lx\n",
842 for (i
= MAX_NUMNODES
-1; i
>= 0; --i
) {
843 if ((unsigned long)vbase_map
[i
] != -1UL) {
844 printk(KERN_DEBUG
" LOWMEM%d %#lx - %#lx\n",
845 i
, (unsigned long) (vbase_map
[i
]),
846 (unsigned long) (last
-1));
854 * Convert from using one lock for all atomic operations to
857 __init_atomic_per_cpu();
862 * this is for the non-NUMA, single node SMP system case.
863 * Specifically, in the case of x86, we will always add
864 * memory to the highmem for now.
866 #ifndef CONFIG_NEED_MULTIPLE_NODES
867 int arch_add_memory(u64 start
, u64 size
)
869 struct pglist_data
*pgdata
= &contig_page_data
;
870 struct zone
*zone
= pgdata
->node_zones
+ MAX_NR_ZONES
-1;
871 unsigned long start_pfn
= start
>> PAGE_SHIFT
;
872 unsigned long nr_pages
= size
>> PAGE_SHIFT
;
874 return __add_pages(zone
, start_pfn
, nr_pages
);
877 int remove_memory(u64 start
, u64 size
)
882 #ifdef CONFIG_MEMORY_HOTREMOVE
883 int arch_remove_memory(u64 start
, u64 size
)
891 struct kmem_cache
*pgd_cache
;
893 void __init
pgtable_cache_init(void)
895 pgd_cache
= kmem_cache_create("pgd", SIZEOF_PGD
, SIZEOF_PGD
, 0, NULL
);
897 panic("pgtable_cache_init(): Cannot create pgd cache");
900 #ifdef CONFIG_DEBUG_PAGEALLOC
901 static long __write_once initfree
;
903 static long __write_once initfree
= 1;
906 /* Select whether to free (1) or mark unusable (0) the __init pages. */
907 static int __init
set_initfree(char *str
)
910 if (kstrtol(str
, 0, &val
) == 0) {
912 pr_info("initfree: %s free init pages\n",
913 initfree
? "will" : "won't");
917 __setup("initfree=", set_initfree
);
919 static void free_init_pages(char *what
, unsigned long begin
, unsigned long end
)
921 unsigned long addr
= (unsigned long) begin
;
923 if (kdata_huge
&& !initfree
) {
924 pr_warn("Warning: ignoring initfree=0: incompatible with kdata=huge\n");
927 end
= (end
+ PAGE_SIZE
- 1) & PAGE_MASK
;
928 local_flush_tlb_pages(NULL
, begin
, PAGE_SIZE
, end
- begin
);
929 for (addr
= begin
; addr
< end
; addr
+= PAGE_SIZE
) {
931 * Note we just reset the home here directly in the
932 * page table. We know this is safe because our caller
933 * just flushed the caches on all the other cpus,
934 * and they won't be touching any of these pages.
936 int pfn
= kaddr_to_pfn((void *)addr
);
937 struct page
*page
= pfn_to_page(pfn
);
938 pte_t
*ptep
= virt_to_kpte(addr
);
941 * If debugging page accesses then do not free
942 * this memory but mark them not present - any
943 * buggy init-section access will create a
946 pte_clear(&init_mm
, addr
, ptep
);
952 set_pte_at(&init_mm
, addr
, ptep
,
953 pfn_pte(pfn
, PAGE_KERNEL
));
954 memset((void *)addr
, POISON_FREE_INITMEM
, PAGE_SIZE
);
955 free_reserved_page(page
);
957 pr_info("Freeing %s: %ldk freed\n", what
, (end
- begin
) >> 10);
960 void free_initmem(void)
962 const unsigned long text_delta
= MEM_SV_START
- PAGE_OFFSET
;
965 * Evict the cache on all cores to avoid incoherence.
966 * We are guaranteed that no one will touch the init pages any more.
968 homecache_evict(&cpu_cacheable_map
);
970 /* Free the data pages that we won't use again after init. */
971 free_init_pages("unused kernel data",
972 (unsigned long)__init_begin
,
973 (unsigned long)__init_end
);
976 * Free the pages mapped from 0xc0000000 that correspond to code
977 * pages from MEM_SV_START that we won't use again after init.
979 free_init_pages("unused kernel text",
980 (unsigned long)_sinittext
- text_delta
,
981 (unsigned long)_einittext
- text_delta
);
982 /* Do a global TLB flush so everyone sees the changes. */