arch/x86/include/asm/fpu/xstate.h

   1 #ifndef __ASM_X86_XSAVE_H
   2 #define __ASM_X86_XSAVE_H
   3
   4 #include <linux/types.h>
   5 #include <asm/processor.h>
   6 #include <linux/uaccess.h>
   7
   8 /* Bit 63 of XCR0 is reserved for future expansion */
   9 #define XFEATURE_MASK_EXTEND    (~(XFEATURE_MASK_FPSSE | (1ULL << 63)))
  10
  11 #define XSTATE_CPUID            0x0000000d
  12
  13 #define FXSAVE_SIZE     512
  14
  15 #define XSAVE_HDR_SIZE      64
  16 #define XSAVE_HDR_OFFSET    FXSAVE_SIZE
  17
  18 #define XSAVE_YMM_SIZE      256
  19 #define XSAVE_YMM_OFFSET    (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
  20
  21 /* Supported features which support lazy state saving */
  22 #define XFEATURE_MASK_LAZY      (XFEATURE_MASK_FP | \
  23                                  XFEATURE_MASK_SSE | \
  24                                  XFEATURE_MASK_YMM | \
  25                                  XFEATURE_MASK_OPMASK | \
  26                                  XFEATURE_MASK_ZMM_Hi256 | \
  27                                  XFEATURE_MASK_Hi16_ZMM  | \
  28                                  XFEATURE_MASK_PKRU)
  29
  30 /* Supported features which require eager state saving */
  31 #define XFEATURE_MASK_EAGER     (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)
  32
  33 /* All currently supported features */
  34 #define XCNTXT_MASK     (XFEATURE_MASK_LAZY | XFEATURE_MASK_EAGER)
  35
  36 #ifdef CONFIG_X86_64
  37 #define REX_PREFIX      "0x48, "
  38 #else
  39 #define REX_PREFIX
  40 #endif
  41
  42 extern unsigned int xstate_size;
  43 extern u64 xfeatures_mask;
  44 extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
  45
  46 extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
  47
  48 void fpu__xstate_clear_all_cpu_caps(void);
  49 void *get_xsave_addr(struct xregs_state *xsave, int xstate);
  50 const void *get_xsave_field_ptr(int xstate_field);
  51
  52 #endif