2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef _FPU_INTERNAL_H
11 #define _FPU_INTERNAL_H
13 #include <linux/kernel_stat.h>
14 #include <linux/regset.h>
15 #include <linux/compat.h>
16 #include <linux/slab.h>
18 #include <asm/cpufeature.h>
19 #include <asm/processor.h>
20 #include <asm/sigcontext.h>
22 #include <asm/uaccess.h>
23 #include <asm/xsave.h>
26 # include <asm/sigcontext32.h>
27 # include <asm/user32.h>
28 int ia32_setup_rt_frame(int sig
, struct k_sigaction
*ka
, siginfo_t
*info
,
29 compat_sigset_t
*set
, struct pt_regs
*regs
);
30 int ia32_setup_frame(int sig
, struct k_sigaction
*ka
,
31 compat_sigset_t
*set
, struct pt_regs
*regs
);
33 # define user_i387_ia32_struct user_i387_struct
34 # define user32_fxsr_struct user_fxsr_struct
35 # define ia32_setup_frame __setup_frame
36 # define ia32_setup_rt_frame __setup_rt_frame
39 extern unsigned int mxcsr_feature_mask
;
40 extern void fpu_init(void);
42 DECLARE_PER_CPU(struct task_struct
*, fpu_owner_task
);
44 extern void convert_from_fxsr(struct user_i387_ia32_struct
*env
,
45 struct task_struct
*tsk
);
46 extern void convert_to_fxsr(struct task_struct
*tsk
,
47 const struct user_i387_ia32_struct
*env
);
49 extern user_regset_active_fn fpregs_active
, xfpregs_active
;
50 extern user_regset_get_fn fpregs_get
, xfpregs_get
, fpregs_soft_get
,
52 extern user_regset_set_fn fpregs_set
, xfpregs_set
, fpregs_soft_set
,
56 * xstateregs_active == fpregs_active. Please refer to the comment
57 * at the definition of fpregs_active.
59 #define xstateregs_active fpregs_active
61 #ifdef CONFIG_MATH_EMULATION
62 # define HAVE_HWFP (boot_cpu_data.hard_math)
63 extern void finit_soft_fpu(struct i387_soft_struct
*soft
);
66 static inline void finit_soft_fpu(struct i387_soft_struct
*soft
) {}
69 static inline int is_ia32_compat_frame(void)
71 return config_enabled(CONFIG_IA32_EMULATION
) &&
72 test_thread_flag(TIF_IA32
);
75 static inline int is_ia32_frame(void)
77 return config_enabled(CONFIG_X86_32
) || is_ia32_compat_frame();
80 static inline int is_x32_frame(void)
82 return config_enabled(CONFIG_X86_X32_ABI
) && test_thread_flag(TIF_X32
);
85 #define X87_FSW_ES (1 << 7) /* Exception Summary */
87 static __always_inline __pure
bool use_xsaveopt(void)
89 return static_cpu_has(X86_FEATURE_XSAVEOPT
);
92 static __always_inline __pure
bool use_xsave(void)
94 return static_cpu_has(X86_FEATURE_XSAVE
);
97 static __always_inline __pure
bool use_fxsr(void)
99 return static_cpu_has(X86_FEATURE_FXSR
);
102 extern void __sanitize_i387_state(struct task_struct
*);
104 static inline void sanitize_i387_state(struct task_struct
*tsk
)
108 __sanitize_i387_state(tsk
);
111 #define check_insn(insn, output, input...) \
114 asm volatile("1:" #insn "\n\t" \
116 ".section .fixup,\"ax\"\n" \
117 "3: movl $-1,%[err]\n" \
120 _ASM_EXTABLE(1b, 3b) \
121 : [err] "=r" (err), output \
126 static inline int fsave_user(struct i387_fsave_struct __user
*fx
)
128 return check_insn(fnsave
%[fx
]; fwait
, [fx
] "=m" (*fx
), "m" (*fx
));
131 static inline int fxsave_user(struct i387_fxsave_struct __user
*fx
)
133 if (config_enabled(CONFIG_X86_32
))
134 return check_insn(fxsave
%[fx
], [fx
] "=m" (*fx
), "m" (*fx
));
135 else if (config_enabled(CONFIG_AS_FXSAVEQ
))
136 return check_insn(fxsaveq
%[fx
], [fx
] "=m" (*fx
), "m" (*fx
));
138 /* See comment in fpu_fxsave() below. */
139 return check_insn(rex64
/fxsave (%[fx
]), "=m" (*fx
), [fx
] "R" (fx
));
142 static inline int fxrstor_checking(struct i387_fxsave_struct
*fx
)
144 if (config_enabled(CONFIG_X86_32
))
145 return check_insn(fxrstor
%[fx
], "=m" (*fx
), [fx
] "m" (*fx
));
146 else if (config_enabled(CONFIG_AS_FXSAVEQ
))
147 return check_insn(fxrstorq
%[fx
], "=m" (*fx
), [fx
] "m" (*fx
));
149 /* See comment in fpu_fxsave() below. */
150 return check_insn(rex64
/fxrstor (%[fx
]), "=m" (*fx
), [fx
] "R" (fx
),
154 static inline int frstor_checking(struct i387_fsave_struct
*fx
)
156 return check_insn(frstor
%[fx
], "=m" (*fx
), [fx
] "m" (*fx
));
159 static inline void fpu_fxsave(struct fpu
*fpu
)
161 if (config_enabled(CONFIG_X86_32
))
162 asm volatile( "fxsave %[fx]" : [fx
] "=m" (fpu
->state
->fxsave
));
163 else if (config_enabled(CONFIG_AS_FXSAVEQ
))
164 asm volatile("fxsaveq %0" : "=m" (fpu
->state
->fxsave
));
166 /* Using "rex64; fxsave %0" is broken because, if the memory
167 * operand uses any extended registers for addressing, a second
168 * REX prefix will be generated (to the assembler, rex64
169 * followed by semicolon is a separate instruction), and hence
170 * the 64-bitness is lost.
172 * Using "fxsaveq %0" would be the ideal choice, but is only
173 * supported starting with gas 2.16.
175 * Using, as a workaround, the properly prefixed form below
176 * isn't accepted by any binutils version so far released,
177 * complaining that the same type of prefix is used twice if
178 * an extended register is needed for addressing (fix submitted
179 * to mainline 2005-11-21).
181 * asm volatile("rex64/fxsave %0" : "=m" (fpu->state->fxsave));
183 * This, however, we can work around by forcing the compiler to
184 * select an addressing mode that doesn't require extended
187 asm volatile( "rex64/fxsave (%[fx])"
188 : "=m" (fpu
->state
->fxsave
)
189 : [fx
] "R" (&fpu
->state
->fxsave
));
194 * These must be called with preempt disabled. Returns
195 * 'true' if the FPU state is still intact.
197 static inline int fpu_save_init(struct fpu
*fpu
)
203 * xsave header may indicate the init state of the FP.
205 if (!(fpu
->state
->xsave
.xsave_hdr
.xstate_bv
& XSTATE_FP
))
207 } else if (use_fxsr()) {
210 asm volatile("fnsave %[fx]; fwait"
211 : [fx
] "=m" (fpu
->state
->fsave
));
216 * If exceptions are pending, we need to clear them so
217 * that we don't randomly get exceptions later.
219 * FIXME! Is this perhaps only true for the old-style
220 * irq13 case? Maybe we could leave the x87 state
223 if (unlikely(fpu
->state
->fxsave
.swd
& X87_FSW_ES
)) {
224 asm volatile("fnclex");
230 static inline int __save_init_fpu(struct task_struct
*tsk
)
232 return fpu_save_init(&tsk
->thread
.fpu
);
235 static inline int fpu_restore_checking(struct fpu
*fpu
)
238 return fpu_xrstor_checking(&fpu
->state
->xsave
);
240 return fxrstor_checking(&fpu
->state
->fxsave
);
242 return frstor_checking(&fpu
->state
->fsave
);
245 static inline int restore_fpu_checking(struct task_struct
*tsk
)
247 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
248 is pending. Clear the x87 state here by setting it to fixed
249 values. "m" is a random variable that should be in L1 */
252 "emms\n\t" /* clear stack tags */
253 "fildl %P[addr]", /* set F?P to defined value */
254 X86_FEATURE_FXSAVE_LEAK
,
255 [addr
] "m" (tsk
->thread
.fpu
.has_fpu
));
257 return fpu_restore_checking(&tsk
->thread
.fpu
);
261 * Software FPU state helpers. Careful: these need to
262 * be preemption protection *and* they need to be
263 * properly paired with the CR0.TS changes!
265 static inline int __thread_has_fpu(struct task_struct
*tsk
)
267 return tsk
->thread
.fpu
.has_fpu
;
270 /* Must be paired with an 'stts' after! */
271 static inline void __thread_clear_has_fpu(struct task_struct
*tsk
)
273 tsk
->thread
.fpu
.has_fpu
= 0;
274 this_cpu_write(fpu_owner_task
, NULL
);
277 /* Must be paired with a 'clts' before! */
278 static inline void __thread_set_has_fpu(struct task_struct
*tsk
)
280 tsk
->thread
.fpu
.has_fpu
= 1;
281 this_cpu_write(fpu_owner_task
, tsk
);
285 * Encapsulate the CR0.TS handling together with the
288 * These generally need preemption protection to work,
289 * do try to avoid using these on their own.
291 static inline void __thread_fpu_end(struct task_struct
*tsk
)
293 __thread_clear_has_fpu(tsk
);
298 static inline void __thread_fpu_begin(struct task_struct
*tsk
)
302 __thread_set_has_fpu(tsk
);
305 static inline void __drop_fpu(struct task_struct
*tsk
)
307 if (__thread_has_fpu(tsk
)) {
308 /* Ignore delayed exceptions from user space */
309 asm volatile("1: fwait\n"
311 _ASM_EXTABLE(1b
, 2b
));
312 __thread_fpu_end(tsk
);
316 static inline void drop_fpu(struct task_struct
*tsk
)
319 * Forget coprocessor state..
322 tsk
->fpu_counter
= 0;
328 static inline void drop_init_fpu(struct task_struct
*tsk
)
333 xrstor_state(init_xstate_buf
, -1);
337 * FPU state switching for scheduling.
339 * This is a two-stage process:
341 * - switch_fpu_prepare() saves the old state and
342 * sets the new state of the CR0.TS bit. This is
343 * done within the context of the old process.
345 * - switch_fpu_finish() restores the new state as
348 typedef struct { int preload
; } fpu_switch_t
;
351 * FIXME! We could do a totally lazy restore, but we need to
352 * add a per-cpu "this was the task that last touched the FPU
353 * on this CPU" variable, and the task needs to have a "I last
354 * touched the FPU on this CPU" and check them.
356 * We don't do that yet, so "fpu_lazy_restore()" always returns
357 * false, but some day..
359 static inline int fpu_lazy_restore(struct task_struct
*new, unsigned int cpu
)
361 return new == this_cpu_read_stable(fpu_owner_task
) &&
362 cpu
== new->thread
.fpu
.last_cpu
;
365 static inline fpu_switch_t
switch_fpu_prepare(struct task_struct
*old
, struct task_struct
*new, int cpu
)
370 * If the task has used the math, pre-load the FPU on xsave processors
371 * or if the past 5 consecutive context-switches used math.
373 fpu
.preload
= tsk_used_math(new) && (use_xsave() ||
374 new->fpu_counter
> 5);
375 if (__thread_has_fpu(old
)) {
376 if (!__save_init_fpu(old
))
378 old
->thread
.fpu
.last_cpu
= cpu
;
379 old
->thread
.fpu
.has_fpu
= 0; /* But leave fpu_owner_task! */
381 /* Don't change CR0.TS if we just switch! */
384 __thread_set_has_fpu(new);
385 prefetch(new->thread
.fpu
.state
);
386 } else if (!use_xsave())
389 old
->fpu_counter
= 0;
390 old
->thread
.fpu
.last_cpu
= ~0;
393 if (!use_xsave() && fpu_lazy_restore(new, cpu
))
396 prefetch(new->thread
.fpu
.state
);
397 __thread_fpu_begin(new);
404 * By the time this gets called, we've already cleared CR0.TS and
405 * given the process the FPU if we are going to preload the FPU
406 * state - all we need to do is to conditionally restore the register
409 static inline void switch_fpu_finish(struct task_struct
*new, fpu_switch_t fpu
)
412 if (unlikely(restore_fpu_checking(new)))
418 * Signal frame handlers...
420 extern int save_xstate_sig(void __user
*buf
, void __user
*fx
, int size
);
421 extern int __restore_xstate_sig(void __user
*buf
, void __user
*fx
, int size
);
423 static inline int xstate_sigframe_size(void)
425 return use_xsave() ? xstate_size
+ FP_XSTATE_MAGIC2_SIZE
: xstate_size
;
428 static inline int restore_xstate_sig(void __user
*buf
, int ia32_frame
)
430 void __user
*buf_fx
= buf
;
431 int size
= xstate_sigframe_size();
433 if (ia32_frame
&& use_fxsr()) {
434 buf_fx
= buf
+ sizeof(struct i387_fsave_struct
);
435 size
+= sizeof(struct i387_fsave_struct
);
438 return __restore_xstate_sig(buf
, buf_fx
, size
);
442 * Need to be preemption-safe.
444 * NOTE! user_fpu_begin() must be used only immediately before restoring
445 * it. This function does not do any save/restore on their own.
447 static inline void user_fpu_begin(void)
451 __thread_fpu_begin(current
);
456 * These disable preemption on their own and are safe
458 static inline void save_init_fpu(struct task_struct
*tsk
)
460 WARN_ON_ONCE(!__thread_has_fpu(tsk
));
463 xsave_state(&tsk
->thread
.fpu
.state
->xsave
, -1);
468 __save_init_fpu(tsk
);
469 __thread_fpu_end(tsk
);
474 * i387 state interaction
476 static inline unsigned short get_fpu_cwd(struct task_struct
*tsk
)
479 return tsk
->thread
.fpu
.state
->fxsave
.cwd
;
481 return (unsigned short)tsk
->thread
.fpu
.state
->fsave
.cwd
;
485 static inline unsigned short get_fpu_swd(struct task_struct
*tsk
)
488 return tsk
->thread
.fpu
.state
->fxsave
.swd
;
490 return (unsigned short)tsk
->thread
.fpu
.state
->fsave
.swd
;
494 static inline unsigned short get_fpu_mxcsr(struct task_struct
*tsk
)
497 return tsk
->thread
.fpu
.state
->fxsave
.mxcsr
;
499 return MXCSR_DEFAULT
;
503 static bool fpu_allocated(struct fpu
*fpu
)
505 return fpu
->state
!= NULL
;
508 static inline int fpu_alloc(struct fpu
*fpu
)
510 if (fpu_allocated(fpu
))
512 fpu
->state
= kmem_cache_alloc(task_xstate_cachep
, GFP_KERNEL
);
515 WARN_ON((unsigned long)fpu
->state
& 15);
519 static inline void fpu_free(struct fpu
*fpu
)
522 kmem_cache_free(task_xstate_cachep
, fpu
->state
);
527 static inline void fpu_copy(struct task_struct
*dst
, struct task_struct
*src
)
530 struct xsave_struct
*xsave
= &dst
->thread
.fpu
.state
->xsave
;
532 memset(&xsave
->xsave_hdr
, 0, sizeof(struct xsave_hdr_struct
));
533 xsave_state(xsave
, -1);
535 struct fpu
*dfpu
= &dst
->thread
.fpu
;
536 struct fpu
*sfpu
= &src
->thread
.fpu
;
539 memcpy(dfpu
->state
, sfpu
->state
, xstate_size
);
543 static inline unsigned long
544 alloc_mathframe(unsigned long sp
, int ia32_frame
, unsigned long *buf_fx
,
547 unsigned long frame_size
= xstate_sigframe_size();
549 *buf_fx
= sp
= round_down(sp
- frame_size
, 64);
550 if (ia32_frame
&& use_fxsr()) {
551 frame_size
+= sizeof(struct i387_fsave_struct
);
552 sp
-= sizeof(struct i387_fsave_struct
);